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Fix ~3500 analyser issues

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See merge request ryubing/ryujinx!44
This commit is contained in:
MrKev
2025-05-30 17:08:34 -05:00
committed by LotP
parent 417df486b1
commit 361d0c5632
622 changed files with 3080 additions and 2652 deletions
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19
src/Ryujinx.Graphics.Shader/Instructions/AttributeMap.cs
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@@ -1,6 +1,7 @@
using Ryujinx.Graphics.Shader.IntermediateRepresentation;
using Ryujinx.Graphics.Shader.Translation;
using System.Collections.Generic;
using System.Collections.ObjectModel;
using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
namespace Ryujinx.Graphics.Shader.Instructions
@@ -46,8 +47,8 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
}
private static readonly IReadOnlyDictionary<int, AttributeEntry> _attributes;
private static readonly IReadOnlyDictionary<int, AttributeEntry> _attributesPerPatch;
private static readonly ReadOnlyDictionary<int, AttributeEntry> _attributes;
private static readonly ReadOnlyDictionary<int, AttributeEntry> _attributesPerPatch;
static AttributeMap()
{
@@ -55,7 +56,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
_attributesPerPatch = CreatePerPatchMap();
}
private static IReadOnlyDictionary<int, AttributeEntry> CreateMap()
private static ReadOnlyDictionary<int, AttributeEntry> CreateMap()
{
Dictionary<int, AttributeEntry> map = new();
@@ -79,10 +80,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
Add(map, 0x3a0, AggregateType.Array | AggregateType.S32, IoVariable.ViewportMask, StagesMask.Fragment, StagesMask.VertexTessellationGeometry);
Add(map, 0x3fc, AggregateType.Bool, IoVariable.FrontFacing, StagesMask.Fragment, StagesMask.None);
return map;
return map.AsReadOnly();
}
private static IReadOnlyDictionary<int, AttributeEntry> CreatePerPatchMap()
private static ReadOnlyDictionary<int, AttributeEntry> CreatePerPatchMap()
{
Dictionary<int, AttributeEntry> map = new();
@@ -90,7 +91,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
Add(map, 0x010, AggregateType.Vector2 | AggregateType.FP32, IoVariable.TessellationLevelInner, StagesMask.TessellationEvaluation, StagesMask.TessellationControl);
Add(map, 0x018, AggregateType.Vector4 | AggregateType.FP32, IoVariable.UserDefined, StagesMask.TessellationEvaluation, StagesMask.TessellationControl, 31, 0x200);
return map;
return map.AsReadOnly();
}
private static void Add(
@@ -326,9 +327,9 @@ namespace Ryujinx.Graphics.Shader.Instructions
return false;
}
return stage == ShaderStage.TessellationControl ||
stage == ShaderStage.TessellationEvaluation ||
stage == ShaderStage.Geometry;
return stage is ShaderStage.TessellationControl or
ShaderStage.TessellationEvaluation or
ShaderStage.Geometry;
}
public static bool HasInvocationId(ShaderStage stage, bool isOutput)

22
src/Ryujinx.Graphics.Shader/Instructions/InstEmitAttribute.cs
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@@ -164,7 +164,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
isFixedFunc = TryFixedFuncToUserAttributeIpa(context, op.Imm10, out res);
if (op.Imm10 >= AttributeConsts.UserAttributeBase && op.Imm10 < AttributeConsts.UserAttributeEnd)
if (op.Imm10 is >= AttributeConsts.UserAttributeBase and < AttributeConsts.UserAttributeEnd)
{
int index = (op.Imm10 - AttributeConsts.UserAttributeBase) >> 4;
@@ -173,7 +173,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
res = context.FPMultiply(res, context.Load(StorageKind.Input, IoVariable.FragmentCoord, null, Const(3)));
}
}
else if (op.Imm10 == AttributeConsts.PositionX || op.Imm10 == AttributeConsts.PositionY)
else if (op.Imm10 is AttributeConsts.PositionX or AttributeConsts.PositionY)
{
// FragCoord X/Y must be divided by the render target scale, if resolution scaling is active,
// because the shader code is not expecting scaled values.
@@ -296,19 +296,19 @@ namespace Ryujinx.Graphics.Shader.Instructions
private static bool HasPrimitiveVertex(int attr)
{
return attr != AttributeConsts.PrimitiveId &&
attr != AttributeConsts.TessCoordX &&
attr != AttributeConsts.TessCoordY;
return attr is not AttributeConsts.PrimitiveId and
not AttributeConsts.TessCoordX and
not AttributeConsts.TessCoordY;
}
private static bool CanLoadOutput(int attr)
{
return attr != AttributeConsts.TessCoordX && attr != AttributeConsts.TessCoordY;
return attr is not AttributeConsts.TessCoordX and not AttributeConsts.TessCoordY;
}
private static bool TryFixedFuncToUserAttributeIpa(EmitterContext context, int attr, out Operand selectedAttr)
{
if (attr >= AttributeConsts.FrontColorDiffuseR && attr < AttributeConsts.BackColorDiffuseR)
if (attr is >= AttributeConsts.FrontColorDiffuseR and < AttributeConsts.BackColorDiffuseR)
{
// TODO: If two sided rendering is enabled, then this should return
// FrontColor if the fragment is front facing, and back color otherwise.
@@ -321,12 +321,12 @@ namespace Ryujinx.Graphics.Shader.Instructions
selectedAttr = GenerateIpaLoad(context, FixedFuncToUserAttribute(context.TranslatorContext, attr, isOutput: false));
return true;
}
else if (attr >= AttributeConsts.BackColorDiffuseR && attr < AttributeConsts.ClipDistance0)
else if (attr is >= AttributeConsts.BackColorDiffuseR and < AttributeConsts.ClipDistance0)
{
selectedAttr = ConstF(((attr >> 2) & 3) == 3 ? 1f : 0f);
return true;
}
else if (attr >= AttributeConsts.TexCoordBase && attr < AttributeConsts.TexCoordEnd)
else if (attr is >= AttributeConsts.TexCoordBase and < AttributeConsts.TexCoordEnd)
{
selectedAttr = GenerateIpaLoad(context, FixedFuncToUserAttribute(context.TranslatorContext, attr, isOutput: false));
return true;
@@ -355,11 +355,11 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
attr = FixedFuncToUserAttribute(translatorContext, attr, AttributeConsts.FogCoord, fixedStartAttr, isOutput);
}
else if (attr >= AttributeConsts.FrontColorDiffuseR && attr < AttributeConsts.ClipDistance0)
else if (attr is >= AttributeConsts.FrontColorDiffuseR and < AttributeConsts.ClipDistance0)
{
attr = FixedFuncToUserAttribute(translatorContext, attr, AttributeConsts.FrontColorDiffuseR, fixedStartAttr + 1, isOutput);
}
else if (attr >= AttributeConsts.TexCoordBase && attr < AttributeConsts.TexCoordEnd)
else if (attr is >= AttributeConsts.TexCoordBase and < AttributeConsts.TexCoordEnd)
{
attr = FixedFuncToUserAttribute(translatorContext, attr, AttributeConsts.TexCoordBase, fixedStartAttr + 5, isOutput);
}

44
src/Ryujinx.Graphics.Shader/Instructions/InstEmitConversion.cs
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@@ -179,8 +179,8 @@ namespace Ryujinx.Graphics.Shader.Instructions
Instruction fpType = srcType.ToInstFPType();
bool isSignedInt = dstType == IDstFmt.S16 || dstType == IDstFmt.S32 || dstType == IDstFmt.S64;
bool isSmallInt = dstType == IDstFmt.U16 || dstType == IDstFmt.S16;
bool isSignedInt = dstType is IDstFmt.S16 or IDstFmt.S32 or IDstFmt.S64;
bool isSmallInt = dstType is IDstFmt.U16 or IDstFmt.S16;
Operand srcB = context.FPAbsNeg(src, absolute, negate, fpType);
@@ -242,15 +242,15 @@ namespace Ryujinx.Graphics.Shader.Instructions
bool negate)
{
bool isSignedInt =
srcType == ISrcFmt.S8 ||
srcType == ISrcFmt.S16 ||
srcType == ISrcFmt.S32 ||
srcType == ISrcFmt.S64;
srcType is ISrcFmt.S8 or
ISrcFmt.S16 or
ISrcFmt.S32 or
ISrcFmt.S64;
bool isSmallInt =
srcType == ISrcFmt.U16 ||
srcType == ISrcFmt.S16 ||
srcType == ISrcFmt.U8 ||
srcType == ISrcFmt.S8;
srcType is ISrcFmt.U16 or
ISrcFmt.S16 or
ISrcFmt.U8 or
ISrcFmt.S8;
// TODO: Handle S/U64.
@@ -258,7 +258,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
if (isSmallInt)
{
int size = srcType == ISrcFmt.U16 || srcType == ISrcFmt.S16 ? 16 : 8;
int size = srcType is ISrcFmt.U16 or ISrcFmt.S16 ? 16 : 8;
srcB = isSignedInt
? context.BitfieldExtractS32(srcB, Const((int)byteSelection * 8), Const(size))
@@ -302,22 +302,22 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
bool srcIsSignedInt =
srcType == ISrcDstFmt.S8 ||
srcType == ISrcDstFmt.S16 ||
srcType == ISrcDstFmt.S32;
srcType is ISrcDstFmt.S8 or
ISrcDstFmt.S16 or
ISrcDstFmt.S32;
bool dstIsSignedInt =
dstType == ISrcDstFmt.S8 ||
dstType == ISrcDstFmt.S16 ||
dstType == ISrcDstFmt.S32;
dstType is ISrcDstFmt.S8 or
ISrcDstFmt.S16 or
ISrcDstFmt.S32;
bool srcIsSmallInt =
srcType == ISrcDstFmt.U16 ||
srcType == ISrcDstFmt.S16 ||
srcType == ISrcDstFmt.U8 ||
srcType == ISrcDstFmt.S8;
srcType is ISrcDstFmt.U16 or
ISrcDstFmt.S16 or
ISrcDstFmt.U8 or
ISrcDstFmt.S8;
if (srcIsSmallInt)
{
int size = srcType == ISrcDstFmt.U16 || srcType == ISrcDstFmt.S16 ? 16 : 8;
int size = srcType is ISrcDstFmt.U16 or ISrcDstFmt.S16 ? 16 : 8;
src = srcIsSignedInt
? context.BitfieldExtractS32(src, Const((int)byteSelection * 8), Const(size))

2
src/Ryujinx.Graphics.Shader/Instructions/InstEmitFloatComparison.cs
View File

@@ -534,7 +534,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
res = Const(IrConsts.False);
}
else if (cond == FComp.Nan || cond == FComp.Num)
else if (cond is FComp.Nan or FComp.Num)
{
res = context.BitwiseOr(context.IsNan(srcA, fpType), context.IsNan(srcB, fpType));

19
src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs
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@@ -73,7 +73,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
Operand slot = Const(op.CbufSlot);
Operand srcA = GetSrcReg(context, op.SrcA);
if (op.AddressMode == AddressMode.Is || op.AddressMode == AddressMode.Isl)
if (op.AddressMode is AddressMode.Is or AddressMode.Isl)
{
slot = context.IAdd(slot, context.BitfieldExtractU32(srcA, Const(16), Const(16)));
srcA = context.BitwiseAnd(srcA, Const(0xffff));
@@ -213,7 +213,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
switch (op)
{
case AtomOp.Add:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicAdd(storageKind, e0, e1, value);
}
@@ -221,6 +221,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
context.TranslatorContext.GpuAccessor.Log($"Invalid reduction type: {type}.");
}
break;
case AtomOp.Min:
if (type == AtomSize.S32)
@@ -235,6 +236,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
context.TranslatorContext.GpuAccessor.Log($"Invalid reduction type: {type}.");
}
break;
case AtomOp.Max:
if (type == AtomSize.S32)
@@ -249,9 +251,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
context.TranslatorContext.GpuAccessor.Log($"Invalid reduction type: {type}.");
}
break;
case AtomOp.And:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicAnd(storageKind, e0, e1, value);
}
@@ -259,9 +262,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
context.TranslatorContext.GpuAccessor.Log($"Invalid reduction type: {type}.");
}
break;
case AtomOp.Or:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicOr(storageKind, e0, e1, value);
}
@@ -269,9 +273,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
context.TranslatorContext.GpuAccessor.Log($"Invalid reduction type: {type}.");
}
break;
case AtomOp.Xor:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicXor(storageKind, e0, e1, value);
}
@@ -279,9 +284,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
context.TranslatorContext.GpuAccessor.Log($"Invalid reduction type: {type}.");
}
break;
case AtomOp.Exch:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicSwap(storageKind, e0, e1, value);
}
@@ -289,6 +295,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
context.TranslatorContext.GpuAccessor.Log($"Invalid reduction type: {type}.");
}
break;
default:
context.TranslatorContext.GpuAccessor.Log($"Invalid atomic operation: {op}.");

7
src/Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs
View File

@@ -92,14 +92,14 @@ namespace Ryujinx.Graphics.Shader.Instructions
break;
case SReg.InvocationInfo:
if (context.TranslatorContext.Definitions.Stage != ShaderStage.Compute && context.TranslatorContext.Definitions.Stage != ShaderStage.Fragment)
if (context.TranslatorContext.Definitions.Stage is not ShaderStage.Compute and not ShaderStage.Fragment)
{
// Note: Lowest 8-bits seems to contain some primitive index,
// but it seems to be NVIDIA implementation specific as it's only used
// to calculate ISBE offsets, so we can just keep it as zero.
if (context.TranslatorContext.Definitions.Stage == ShaderStage.TessellationControl ||
context.TranslatorContext.Definitions.Stage == ShaderStage.TessellationEvaluation)
if (context.TranslatorContext.Definitions.Stage is ShaderStage.TessellationControl or
ShaderStage.TessellationEvaluation)
{
src = context.ShiftLeft(context.Load(StorageKind.Input, IoVariable.PatchVertices), Const(16));
}
@@ -112,6 +112,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
src = Const(0);
}
break;
case SReg.TId:

2
src/Ryujinx.Graphics.Shader/Instructions/InstEmitShift.cs
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@@ -115,7 +115,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
bool left,
bool writeCC)
{
bool isLongShift = maxShift == MaxShift.U64 || maxShift == MaxShift.S64;
bool isLongShift = maxShift is MaxShift.U64 or MaxShift.S64;
bool signedShift = maxShift == MaxShift.S64;
int maxShiftConst = isLongShift ? 64 : 32;

4
src/Ryujinx.Graphics.Shader/Instructions/InstEmitSurface.cs
View File

@@ -258,7 +258,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
// TODO: FP and 64-bit formats.
TextureFormat format = size == SuatomSize.Sd32 || size == SuatomSize.Sd64
TextureFormat format = size is SuatomSize.Sd32 or SuatomSize.Sd64
? (isBindless ? TextureFormat.Unknown : ShaderProperties.GetTextureFormatAtomic(context.TranslatorContext.GpuAccessor, imm))
: GetTextureFormat(size);
@@ -537,7 +537,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
// TODO: FP and 64-bit formats.
TextureFormat format = size == SuatomSize.Sd32 || size == SuatomSize.Sd64
TextureFormat format = size is SuatomSize.Sd32 or SuatomSize.Sd64
? (isBindless ? TextureFormat.Unknown : ShaderProperties.GetTextureFormatAtomic(context.TranslatorContext.GpuAccessor, imm))
: GetTextureFormat(size);

31
src/Ryujinx.Graphics.Shader/Instructions/InstEmitTexture.cs
View File

@@ -284,7 +284,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
flags |= TextureFlags.Offset;
}
if (lodMode == Lod.Lb || lodMode == Lod.Lba)
if (lodMode is Lod.Lb or Lod.Lba)
{
sourcesList.Add(lodValue);
@@ -504,6 +504,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
sourcesList.Add(ConstF(0));
}
break;
case TldsTarget.Texture1DLodLevel:
@@ -694,10 +695,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
bool isArray =
dimensions == TexDim.Array1d ||
dimensions == TexDim.Array2d ||
dimensions == TexDim.Array3d ||
dimensions == TexDim.ArrayCube;
dimensions is TexDim.Array1d or
TexDim.Array2d or
TexDim.Array3d or
TexDim.ArrayCube;
Operand arrayIndex = isArray ? Ra() : null;
@@ -736,7 +737,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
Operand[] packedOffs = new Operand[2];
bool hasAnyOffset = offset == TexOffset.Aoffi || offset == TexOffset.Ptp;
bool hasAnyOffset = offset is TexOffset.Aoffi or TexOffset.Ptp;
packedOffs[0] = hasAnyOffset ? Rb() : null;
packedOffs[1] = offset == TexOffset.Ptp ? Rb() : null;
@@ -849,10 +850,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
int coordsCount = type.GetDimensions();
bool isArray =
dimensions == TexDim.Array1d ||
dimensions == TexDim.Array2d ||
dimensions == TexDim.Array3d ||
dimensions == TexDim.ArrayCube;
dimensions is TexDim.Array1d or
TexDim.Array2d or
TexDim.Array3d or
TexDim.ArrayCube;
Operand arrayIndex = isArray ? Ra() : null;
@@ -993,10 +994,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
Operand packedParams = Ra();
bool isArray =
dimensions == TexDim.Array1d ||
dimensions == TexDim.Array2d ||
dimensions == TexDim.Array3d ||
dimensions == TexDim.ArrayCube;
dimensions is TexDim.Array1d or
TexDim.Array2d or
TexDim.Array3d or
TexDim.ArrayCube;
if (isArray)
{
@@ -1143,6 +1144,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
context.Copy(d, context.TextureQuerySize(type, flags, setAndBinding, compIndex, sources));
}
}
break;
case TexQuery.TexHeaderTextureType:
@@ -1174,6 +1176,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
context.Copy(d, context.TextureQuerySamples(type, flags, setAndBinding, sources));
}
}
break;
default: