mirror of
https://git.ryujinx.app/ryubing/ryujinx.git
synced 2026-05-12 16:25:46 +00:00
feature: .NET 10 (ryubing/ryujinx!214)
See merge request ryubing/ryujinx!214
This commit is contained in:
@@ -25,9 +25,9 @@ namespace ARMeilleure.CodeGen.Arm64
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static class ComparisonArm64Extensions
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{
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public static ArmCondition ToArmCondition(this Comparison comp)
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extension(Comparison comparison)
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{
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return comp switch
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public ArmCondition Arm => comparison switch
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{
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#pragma warning disable IDE0055 // Disable formatting
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Comparison.Equal => ArmCondition.Eq,
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@@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Comparison.LessUI => ArmCondition.LtUn,
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#pragma warning restore IDE0055
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_ => throw new ArgumentException(null, nameof(comp)),
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_ => throw new ArgumentException(null, nameof(comparison))
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};
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}
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}
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@@ -181,10 +181,10 @@ namespace ARMeilleure.CodeGen.Arm64
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public void Fmov(Operand rd, Operand rn, bool topHalf)
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{
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Debug.Assert(rd.Type.IsInteger() != rn.Type.IsInteger());
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Debug.Assert(rd.Type.IsInteger != rn.Type.IsInteger);
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Debug.Assert(rd.Type == OperandType.I64 || rn.Type == OperandType.I64 || !topHalf);
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uint opcode = rd.Type.IsInteger() ? 0b110u : 0b111u;
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uint opcode = rd.Type.IsInteger ? 0b110u : 0b111u;
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uint rmode = topHalf ? 1u << 19 : 0u;
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uint ftype = rd.Type == OperandType.FP64 || rn.Type == OperandType.FP64 ? 1u << 22 : 0u;
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@@ -411,7 +411,7 @@ namespace ARMeilleure.CodeGen.Arm64
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public void Mov(Operand rd, Operand rn)
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{
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if (rd.Type.IsInteger())
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if (rd.Type.IsInteger)
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{
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Orr(rd, Factory.Register(ZrRegister, RegisterType.Integer, rd.Type), rn);
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}
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@@ -973,7 +973,7 @@ namespace ARMeilleure.CodeGen.Arm64
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uint instruction;
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int scale;
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if (type.IsInteger())
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if (type.IsInteger)
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{
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instruction = intInst;
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@@ -1009,7 +1009,7 @@ namespace ARMeilleure.CodeGen.Arm64
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{
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uint instruction;
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if (type.IsInteger())
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if (type.IsInteger)
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{
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instruction = intInst;
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@@ -250,7 +250,7 @@ namespace ARMeilleure.CodeGen.Arm64
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// ValidateBinOp(dest, src1, src2);
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if (dest.Type.IsInteger())
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if (dest.Type.IsInteger)
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{
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context.Assembler.Add(dest, src1, src2);
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}
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@@ -268,7 +268,7 @@ namespace ARMeilleure.CodeGen.Arm64
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ValidateBinOp(dest, src1, src2);
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Debug.Assert(dest.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger);
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context.Assembler.And(dest, src1, src2);
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}
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@@ -281,7 +281,7 @@ namespace ARMeilleure.CodeGen.Arm64
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ValidateBinOp(dest, src1, src2);
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if (dest.Type.IsInteger())
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if (dest.Type.IsInteger)
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{
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context.Assembler.Eor(dest, src1, src2);
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}
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@@ -298,7 +298,7 @@ namespace ARMeilleure.CodeGen.Arm64
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ValidateUnOp(dest, source);
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Debug.Assert(dest.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger);
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context.Assembler.Mvn(dest, source);
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}
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@@ -311,7 +311,7 @@ namespace ARMeilleure.CodeGen.Arm64
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ValidateBinOp(dest, src1, src2);
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Debug.Assert(dest.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger);
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context.Assembler.Orr(dest, src1, src2);
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}
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@@ -322,7 +322,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Debug.Assert(comp.Kind == OperandKind.Constant);
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ArmCondition cond = ((Comparison)comp.AsInt32()).ToArmCondition();
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ArmCondition cond = ((Comparison)comp.AsInt32()).Arm;
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GenerateCompareCommon(context, operation);
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@@ -336,7 +336,7 @@ namespace ARMeilleure.CodeGen.Arm64
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ValidateUnOp(dest, source);
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Debug.Assert(dest.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger);
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context.Assembler.Rev(dest, source);
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}
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@@ -354,7 +354,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Debug.Assert(dest.Type == OperandType.I32);
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Debug.Assert(comp.Kind == OperandKind.Constant);
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ArmCondition cond = ((Comparison)comp.AsInt32()).ToArmCondition();
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ArmCondition cond = ((Comparison)comp.AsInt32()).Arm;
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GenerateCompareCommon(context, operation);
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@@ -428,7 +428,7 @@ namespace ARMeilleure.CodeGen.Arm64
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EnsureSameType(src1, src2);
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Debug.Assert(src1.Type.IsInteger());
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Debug.Assert(src1.Type.IsInteger);
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context.Assembler.Cmp(src1, src2);
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}
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@@ -442,7 +442,7 @@ namespace ARMeilleure.CodeGen.Arm64
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EnsureSameType(dest, src2, src3);
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Debug.Assert(dest.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger);
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Debug.Assert(src1.Type == OperandType.I32);
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context.Assembler.Cmp(src1, Const(src1.Type, 0));
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@@ -468,7 +468,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Debug.Assert(dest.Type != source.Type);
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Debug.Assert(source.Type != OperandType.V128);
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if (source.Type.IsInteger())
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if (source.Type.IsInteger)
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{
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context.Assembler.ScvtfScalar(dest, source);
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}
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@@ -485,7 +485,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64);
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Debug.Assert(dest.Type != source.Type);
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Debug.Assert(source.Type.IsInteger());
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Debug.Assert(source.Type.IsInteger);
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context.Assembler.UcvtfScalar(dest, source);
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}
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@@ -497,7 +497,7 @@ namespace ARMeilleure.CodeGen.Arm64
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EnsureSameType(dest, source);
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Debug.Assert(dest.Type.IsInteger() || source.Kind != OperandKind.Constant);
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Debug.Assert(dest.Type.IsInteger || source.Kind != OperandKind.Constant);
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// Moves to the same register are useless.
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if (dest.Kind == source.Kind && dest.Value == source.Value)
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@@ -529,7 +529,7 @@ namespace ARMeilleure.CodeGen.Arm64
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EnsureSameType(dest, source);
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Debug.Assert(dest.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger);
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context.Assembler.Clz(dest, source);
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}
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@@ -542,7 +542,7 @@ namespace ARMeilleure.CodeGen.Arm64
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ValidateBinOp(dest, dividend, divisor);
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if (dest.Type.IsInteger())
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if (dest.Type.IsInteger)
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{
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context.Assembler.Sdiv(dest, dividend, divisor);
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}
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@@ -576,7 +576,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand value = operation.Destination;
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Operand address = operation.GetSource(0);
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Debug.Assert(value.Type.IsInteger());
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Debug.Assert(value.Type.IsInteger);
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context.Assembler.LdrhRiUn(value, address, 0);
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}
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@@ -586,7 +586,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand value = operation.Destination;
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Operand address = operation.GetSource(0);
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Debug.Assert(value.Type.IsInteger());
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Debug.Assert(value.Type.IsInteger);
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context.Assembler.LdrbRiUn(value, address, 0);
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}
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@@ -604,7 +604,7 @@ namespace ARMeilleure.CodeGen.Arm64
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EnsureSameType(dest, src1, src2);
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if (dest.Type.IsInteger())
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if (dest.Type.IsInteger)
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{
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context.Assembler.Mul(dest, src1, src2);
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}
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@@ -647,7 +647,7 @@ namespace ARMeilleure.CodeGen.Arm64
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ValidateUnOp(dest, source);
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if (dest.Type.IsInteger())
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if (dest.Type.IsInteger)
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{
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context.Assembler.Neg(dest, source);
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}
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@@ -732,7 +732,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand dest = operation.Destination;
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Operand source = operation.GetSource(0);
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Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
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context.Assembler.Sxth(dest, source);
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}
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@@ -742,7 +742,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand dest = operation.Destination;
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Operand source = operation.GetSource(0);
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Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
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context.Assembler.Sxtw(dest, source);
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}
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@@ -752,7 +752,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand dest = operation.Destination;
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Operand source = operation.GetSource(0);
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Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
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Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
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context.Assembler.Sxtb(dest, source);
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}
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@@ -823,7 +823,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand value = operation.GetSource(1);
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Operand address = operation.GetSource(0);
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Debug.Assert(value.Type.IsInteger());
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Debug.Assert(value.Type.IsInteger);
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context.Assembler.StrhRiUn(value, address, 0);
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}
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@@ -833,7 +833,7 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand value = operation.GetSource(1);
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Operand address = operation.GetSource(0);
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Debug.Assert(value.Type.IsInteger());
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Debug.Assert(value.Type.IsInteger);
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context.Assembler.StrbRiUn(value, address, 0);
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}
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@@ -858,7 +858,7 @@ namespace ARMeilleure.CodeGen.Arm64
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// ValidateBinOp(dest, src1, src2);
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if (dest.Type.IsInteger())
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if (dest.Type.IsInteger)
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{
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context.Assembler.Sub(dest, src1, src2);
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}
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@@ -882,7 +882,7 @@ namespace ARMeilleure.CodeGen.Arm64
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if (dest != default)
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{
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Debug.Assert(!dest.Type.IsInteger() && source.Type.IsInteger());
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Debug.Assert(!dest.Type.IsInteger && source.Type.IsInteger);
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|
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OperandType destType = source.Type == OperandType.I64 ? OperandType.FP64 : OperandType.FP32;
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@@ -901,9 +901,9 @@ namespace ARMeilleure.CodeGen.Arm64
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byte index = src2.AsByte();
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Debug.Assert(index < OperandType.V128.GetSizeInBytes() / dest.Type.GetSizeInBytes());
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Debug.Assert(index < OperandType.V128.ByteSize / dest.Type.ByteSize);
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|
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if (dest.Type.IsInteger())
|
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if (dest.Type.IsInteger)
|
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{
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context.Assembler.Umov(dest, src1, index, dest.Type == OperandType.I64 ? 3 : 2);
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}
|
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@@ -959,7 +959,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
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|
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byte index = src3.AsByte();
|
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|
||||
if (src2.Type.IsInteger())
|
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if (src2.Type.IsInteger)
|
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{
|
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context.Assembler.Ins(dest, src2, index, src2.Type == OperandType.I64 ? 3 : 2);
|
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}
|
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@@ -1007,7 +1007,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
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{
|
||||
Operand dest = operation.Destination;
|
||||
|
||||
Debug.Assert(!dest.Type.IsInteger());
|
||||
Debug.Assert(!dest.Type.IsInteger);
|
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|
||||
context.Assembler.CmeqVector(dest, dest, dest, 2);
|
||||
}
|
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@@ -1016,7 +1016,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
{
|
||||
Operand dest = operation.Destination;
|
||||
|
||||
Debug.Assert(!dest.Type.IsInteger());
|
||||
Debug.Assert(!dest.Type.IsInteger);
|
||||
|
||||
context.Assembler.EorVector(dest, dest, dest);
|
||||
}
|
||||
@@ -1046,7 +1046,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
Operand dest = operation.Destination;
|
||||
Operand source = operation.GetSource(0);
|
||||
|
||||
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
|
||||
Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
|
||||
|
||||
context.Assembler.Uxth(dest, source);
|
||||
}
|
||||
@@ -1056,7 +1056,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
Operand dest = operation.Destination;
|
||||
Operand source = operation.GetSource(0);
|
||||
|
||||
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
|
||||
Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
|
||||
|
||||
// We can eliminate the move if source is already 32-bit and the registers are the same.
|
||||
if (dest.Value == source.Value && source.Type == OperandType.I32)
|
||||
@@ -1072,7 +1072,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
Operand dest = operation.Destination;
|
||||
Operand source = operation.GetSource(0);
|
||||
|
||||
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());
|
||||
Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
|
||||
|
||||
context.Assembler.Uxtb(dest, source);
|
||||
}
|
||||
@@ -1169,7 +1169,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
context.Assembler.StrRiPre(Register(reg, type), Register(SpRegister), -calleeSaveRegionSize);
|
||||
}
|
||||
|
||||
offset += type.GetSizeInBytes();
|
||||
offset += type.ByteSize;
|
||||
}
|
||||
|
||||
while (mask != 0)
|
||||
@@ -1195,7 +1195,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
context.Assembler.StpRiPre(Register(reg, type), Register(reg2, type), Register(SpRegister), -calleeSaveRegionSize);
|
||||
}
|
||||
|
||||
offset += type.GetSizeInBytes() * 2;
|
||||
offset += type.ByteSize * 2;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1273,7 +1273,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
mask &= ~(1 << reg2);
|
||||
|
||||
offset -= type.GetSizeInBytes() * 2;
|
||||
offset -= type.ByteSize * 2;
|
||||
|
||||
if (offset != 0)
|
||||
{
|
||||
@@ -1286,7 +1286,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
}
|
||||
else
|
||||
{
|
||||
offset -= type.GetSizeInBytes();
|
||||
offset -= type.ByteSize;
|
||||
|
||||
if (offset != 0)
|
||||
{
|
||||
@@ -1435,12 +1435,12 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
OperandType valueType = GetMemOpValueType(currentOp);
|
||||
|
||||
if (valueType != GetMemOpValueType(nextOp) || op1Offset + valueType.GetSizeInBytes() != op2Offset)
|
||||
if (valueType != GetMemOpValueType(nextOp) || op1Offset + valueType.ByteSize != op2Offset)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!CodeGenCommon.ConstFitsOnSImm7(op1Offset, valueType.GetSizeInBytesLog2()))
|
||||
if (!CodeGenCommon.ConstFitsOnSImm7(op1Offset, valueType.ByteSizeLog2))
|
||||
{
|
||||
return false;
|
||||
}
|
||||
@@ -1549,7 +1549,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
// EnsureSameReg (dest, src1);
|
||||
EnsureSameType(dest, src1);
|
||||
|
||||
Debug.Assert(dest.Type.IsInteger() && src2.Type == OperandType.I32);
|
||||
Debug.Assert(dest.Type.IsInteger && src2.Type == OperandType.I32);
|
||||
}
|
||||
|
||||
private static void EnsureSameReg(Operand op1, Operand op2)
|
||||
|
||||
@@ -462,7 +462,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
{
|
||||
instruction |= (sz << 22);
|
||||
|
||||
if (rd.Type.IsInteger())
|
||||
if (rd.Type.IsInteger)
|
||||
{
|
||||
context.Assembler.WriteInstructionAuto(instruction, rd, rn);
|
||||
}
|
||||
@@ -490,7 +490,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
instruction |= (sz << 22);
|
||||
instruction |= (64 - fBits) << 10;
|
||||
|
||||
if (rd.Type.IsInteger())
|
||||
if (rd.Type.IsInteger)
|
||||
{
|
||||
Debug.Assert(rd.Type != OperandType.I32 || fBits <= 32);
|
||||
|
||||
|
||||
@@ -112,7 +112,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
if (src1.Kind == OperandKind.Constant)
|
||||
{
|
||||
if (!src1.Type.IsInteger())
|
||||
if (!src1.Type.IsInteger)
|
||||
{
|
||||
// Handle non-integer types (FP32, FP64 and V128).
|
||||
// For instructions without an immediate operand, we do the following:
|
||||
@@ -161,7 +161,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
if (src2.Kind == OperandKind.Constant)
|
||||
{
|
||||
if (!src2.Type.IsInteger())
|
||||
if (!src2.Type.IsInteger)
|
||||
{
|
||||
src2 = AddFloatConstantCopy(constants, nodes, node, src2);
|
||||
|
||||
@@ -191,7 +191,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
if (src.Kind == OperandKind.Constant)
|
||||
{
|
||||
if (!src.Type.IsInteger())
|
||||
if (!src.Type.IsInteger)
|
||||
{
|
||||
src = AddFloatConstantCopy(constants, nodes, node, src);
|
||||
|
||||
@@ -282,7 +282,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
bool passOnReg;
|
||||
|
||||
if (source.Type.IsInteger())
|
||||
if (source.Type.IsInteger)
|
||||
{
|
||||
passOnReg = intCount < intMax;
|
||||
}
|
||||
@@ -309,7 +309,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
if (passOnReg)
|
||||
{
|
||||
Operand argReg = source.Type.IsInteger()
|
||||
Operand argReg = source.Type.IsInteger
|
||||
? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
|
||||
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);
|
||||
|
||||
@@ -327,7 +327,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
InsertConstantRegCopies(constants, nodes, nodes.AddBefore(node, spillOp));
|
||||
|
||||
stackOffset += source.Type.GetSizeInBytes();
|
||||
stackOffset += source.Type.ByteSize;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -345,7 +345,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
}
|
||||
else
|
||||
{
|
||||
Operand retReg = dest.Type.IsInteger()
|
||||
Operand retReg = dest.Type.IsInteger
|
||||
? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type)
|
||||
: Xmm(CallingConvention.GetVecReturnRegister(), dest.Type);
|
||||
|
||||
@@ -385,7 +385,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
bool passOnReg;
|
||||
|
||||
if (source.Type.IsInteger())
|
||||
if (source.Type.IsInteger)
|
||||
{
|
||||
passOnReg = intCount + 1 < intMax;
|
||||
}
|
||||
@@ -408,7 +408,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
if (passOnReg)
|
||||
{
|
||||
Operand argReg = source.Type.IsInteger()
|
||||
Operand argReg = source.Type.IsInteger
|
||||
? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
|
||||
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);
|
||||
|
||||
@@ -521,7 +521,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
}
|
||||
else
|
||||
{
|
||||
Operand retReg = source.Type.IsInteger()
|
||||
Operand retReg = source.Type.IsInteger
|
||||
? Gpr(CallingConvention.GetIntReturnRegister(), source.Type)
|
||||
: Xmm(CallingConvention.GetVecReturnRegister(), source.Type);
|
||||
|
||||
@@ -551,7 +551,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
{
|
||||
OperandType argType = cctx.FuncArgTypes[cIndex];
|
||||
|
||||
if (argType.IsInteger())
|
||||
if (argType.IsInteger)
|
||||
{
|
||||
intCount++;
|
||||
}
|
||||
@@ -567,7 +567,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
|
||||
bool passOnReg;
|
||||
|
||||
if (source.Type.IsInteger())
|
||||
if (source.Type.IsInteger)
|
||||
{
|
||||
passOnReg = intCount < CallingConvention.GetArgumentsOnRegsCount();
|
||||
}
|
||||
@@ -606,7 +606,7 @@ namespace ARMeilleure.CodeGen.Arm64
|
||||
{
|
||||
Operand pArg = Local(dest.Type);
|
||||
|
||||
Operand argReg = dest.Type.IsInteger()
|
||||
Operand argReg = dest.Type.IsInteger
|
||||
? Gpr(CallingConvention.GetIntArgumentRegister(intCount), dest.Type)
|
||||
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount), dest.Type);
|
||||
|
||||
|
||||
Reference in New Issue
Block a user