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Memory changes 3 (ryubing/ryujinx!202)

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See merge request ryubing/ryujinx!202
This commit is contained in:
LotP
2025-10-30 20:55:58 -05:00
parent ab7aeee67b
commit 92b61f9d73
43 changed files with 686 additions and 315 deletions
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17
src/Ryujinx.HLE/HOS/Kernel/Memory/KMemoryBlock.cs
View File

@@ -110,7 +110,22 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
{
ulong size = PagesCount * KPageTableBase.PageSize;
return new KMemoryInfo(
return KMemoryInfo.Pool.Allocate().Set(
BaseAddress,
size,
State,
Permission,
Attribute,
SourcePermission,
IpcRefCount,
DeviceRefCount);
}
public KMemoryInfo GetInfo(KMemoryInfo oldInfo)
{
ulong size = PagesCount * KPageTableBase.PageSize;
return oldInfo.Set(
BaseAddress,
size,
State,

24
src/Ryujinx.HLE/HOS/Kernel/Memory/KMemoryInfo.cs
View File

@@ -1,19 +1,23 @@
using Ryujinx.Common;
namespace Ryujinx.HLE.HOS.Kernel.Memory
{
class KMemoryInfo
{
public ulong Address { get; }
public ulong Size { get; }
public static readonly ObjectPool<KMemoryInfo> Pool = new(() => new KMemoryInfo());
public ulong Address { get; private set; }
public ulong Size { get; private set; }
public MemoryState State { get; }
public KMemoryPermission Permission { get; }
public MemoryAttribute Attribute { get; }
public KMemoryPermission SourcePermission { get; }
public MemoryState State { get; private set; }
public KMemoryPermission Permission { get; private set; }
public MemoryAttribute Attribute { get;private set; }
public KMemoryPermission SourcePermission { get; private set; }
public int IpcRefCount { get; }
public int DeviceRefCount { get; }
public int IpcRefCount { get; private set; }
public int DeviceRefCount { get; private set; }
public KMemoryInfo(
public KMemoryInfo Set(
ulong address,
ulong size,
MemoryState state,
@@ -31,6 +35,8 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
SourcePermission = sourcePermission;
IpcRefCount = ipcRefCount;
DeviceRefCount = deviceRefCount;
return this;
}
}
}

6
src/Ryujinx.HLE/HOS/Kernel/Memory/KMemoryPermission.cs
View File

@@ -25,17 +25,17 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
{
MemoryPermission output = MemoryPermission.None;
if (permission.HasFlag(KMemoryPermission.Read))
if ((permission & KMemoryPermission.Read) == KMemoryPermission.Read)
{
output = MemoryPermission.Read;
}
if (permission.HasFlag(KMemoryPermission.Write))
if ((permission & KMemoryPermission.Write) == KMemoryPermission.Write)
{
output |= MemoryPermission.Write;
}
if (permission.HasFlag(KMemoryPermission.Execute))
if ((permission & KMemoryPermission.Execute) == KMemoryPermission.Execute)
{
output |= MemoryPermission.Execute;
}

36
src/Ryujinx.HLE/HOS/Kernel/Memory/KPageTableBase.cs
View File

@@ -998,7 +998,7 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
}
else
{
return new KMemoryInfo(
return KMemoryInfo.Pool.Allocate().Set(
AddrSpaceEnd,
~AddrSpaceEnd + 1,
MemoryState.Reserved,
@@ -2544,10 +2544,10 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
KMemoryPermission firstPermission = info.Permission;
MemoryAttribute firstAttribute = info.Attribute;
do
info = currBlock.GetInfo(info);
while (info.Address + info.Size - 1 < endAddr - 1 && (currBlock = currBlock.Successor) != null)
{
info = currBlock.GetInfo();
// Check if the block state matches what we expect.
if (firstState != info.State ||
firstPermission != info.Permission ||
@@ -2559,11 +2559,16 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
outState = MemoryState.Unmapped;
outPermission = KMemoryPermission.None;
outAttribute = MemoryAttribute.None;
KMemoryInfo.Pool.Release(info);
return false;
}
info = currBlock.GetInfo(info);
}
while (info.Address + info.Size - 1 < endAddr - 1 && (currBlock = currBlock.Successor) != null);
KMemoryInfo.Pool.Release(info);
outState = firstState;
outPermission = firstPermission;
@@ -2582,16 +2587,26 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
MemoryAttribute attributeMask,
MemoryAttribute attributeExpected)
{
foreach (KMemoryInfo info in IterateOverRange(address, address + size))
KMemoryBlock currBlock = _blockManager.FindBlock(address);
KMemoryInfo info = currBlock.GetInfo();
while (info.Address + info.Size - 1 < address + size - 1 && (currBlock = currBlock.Successor) != null)
{
// Check if the block state matches what we expect.
if ((info.State & stateMask) != stateExpected ||
(info.Permission & permissionMask) != permissionExpected ||
(info.Attribute & attributeMask) != attributeExpected)
{
KMemoryInfo.Pool.Release(info);
return false;
}
info = currBlock.GetInfo(info);
}
KMemoryInfo.Pool.Release(info);
return true;
}
@@ -2641,6 +2656,8 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
ulong currBaseAddr = info.Address + reservedPagesCount * PageSize;
ulong currEndAddr = info.Address + info.Size;
KMemoryInfo.Pool.Release(info);
if (aslrAddress >= regionStart &&
aslrAddress >= currBaseAddr &&
@@ -2721,6 +2738,7 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
allocationEndAddr <= regionEndAddr &&
allocationEndAddr <= currEndAddr)
{
KMemoryInfo.Pool.Release(info);
return address;
}
}
@@ -2731,9 +2749,11 @@ namespace Ryujinx.HLE.HOS.Kernel.Memory
{
break;
}
info = currBlock.GetInfo();
info = currBlock.GetInfo(info);
}
KMemoryInfo.Pool.Release(info);
return 0;
}