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...

52 Commits

Author SHA1 Message Date
GreemDev
ebc775aeb5 update compiling document 2025-11-11 12:54:34 -06:00
GreemDev
e24eb13e07 more partial ObservableProperties 2025-11-11 12:43:34 -06:00
GreemDev
c7572b5d30 chore: change BufferHolder.GetHandle() to a getter for the handle instead 2025-11-11 12:43:34 -06:00
GreemDev
2ea829f17b chore: change MultiRegionHandle GetHandles to an accessor property 2025-11-11 12:43:34 -06:00
GreemDev
9c00ffa4b1 fix conflicts 2025-11-11 12:43:34 -06:00
GreemDev
84f26f7276 language feature: field keyword & partial properties for observable properties in the UI
partial properties are from C# 13 but weren't usable for these properties
2025-11-11 12:43:34 -06:00
GreemDev
f2105d6040 chore: converted BufferHandle ToInt32 extension to an implicit int operator on BufferHandle directly. 2025-11-11 12:43:34 -06:00
GreemDev
1f3e4674b5 chore: Split SoftFloat into multiple partial class parts 2025-11-11 12:43:34 -06:00
GreemDev
342c811aca chore: Split SoftFallback into multiple partial class parts 2025-11-11 12:43:34 -06:00
GreemDev
83502494d9 some more extension members 2025-11-11 12:43:34 -06:00
GreemDev
64238e6ec3 language feature: Extension Members: More converted 2025-11-11 12:43:34 -06:00
GreemDev
36bd919c53 use extension members for StorageProviderExtensions 2025-11-11 12:43:34 -06:00
GreemDev
f1df537e76 language feature: Extension Members: HLE <-> UI enum converters 2025-11-11 12:43:34 -06:00
GreemDev
f9e71a5908 Parse UI enum directly 2025-11-11 12:43:34 -06:00
GreemDev
f20291ddf2 language feature: Extension Members: Misc enum extensions methods converted to properties 2025-11-11 12:43:34 -06:00
GreemDev
cc80621a17 language feature: Extension Members: Ryujinx.Graphics.GAL.Format 2025-11-11 12:43:34 -06:00
GreemDev
6a1dec9f91 language feature: Extension Members: OperandType 2025-11-11 12:43:34 -06:00
GreemDev
274ec74856 language feature: Extension Members: HLE 2025-11-11 12:43:34 -06:00
GreemDev
ac98ade572 language feature: Extension Members: Graphics related, enums 2025-11-11 12:43:34 -06:00
GreemDev
e23213d290 language feature: Extension Members: CPU-related, enums 2025-11-11 12:43:34 -06:00
GreemDev
6467720c5c Add .NET Runtime version in About window under Ryujinx version. 2025-11-11 12:43:34 -06:00
GreemDev
010eab44ba feature: Initial .NET 10 Support
Works as of .NET 10.0.0-preview.3.25171.5
2025-11-11 12:43:34 -06:00
GreemDev
49c70efdd5 UI: App Library: automatically remove nonexistent autoload/game dirs from the configuration upon load. 2025-11-10 19:14:29 -06:00
Babib3l
4677b749b1 fr_FR and es_ES small translation update (ryubing/ryujinx!172)
See merge request ryubing/ryujinx!172
2025-11-10 17:35:17 -06:00
GreemDev
ed32cd6999 fix nested project error when building 2025-11-10 13:32:40 -06:00
GreemDev
d7e2d4534a [ci skip] fix new SDL projects showing up in an src folder in the IDE (idk how I didn't see that before) 2025-11-10 00:12:39 -06:00
LotP
3c3e14c819 Update .gitattributes (ryubing/ryujinx!213)
See merge request ryubing/ryujinx!213
2025-11-09 19:03:01 -06:00
Godzilaa4
dd9ba05e36 Updated PT_BR translation (ryubing/ryujinx!208)
See merge request ryubing/ryujinx!208
2025-11-09 14:36:44 -06:00
Maki
a49822470c fix: crash when connecting a joycon (ryubing/ryujinx!211)
See merge request ryubing/ryujinx!211
2025-11-09 13:35:16 -06:00
GreemDev
58be57bf73 chore: [ci skip] rename InputElement_OnGotFocus/OnLostFocus to fit what it's listening to better 2025-11-08 03:21:54 -06:00
shinyoyo
17d5d6e65a Updated Simplified Chinese translation. (ryubing/ryujinx!209)
See merge request ryubing/ryujinx!209
2025-11-08 03:16:17 -06:00
GreemDev
1dac06e394 misc: [ci skip] remove duplicate log when setting audio backend 2025-11-08 00:18:23 -06:00
GreemDev
ed89ffd3f8 fix: add back compat functionality to the AudioBackend enum as well, and add missing migration comment from config version 70 2025-11-07 22:23:13 -06:00
GreemDev
844d7a9cfe fix: broken arrow in log 2025-11-07 22:14:35 -06:00
GreemDev
cf6acba416 chore: remove debug logging from SDL update 2025-11-07 20:44:25 -06:00
GreemDev
5a9d5ee664 chore: [ci skip] Add more misc logging similar to the "loading content archive" line for loading a base game dump, to updates and DLC. 2025-11-07 15:14:43 -06:00
GreemDev
bbad867319 add back the SDL2 enum for back compatibility so existing configs are not entirely reset upon loading the version with SDL3 2025-11-07 15:02:29 -06:00
Maki
a8ace3d23c chore: SDL3 (ryubing/ryujinx!207)
See merge request ryubing/ryujinx!207
2025-11-07 14:43:48 -06:00
GreemDev
13b69aedfe idea: Catch HorizonResultExceptions of result type ResultFsNonRealDataVerificationFailed
- log a more clear error message as to what 2002-4604 means for the user
- and return the result from the FileSystemProxy IStorage to pass the invalid data handling to the game instead of stopping emulation there and then.
  - this may be changed. i'm pretty sure this error is only thrown when you actually have integrity checking enabled in settings, so maybe it crashing with a friendler message is more desired than potentially continuing execution. we will see
2025-11-06 23:40:16 -06:00
GreemDev
234f7ca298 Fix socket closing on shutdown
Previously, sockets were only ever closed when the game specifically requested it.

Thanks @comex on GitHub for the patch submitted via the issues page.

Co-Authored-By: comex <47517+comex@users.noreply.github.com>
2025-11-04 20:48:36 -06:00
LotP
2c9b193018 Fix compiler warning (ryubing/ryujinx!203)
See merge request ryubing/ryujinx!203
2025-10-30 21:09:24 -05:00
LotP
92b61f9d73 Memory changes 3 (ryubing/ryujinx!202)
See merge request ryubing/ryujinx!202
2025-10-30 20:55:58 -05:00
WilliamWsyHK
ab7aeee67b Add newly translated items for zh-TW (ryubing/ryujinx!200)
See merge request ryubing/ryujinx!200
2025-10-29 18:02:54 -05:00
Hack茶ん
b991fe05d9 Update Korean translation (ryubing/ryujinx!201)
See merge request ryubing/ryujinx!201
2025-10-29 18:01:07 -05:00
GreemDev
3140ec5f05 misc: Also show an error message box and quit if the process was launched with administrator rights. 2025-10-28 20:57:03 -05:00
GreemDev
40f709ff55 misc: Add a launch guard for program files (the emulator does not work properly when put here as it does not require admin) 2025-10-28 19:04:25 -05:00
GreemDev
53aae9b584 hle: Throw a ServiceNotImplementedException instead of ArgumentException if any number arguments provided to ILibraryAppletAccessor are nonzero 2025-10-28 15:37:59 -05:00
LotP
ff9a75f895 ILibraryAppletAccessor:90 tweak (ryubing/ryujinx!199)
See merge request ryubing/ryujinx!199
2025-10-28 13:37:20 -05:00
sh0inx
3394736b07 HLE: Stub ILibraryAppletAccessor Unknown90 (ryubing/ryujinx!197)
See merge request ryubing/ryujinx!197
2025-10-27 12:48:17 -05:00
yeager
b06846aa5e Updated Swedish translation (with updated branch) (ryubing/ryujinx!156)
See merge request ryubing/ryujinx!156
2025-10-27 02:47:59 -05:00
LotP
c94ffaa00a gpu allocation optimizations (ryubing/ryujinx!195)
See merge request ryubing/ryujinx!195
2025-10-26 14:14:51 -05:00
GreemDev
718652599d UI: Prevent null ldn game model arrays from entering the SetEntries method 2025-10-26 12:51:08 -05:00
271 changed files with 8638 additions and 8034 deletions

1
.gitattributes vendored
View File

@@ -2,3 +2,4 @@
# Set default behavior to automatically normalize line endings. # Set default behavior to automatically normalize line endings.
############################################################################### ###############################################################################
* text=auto eol=lf * text=auto eol=lf
*.json text eol=lf

View File

@@ -5,7 +5,7 @@ If you wish to build the emulator yourself, follow these steps:
### Step 1 ### Step 1
Install the [.NET 9.0 (or higher) SDK](https://dotnet.microsoft.com/download/dotnet/9.0). Install the [.NET 10.0 (or higher) SDK](https://dotnet.microsoft.com/en-us/download/dotnet/10.0).
Make sure your SDK version is higher or equal to the required version specified in [global.json](global.json). Make sure your SDK version is higher or equal to the required version specified in [global.json](global.json).
### Step 2 ### Step 2

View File

@@ -1,6 +1,6 @@
<Project> <Project>
<PropertyGroup> <PropertyGroup>
<TargetFramework>net9.0</TargetFramework> <TargetFramework>net10.0</TargetFramework>
<LangVersion>latest</LangVersion> <LangVersion>preview</LangVersion>
</PropertyGroup> </PropertyGroup>
</Project> </Project>

View File

@@ -16,6 +16,7 @@
<PackageVersion Include="Projektanker.Icons.Avalonia" Version="9.6.2" /> <PackageVersion Include="Projektanker.Icons.Avalonia" Version="9.6.2" />
<PackageVersion Include="Projektanker.Icons.Avalonia.FontAwesome" Version="9.6.2" /> <PackageVersion Include="Projektanker.Icons.Avalonia.FontAwesome" Version="9.6.2" />
<PackageVersion Include="Projektanker.Icons.Avalonia.MaterialDesign" Version="9.6.2" /> <PackageVersion Include="Projektanker.Icons.Avalonia.MaterialDesign" Version="9.6.2" />
<PackageVersion Include="ppy.SDL3-CS" Version="2025.920.0" />
<PackageVersion Include="CommandLineParser" Version="2.9.1" /> <PackageVersion Include="CommandLineParser" Version="2.9.1" />
<PackageVersion Include="CommunityToolkit.Mvvm" Version="8.4.0" /> <PackageVersion Include="CommunityToolkit.Mvvm" Version="8.4.0" />
<PackageVersion Include="Concentus" Version="2.2.2" /> <PackageVersion Include="Concentus" Version="2.2.2" />
@@ -41,7 +42,6 @@
<PackageVersion Include="Ryujinx.Graphics.Nvdec.Dependencies.AllArch" Version="6.1.2-build3" /> <PackageVersion Include="Ryujinx.Graphics.Nvdec.Dependencies.AllArch" Version="6.1.2-build3" />
<PackageVersion Include="Ryujinx.Graphics.Vulkan.Dependencies.MoltenVK" Version="1.2.0" /> <PackageVersion Include="Ryujinx.Graphics.Vulkan.Dependencies.MoltenVK" Version="1.2.0" />
<PackageVersion Include="Ryujinx.LibHac" Version="0.21.0-alpha.126" /> <PackageVersion Include="Ryujinx.LibHac" Version="0.21.0-alpha.126" />
<PackageVersion Include="Ryujinx.SDL2-CS" Version="2.30.0-build32" />
<PackageVersion Include="Ryujinx.UpdateClient" Version="1.0.44" /> <PackageVersion Include="Ryujinx.UpdateClient" Version="1.0.44" />
<PackageVersion Include="Ryujinx.Systems.Update.Common" Version="1.0.44" /> <PackageVersion Include="Ryujinx.Systems.Update.Common" Version="1.0.44" />
<PackageVersion Include="Gommon" Version="2.8.0.1" /> <PackageVersion Include="Gommon" Version="2.8.0.1" />

View File

@@ -66,7 +66,7 @@ If you are planning to contribute or just want to learn more about this project
- **Audio** - **Audio**
Audio output is entirely supported, audio input (microphone) isn't supported. Audio output is entirely supported, audio input (microphone) isn't supported.
We use C# wrappers for [OpenAL](https://openal-soft.org/), and [SDL2](https://www.libsdl.org/) & [libsoundio](http://libsound.io/) as fallbacks. We use C# wrappers for [OpenAL](https://openal-soft.org/), and [SDL3](https://www.libsdl.org/) & [libsoundio](http://libsound.io/) as fallbacks.
- **CPU** - **CPU**

View File

@@ -45,17 +45,15 @@ Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Graphics.Vic", "src
EndProject EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Graphics.Video", "src\Ryujinx.Graphics.Video\Ryujinx.Graphics.Video.csproj", "{FD4A2C14-8E3D-4957-ABBE-3C38897B3E2D}" Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Graphics.Video", "src\Ryujinx.Graphics.Video\Ryujinx.Graphics.Video.csproj", "{FD4A2C14-8E3D-4957-ABBE-3C38897B3E2D}"
EndProject EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.SDL3", "src\Ryujinx.Audio.Backends.SDL3\Ryujinx.Audio.Backends.SDL3.csproj", "{988E6191-82E1-4E13-9DDB-CB9FA2FDAF29}"
EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.OpenAL", "src\Ryujinx.Audio.Backends.OpenAL\Ryujinx.Audio.Backends.OpenAL.csproj", "{0BE11899-DF2D-4BDE-B9EE-2489E8D35E7D}" Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.OpenAL", "src\Ryujinx.Audio.Backends.OpenAL\Ryujinx.Audio.Backends.OpenAL.csproj", "{0BE11899-DF2D-4BDE-B9EE-2489E8D35E7D}"
EndProject EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.SoundIo", "src\Ryujinx.Audio.Backends.SoundIo\Ryujinx.Audio.Backends.SoundIo.csproj", "{716364DE-B988-41A6-BAB4-327964266ECC}" Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.SoundIo", "src\Ryujinx.Audio.Backends.SoundIo\Ryujinx.Audio.Backends.SoundIo.csproj", "{716364DE-B988-41A6-BAB4-327964266ECC}"
EndProject EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Input", "src\Ryujinx.Input\Ryujinx.Input.csproj", "{C16F112F-38C3-40BC-9F5F-4791112063D6}" Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Input", "src\Ryujinx.Input\Ryujinx.Input.csproj", "{C16F112F-38C3-40BC-9F5F-4791112063D6}"
EndProject EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Input.SDL2", "src\Ryujinx.Input.SDL2\Ryujinx.Input.SDL2.csproj", "{DFAB6F2D-B9BF-4AFF-B22B-7684A328EBA3}" Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Input.SDL3", "src\Ryujinx.Input.SDL3\Ryujinx.Input.SDL3.csproj", "{D728444C-3D1F-4A0E-B4C9-5C9375D47EA3}"
EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.SDL2.Common", "src\Ryujinx.SDL2.Common\Ryujinx.SDL2.Common.csproj", "{2D5D3A1D-5730-4648-B0AB-06C53CB910C0}"
EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.SDL2", "src\Ryujinx.Audio.Backends.SDL2\Ryujinx.Audio.Backends.SDL2.csproj", "{D99A395A-8569-4DB0-B336-900647890052}"
EndProject EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Graphics.Nvdec.FFmpeg", "src\Ryujinx.Graphics.Nvdec.FFmpeg\Ryujinx.Graphics.Nvdec.FFmpeg.csproj", "{BEE1C184-C9A4-410B-8DFC-FB74D5C93AEB}" Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Graphics.Nvdec.FFmpeg", "src\Ryujinx.Graphics.Nvdec.FFmpeg\Ryujinx.Graphics.Nvdec.FFmpeg.csproj", "{BEE1C184-C9A4-410B-8DFC-FB74D5C93AEB}"
EndProject EndProject
@@ -79,12 +77,15 @@ Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.HLE.Generators", "s
EndProject EndProject
Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "Ryujinx.BuildValidationTasks", "src\Ryujinx.BuildValidationTasks\Ryujinx.BuildValidationTasks.csproj", "{4A89A234-4F19-497D-A576-DDE8CDFC5B22}" Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "Ryujinx.BuildValidationTasks", "src\Ryujinx.BuildValidationTasks\Ryujinx.BuildValidationTasks.csproj", "{4A89A234-4F19-497D-A576-DDE8CDFC5B22}"
EndProject EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.SDL3.Common", "src\Ryujinx.SDL3.Common\Ryujinx.SDL3.Common.csproj", "{F6F9826A-BC58-4D78-A700-F358A66B2B06}"
EndProject
Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Solution Items", "Solution Items", "{36F870C1-3E5F-485F-B426-F0645AF78751}" Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Solution Items", "Solution Items", "{36F870C1-3E5F-485F-B426-F0645AF78751}"
ProjectSection(SolutionItems) = preProject ProjectSection(SolutionItems) = preProject
.editorconfig = .editorconfig .editorconfig = .editorconfig
.github\workflows\build.yml = .github\workflows\build.yml .github\workflows\build.yml = .github\workflows\build.yml
.github\workflows\canary.yml = .github\workflows\canary.yml .github\workflows\canary.yml = .github\workflows\canary.yml
Directory.Packages.props = Directory.Packages.props Directory.Packages.props = Directory.Packages.props
Directory.Build.props = Directory.Build.props
.github\workflows\release.yml = .github\workflows\release.yml .github\workflows\release.yml = .github\workflows\release.yml
nuget.config = nuget.config nuget.config = nuget.config
EndProjectSection EndProjectSection
@@ -92,164 +93,468 @@ EndProject
Global Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution GlobalSection(SolutionConfigurationPlatforms) = preSolution
Debug|Any CPU = Debug|Any CPU Debug|Any CPU = Debug|Any CPU
Debug|x64 = Debug|x64
Debug|x86 = Debug|x86
Release|Any CPU = Release|Any CPU Release|Any CPU = Release|Any CPU
Release|x64 = Release|x64
Release|x86 = Release|x86
EndGlobalSection EndGlobalSection
GlobalSection(ProjectConfigurationPlatforms) = postSolution GlobalSection(ProjectConfigurationPlatforms) = postSolution
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|Any CPU.ActiveCfg = Debug|Any CPU {EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|Any CPU.Build.0 = Debug|Any CPU {EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|Any CPU.Build.0 = Debug|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|x64.ActiveCfg = Debug|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|x64.Build.0 = Debug|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|x86.ActiveCfg = Debug|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|x86.Build.0 = Debug|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|Any CPU.ActiveCfg = Release|Any CPU {EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|Any CPU.ActiveCfg = Release|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|Any CPU.Build.0 = Release|Any CPU {EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|Any CPU.Build.0 = Release|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|x64.ActiveCfg = Release|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|x64.Build.0 = Release|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|x86.ActiveCfg = Release|Any CPU
{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|x86.Build.0 = Release|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Debug|Any CPU.ActiveCfg = Debug|Any CPU {D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Debug|Any CPU.Build.0 = Debug|Any CPU {D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Debug|Any CPU.Build.0 = Debug|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Debug|x64.ActiveCfg = Debug|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Debug|x64.Build.0 = Debug|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Debug|x86.ActiveCfg = Debug|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Debug|x86.Build.0 = Debug|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Release|Any CPU.ActiveCfg = Release|Any CPU {D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Release|Any CPU.ActiveCfg = Release|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Release|Any CPU.Build.0 = Release|Any CPU {D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Release|Any CPU.Build.0 = Release|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Release|x64.ActiveCfg = Release|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Release|x64.Build.0 = Release|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Release|x86.ActiveCfg = Release|Any CPU
{D8F72938-78EF-4E8C-BAFE-531C9C3C8F15}.Release|x86.Build.0 = Release|Any CPU
{CB92CFF9-1D62-4D4F-9E88-8130EF61E351}.Debug|Any CPU.ActiveCfg = Debug|Any CPU {CB92CFF9-1D62-4D4F-9E88-8130EF61E351}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
{CB92CFF9-1D62-4D4F-9E88-8130EF61E351}.Debug|Any CPU.Build.0 = Debug|Any CPU {CB92CFF9-1D62-4D4F-9E88-8130EF61E351}.Debug|Any CPU.Build.0 = Debug|Any CPU
{CB92CFF9-1D62-4D4F-9E88-8130EF61E351}.Debug|x64.ActiveCfg = Debug|Any CPU
{CB92CFF9-1D62-4D4F-9E88-8130EF61E351}.Debug|x64.Build.0 = Debug|Any CPU
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EndGlobalSection EndGlobalSection
GlobalSection(SolutionProperties) = preSolution GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE HideSolutionNode = FALSE

File diff suppressed because it is too large Load Diff

View File

@@ -2,8 +2,8 @@
SCRIPT_DIR=$(dirname "$(realpath "$0")") SCRIPT_DIR=$(dirname "$(realpath "$0")")
if [ -f "$SCRIPT_DIR/Ryujinx.Headless.SDL2" ]; then if [ -f "$SCRIPT_DIR/Ryujinx.Headless.SDL3" ]; then
RYUJINX_BIN="Ryujinx.Headless.SDL2" RYUJINX_BIN="Ryujinx.Headless.SDL3"
fi fi
if [ -f "$SCRIPT_DIR/Ryujinx" ]; then if [ -f "$SCRIPT_DIR/Ryujinx" ]; then

View File

@@ -43,7 +43,7 @@ fi
ARM64_OUTPUT="$TEMP_DIRECTORY/publish_arm64" ARM64_OUTPUT="$TEMP_DIRECTORY/publish_arm64"
X64_OUTPUT="$TEMP_DIRECTORY/publish_x64" X64_OUTPUT="$TEMP_DIRECTORY/publish_x64"
UNIVERSAL_OUTPUT="$OUTPUT_DIRECTORY/publish" UNIVERSAL_OUTPUT="$OUTPUT_DIRECTORY/publish"
EXECUTABLE_SUB_PATH=Ryujinx.Headless.SDL2 EXECUTABLE_SUB_PATH=Ryujinx.Headless.SDL3
rm -rf "$TEMP_DIRECTORY" rm -rf "$TEMP_DIRECTORY"
mkdir -p "$TEMP_DIRECTORY" mkdir -p "$TEMP_DIRECTORY"
@@ -51,9 +51,9 @@ mkdir -p "$TEMP_DIRECTORY"
DOTNET_COMMON_ARGS=(-p:DebugType=embedded -p:Version="$VERSION" -p:SourceRevisionId="$SOURCE_REVISION_ID" --self-contained true $EXTRA_ARGS) DOTNET_COMMON_ARGS=(-p:DebugType=embedded -p:Version="$VERSION" -p:SourceRevisionId="$SOURCE_REVISION_ID" --self-contained true $EXTRA_ARGS)
dotnet restore dotnet restore
dotnet build -c "$CONFIGURATION" src/Ryujinx.Headless.SDL2 dotnet build -c "$CONFIGURATION" src/Ryujinx.Headless.SDL3
dotnet publish -c "$CONFIGURATION" -r osx-arm64 -o "$TEMP_DIRECTORY/publish_arm64" "${DOTNET_COMMON_ARGS[@]}" src/Ryujinx.Headless.SDL2 dotnet publish -c "$CONFIGURATION" -r osx-arm64 -o "$TEMP_DIRECTORY/publish_arm64" "${DOTNET_COMMON_ARGS[@]}" src/Ryujinx.Headless.SDL3
dotnet publish -c "$CONFIGURATION" -r osx-x64 -o "$TEMP_DIRECTORY/publish_x64" "${DOTNET_COMMON_ARGS[@]}" src/Ryujinx.Headless.SDL2 dotnet publish -c "$CONFIGURATION" -r osx-x64 -o "$TEMP_DIRECTORY/publish_x64" "${DOTNET_COMMON_ARGS[@]}" src/Ryujinx.Headless.SDL3
# Get rid of the support library for ARMeilleure for x64 (that's only for arm64) # Get rid of the support library for ARMeilleure for x64 (that's only for arm64)
rm -rf "$TEMP_DIRECTORY/publish_x64/libarmeilleure-jitsupport.dylib" rm -rf "$TEMP_DIRECTORY/publish_x64/libarmeilleure-jitsupport.dylib"
@@ -115,8 +115,8 @@ fi
echo "Creating archive" echo "Creating archive"
pushd "$OUTPUT_DIRECTORY" pushd "$OUTPUT_DIRECTORY"
tar --exclude "publish/Ryujinx.Headless.SDL2" -cvf "$RELEASE_TAR_FILE_NAME" publish 1> /dev/null tar --exclude "publish/Ryujinx.Headless.SDL3" -cvf "$RELEASE_TAR_FILE_NAME" publish 1> /dev/null
python3 "$BASE_DIR/distribution/misc/add_tar_exec.py" "$RELEASE_TAR_FILE_NAME" "publish/Ryujinx.Headless.SDL2" "publish/Ryujinx.Headless.SDL2" python3 "$BASE_DIR/distribution/misc/add_tar_exec.py" "$RELEASE_TAR_FILE_NAME" "publish/Ryujinx.Headless.SDL3" "publish/Ryujinx.Headless.SDL3"
gzip -9 < "$RELEASE_TAR_FILE_NAME" > "$RELEASE_TAR_FILE_NAME.gz" gzip -9 < "$RELEASE_TAR_FILE_NAME" > "$RELEASE_TAR_FILE_NAME.gz"
rm "$RELEASE_TAR_FILE_NAME" rm "$RELEASE_TAR_FILE_NAME"
popd popd

View File

@@ -8,7 +8,7 @@ Intro to Ryujinx
Ryujinx is an open-source Nintendo Switch emulator, created by gdkchan, written in C#. Ryujinx is an open-source Nintendo Switch emulator, created by gdkchan, written in C#.
* The CPU emulator, ARMeilleure, emulates an ARMv8 CPU and currently has support for most 64-bit ARMv8 and some of the ARMv7 (and older) instructions. * The CPU emulator, ARMeilleure, emulates an ARMv8 CPU and currently has support for most 64-bit ARMv8 and some of the ARMv7 (and older) instructions.
* The GPU emulator emulates the Switch's Maxwell GPU using either the OpenGL (version 4.5 minimum), Vulkan, or Metal (via MoltenVK) APIs through a custom build of OpenTK or Silk.NET respectively. * The GPU emulator emulates the Switch's Maxwell GPU using either the OpenGL (version 4.5 minimum), Vulkan, or Metal (via MoltenVK) APIs through a custom build of OpenTK or Silk.NET respectively.
* Audio output is entirely supported via C# wrappers for SDL2, with OpenAL & libsoundio as fallbacks. * Audio output is entirely supported via C# wrappers for SDL3, with OpenAL & libsoundio as fallbacks.
Getting Started Getting Started
=============== ===============

View File

@@ -1,6 +1,6 @@
{ {
"sdk": { "sdk": {
"version": "9.0.100", "version": "10.0.100",
"rollForward": "latestFeature" "rollForward": "latestFeature"
} }
} }

View File

@@ -25,9 +25,9 @@ namespace ARMeilleure.CodeGen.Arm64
static class ComparisonArm64Extensions static class ComparisonArm64Extensions
{ {
public static ArmCondition ToArmCondition(this Comparison comp) extension(Comparison comparison)
{ {
return comp switch public ArmCondition Arm => comparison switch
{ {
#pragma warning disable IDE0055 // Disable formatting #pragma warning disable IDE0055 // Disable formatting
Comparison.Equal => ArmCondition.Eq, Comparison.Equal => ArmCondition.Eq,
@@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.Arm64
Comparison.LessUI => ArmCondition.LtUn, Comparison.LessUI => ArmCondition.LtUn,
#pragma warning restore IDE0055 #pragma warning restore IDE0055
_ => throw new ArgumentException(null, nameof(comp)), _ => throw new ArgumentException(null, nameof(comparison))
}; };
} }
} }

View File

@@ -181,10 +181,10 @@ namespace ARMeilleure.CodeGen.Arm64
public void Fmov(Operand rd, Operand rn, bool topHalf) public void Fmov(Operand rd, Operand rn, bool topHalf)
{ {
Debug.Assert(rd.Type.IsInteger() != rn.Type.IsInteger()); Debug.Assert(rd.Type.IsInteger != rn.Type.IsInteger);
Debug.Assert(rd.Type == OperandType.I64 || rn.Type == OperandType.I64 || !topHalf); Debug.Assert(rd.Type == OperandType.I64 || rn.Type == OperandType.I64 || !topHalf);
uint opcode = rd.Type.IsInteger() ? 0b110u : 0b111u; uint opcode = rd.Type.IsInteger ? 0b110u : 0b111u;
uint rmode = topHalf ? 1u << 19 : 0u; uint rmode = topHalf ? 1u << 19 : 0u;
uint ftype = rd.Type == OperandType.FP64 || rn.Type == OperandType.FP64 ? 1u << 22 : 0u; uint ftype = rd.Type == OperandType.FP64 || rn.Type == OperandType.FP64 ? 1u << 22 : 0u;
@@ -411,7 +411,7 @@ namespace ARMeilleure.CodeGen.Arm64
public void Mov(Operand rd, Operand rn) public void Mov(Operand rd, Operand rn)
{ {
if (rd.Type.IsInteger()) if (rd.Type.IsInteger)
{ {
Orr(rd, Factory.Register(ZrRegister, RegisterType.Integer, rd.Type), rn); Orr(rd, Factory.Register(ZrRegister, RegisterType.Integer, rd.Type), rn);
} }
@@ -973,7 +973,7 @@ namespace ARMeilleure.CodeGen.Arm64
uint instruction; uint instruction;
int scale; int scale;
if (type.IsInteger()) if (type.IsInteger)
{ {
instruction = intInst; instruction = intInst;
@@ -1009,7 +1009,7 @@ namespace ARMeilleure.CodeGen.Arm64
{ {
uint instruction; uint instruction;
if (type.IsInteger()) if (type.IsInteger)
{ {
instruction = intInst; instruction = intInst;

View File

@@ -250,7 +250,7 @@ namespace ARMeilleure.CodeGen.Arm64
// ValidateBinOp(dest, src1, src2); // ValidateBinOp(dest, src1, src2);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Add(dest, src1, src2); context.Assembler.Add(dest, src1, src2);
} }
@@ -268,7 +268,7 @@ namespace ARMeilleure.CodeGen.Arm64
ValidateBinOp(dest, src1, src2); ValidateBinOp(dest, src1, src2);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.And(dest, src1, src2); context.Assembler.And(dest, src1, src2);
} }
@@ -281,7 +281,7 @@ namespace ARMeilleure.CodeGen.Arm64
ValidateBinOp(dest, src1, src2); ValidateBinOp(dest, src1, src2);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Eor(dest, src1, src2); context.Assembler.Eor(dest, src1, src2);
} }
@@ -298,7 +298,7 @@ namespace ARMeilleure.CodeGen.Arm64
ValidateUnOp(dest, source); ValidateUnOp(dest, source);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Mvn(dest, source); context.Assembler.Mvn(dest, source);
} }
@@ -311,7 +311,7 @@ namespace ARMeilleure.CodeGen.Arm64
ValidateBinOp(dest, src1, src2); ValidateBinOp(dest, src1, src2);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Orr(dest, src1, src2); context.Assembler.Orr(dest, src1, src2);
} }
@@ -322,7 +322,7 @@ namespace ARMeilleure.CodeGen.Arm64
Debug.Assert(comp.Kind == OperandKind.Constant); Debug.Assert(comp.Kind == OperandKind.Constant);
ArmCondition cond = ((Comparison)comp.AsInt32()).ToArmCondition(); ArmCondition cond = ((Comparison)comp.AsInt32()).Arm;
GenerateCompareCommon(context, operation); GenerateCompareCommon(context, operation);
@@ -336,7 +336,7 @@ namespace ARMeilleure.CodeGen.Arm64
ValidateUnOp(dest, source); ValidateUnOp(dest, source);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Rev(dest, source); context.Assembler.Rev(dest, source);
} }
@@ -354,7 +354,7 @@ namespace ARMeilleure.CodeGen.Arm64
Debug.Assert(dest.Type == OperandType.I32); Debug.Assert(dest.Type == OperandType.I32);
Debug.Assert(comp.Kind == OperandKind.Constant); Debug.Assert(comp.Kind == OperandKind.Constant);
ArmCondition cond = ((Comparison)comp.AsInt32()).ToArmCondition(); ArmCondition cond = ((Comparison)comp.AsInt32()).Arm;
GenerateCompareCommon(context, operation); GenerateCompareCommon(context, operation);
@@ -428,7 +428,7 @@ namespace ARMeilleure.CodeGen.Arm64
EnsureSameType(src1, src2); EnsureSameType(src1, src2);
Debug.Assert(src1.Type.IsInteger()); Debug.Assert(src1.Type.IsInteger);
context.Assembler.Cmp(src1, src2); context.Assembler.Cmp(src1, src2);
} }
@@ -442,7 +442,7 @@ namespace ARMeilleure.CodeGen.Arm64
EnsureSameType(dest, src2, src3); EnsureSameType(dest, src2, src3);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
Debug.Assert(src1.Type == OperandType.I32); Debug.Assert(src1.Type == OperandType.I32);
context.Assembler.Cmp(src1, Const(src1.Type, 0)); context.Assembler.Cmp(src1, Const(src1.Type, 0));
@@ -468,7 +468,7 @@ namespace ARMeilleure.CodeGen.Arm64
Debug.Assert(dest.Type != source.Type); Debug.Assert(dest.Type != source.Type);
Debug.Assert(source.Type != OperandType.V128); Debug.Assert(source.Type != OperandType.V128);
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
context.Assembler.ScvtfScalar(dest, source); context.Assembler.ScvtfScalar(dest, source);
} }
@@ -485,7 +485,7 @@ namespace ARMeilleure.CodeGen.Arm64
Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64); Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64);
Debug.Assert(dest.Type != source.Type); Debug.Assert(dest.Type != source.Type);
Debug.Assert(source.Type.IsInteger()); Debug.Assert(source.Type.IsInteger);
context.Assembler.UcvtfScalar(dest, source); context.Assembler.UcvtfScalar(dest, source);
} }
@@ -497,7 +497,7 @@ namespace ARMeilleure.CodeGen.Arm64
EnsureSameType(dest, source); EnsureSameType(dest, source);
Debug.Assert(dest.Type.IsInteger() || source.Kind != OperandKind.Constant); Debug.Assert(dest.Type.IsInteger || source.Kind != OperandKind.Constant);
// Moves to the same register are useless. // Moves to the same register are useless.
if (dest.Kind == source.Kind && dest.Value == source.Value) if (dest.Kind == source.Kind && dest.Value == source.Value)
@@ -529,7 +529,7 @@ namespace ARMeilleure.CodeGen.Arm64
EnsureSameType(dest, source); EnsureSameType(dest, source);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Clz(dest, source); context.Assembler.Clz(dest, source);
} }
@@ -542,7 +542,7 @@ namespace ARMeilleure.CodeGen.Arm64
ValidateBinOp(dest, dividend, divisor); ValidateBinOp(dest, dividend, divisor);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Sdiv(dest, dividend, divisor); context.Assembler.Sdiv(dest, dividend, divisor);
} }
@@ -576,7 +576,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand value = operation.Destination; Operand value = operation.Destination;
Operand address = operation.GetSource(0); Operand address = operation.GetSource(0);
Debug.Assert(value.Type.IsInteger()); Debug.Assert(value.Type.IsInteger);
context.Assembler.LdrhRiUn(value, address, 0); context.Assembler.LdrhRiUn(value, address, 0);
} }
@@ -586,7 +586,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand value = operation.Destination; Operand value = operation.Destination;
Operand address = operation.GetSource(0); Operand address = operation.GetSource(0);
Debug.Assert(value.Type.IsInteger()); Debug.Assert(value.Type.IsInteger);
context.Assembler.LdrbRiUn(value, address, 0); context.Assembler.LdrbRiUn(value, address, 0);
} }
@@ -604,7 +604,7 @@ namespace ARMeilleure.CodeGen.Arm64
EnsureSameType(dest, src1, src2); EnsureSameType(dest, src1, src2);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Mul(dest, src1, src2); context.Assembler.Mul(dest, src1, src2);
} }
@@ -647,7 +647,7 @@ namespace ARMeilleure.CodeGen.Arm64
ValidateUnOp(dest, source); ValidateUnOp(dest, source);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Neg(dest, source); context.Assembler.Neg(dest, source);
} }
@@ -732,7 +732,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Sxth(dest, source); context.Assembler.Sxth(dest, source);
} }
@@ -742,7 +742,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Sxtw(dest, source); context.Assembler.Sxtw(dest, source);
} }
@@ -752,7 +752,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Sxtb(dest, source); context.Assembler.Sxtb(dest, source);
} }
@@ -823,7 +823,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand value = operation.GetSource(1); Operand value = operation.GetSource(1);
Operand address = operation.GetSource(0); Operand address = operation.GetSource(0);
Debug.Assert(value.Type.IsInteger()); Debug.Assert(value.Type.IsInteger);
context.Assembler.StrhRiUn(value, address, 0); context.Assembler.StrhRiUn(value, address, 0);
} }
@@ -833,7 +833,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand value = operation.GetSource(1); Operand value = operation.GetSource(1);
Operand address = operation.GetSource(0); Operand address = operation.GetSource(0);
Debug.Assert(value.Type.IsInteger()); Debug.Assert(value.Type.IsInteger);
context.Assembler.StrbRiUn(value, address, 0); context.Assembler.StrbRiUn(value, address, 0);
} }
@@ -858,7 +858,7 @@ namespace ARMeilleure.CodeGen.Arm64
// ValidateBinOp(dest, src1, src2); // ValidateBinOp(dest, src1, src2);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Sub(dest, src1, src2); context.Assembler.Sub(dest, src1, src2);
} }
@@ -882,7 +882,7 @@ namespace ARMeilleure.CodeGen.Arm64
if (dest != default) if (dest != default)
{ {
Debug.Assert(!dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger && source.Type.IsInteger);
OperandType destType = source.Type == OperandType.I64 ? OperandType.FP64 : OperandType.FP32; OperandType destType = source.Type == OperandType.I64 ? OperandType.FP64 : OperandType.FP32;
@@ -901,9 +901,9 @@ namespace ARMeilleure.CodeGen.Arm64
byte index = src2.AsByte(); byte index = src2.AsByte();
Debug.Assert(index < OperandType.V128.GetSizeInBytes() / dest.Type.GetSizeInBytes()); Debug.Assert(index < OperandType.V128.ByteSize / dest.Type.ByteSize);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Umov(dest, src1, index, dest.Type == OperandType.I64 ? 3 : 2); context.Assembler.Umov(dest, src1, index, dest.Type == OperandType.I64 ? 3 : 2);
} }
@@ -959,7 +959,7 @@ namespace ARMeilleure.CodeGen.Arm64
byte index = src3.AsByte(); byte index = src3.AsByte();
if (src2.Type.IsInteger()) if (src2.Type.IsInteger)
{ {
context.Assembler.Ins(dest, src2, index, src2.Type == OperandType.I64 ? 3 : 2); context.Assembler.Ins(dest, src2, index, src2.Type == OperandType.I64 ? 3 : 2);
} }
@@ -1007,7 +1007,7 @@ namespace ARMeilleure.CodeGen.Arm64
{ {
Operand dest = operation.Destination; Operand dest = operation.Destination;
Debug.Assert(!dest.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger);
context.Assembler.CmeqVector(dest, dest, dest, 2); context.Assembler.CmeqVector(dest, dest, dest, 2);
} }
@@ -1016,7 +1016,7 @@ namespace ARMeilleure.CodeGen.Arm64
{ {
Operand dest = operation.Destination; Operand dest = operation.Destination;
Debug.Assert(!dest.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger);
context.Assembler.EorVector(dest, dest, dest); context.Assembler.EorVector(dest, dest, dest);
} }
@@ -1046,7 +1046,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Uxth(dest, source); context.Assembler.Uxth(dest, source);
} }
@@ -1056,7 +1056,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
// We can eliminate the move if source is already 32-bit and the registers are the same. // We can eliminate the move if source is already 32-bit and the registers are the same.
if (dest.Value == source.Value && source.Type == OperandType.I32) if (dest.Value == source.Value && source.Type == OperandType.I32)
@@ -1072,7 +1072,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Uxtb(dest, source); context.Assembler.Uxtb(dest, source);
} }
@@ -1169,7 +1169,7 @@ namespace ARMeilleure.CodeGen.Arm64
context.Assembler.StrRiPre(Register(reg, type), Register(SpRegister), -calleeSaveRegionSize); context.Assembler.StrRiPre(Register(reg, type), Register(SpRegister), -calleeSaveRegionSize);
} }
offset += type.GetSizeInBytes(); offset += type.ByteSize;
} }
while (mask != 0) while (mask != 0)
@@ -1195,7 +1195,7 @@ namespace ARMeilleure.CodeGen.Arm64
context.Assembler.StpRiPre(Register(reg, type), Register(reg2, type), Register(SpRegister), -calleeSaveRegionSize); context.Assembler.StpRiPre(Register(reg, type), Register(reg2, type), Register(SpRegister), -calleeSaveRegionSize);
} }
offset += type.GetSizeInBytes() * 2; offset += type.ByteSize * 2;
} }
} }
@@ -1273,7 +1273,7 @@ namespace ARMeilleure.CodeGen.Arm64
mask &= ~(1 << reg2); mask &= ~(1 << reg2);
offset -= type.GetSizeInBytes() * 2; offset -= type.ByteSize * 2;
if (offset != 0) if (offset != 0)
{ {
@@ -1286,7 +1286,7 @@ namespace ARMeilleure.CodeGen.Arm64
} }
else else
{ {
offset -= type.GetSizeInBytes(); offset -= type.ByteSize;
if (offset != 0) if (offset != 0)
{ {
@@ -1435,12 +1435,12 @@ namespace ARMeilleure.CodeGen.Arm64
OperandType valueType = GetMemOpValueType(currentOp); OperandType valueType = GetMemOpValueType(currentOp);
if (valueType != GetMemOpValueType(nextOp) || op1Offset + valueType.GetSizeInBytes() != op2Offset) if (valueType != GetMemOpValueType(nextOp) || op1Offset + valueType.ByteSize != op2Offset)
{ {
return false; return false;
} }
if (!CodeGenCommon.ConstFitsOnSImm7(op1Offset, valueType.GetSizeInBytesLog2())) if (!CodeGenCommon.ConstFitsOnSImm7(op1Offset, valueType.ByteSizeLog2))
{ {
return false; return false;
} }
@@ -1549,7 +1549,7 @@ namespace ARMeilleure.CodeGen.Arm64
// EnsureSameReg (dest, src1); // EnsureSameReg (dest, src1);
EnsureSameType(dest, src1); EnsureSameType(dest, src1);
Debug.Assert(dest.Type.IsInteger() && src2.Type == OperandType.I32); Debug.Assert(dest.Type.IsInteger && src2.Type == OperandType.I32);
} }
private static void EnsureSameReg(Operand op1, Operand op2) private static void EnsureSameReg(Operand op1, Operand op2)

View File

@@ -462,7 +462,7 @@ namespace ARMeilleure.CodeGen.Arm64
{ {
instruction |= (sz << 22); instruction |= (sz << 22);
if (rd.Type.IsInteger()) if (rd.Type.IsInteger)
{ {
context.Assembler.WriteInstructionAuto(instruction, rd, rn); context.Assembler.WriteInstructionAuto(instruction, rd, rn);
} }
@@ -490,7 +490,7 @@ namespace ARMeilleure.CodeGen.Arm64
instruction |= (sz << 22); instruction |= (sz << 22);
instruction |= (64 - fBits) << 10; instruction |= (64 - fBits) << 10;
if (rd.Type.IsInteger()) if (rd.Type.IsInteger)
{ {
Debug.Assert(rd.Type != OperandType.I32 || fBits <= 32); Debug.Assert(rd.Type != OperandType.I32 || fBits <= 32);

View File

@@ -112,7 +112,7 @@ namespace ARMeilleure.CodeGen.Arm64
if (src1.Kind == OperandKind.Constant) if (src1.Kind == OperandKind.Constant)
{ {
if (!src1.Type.IsInteger()) if (!src1.Type.IsInteger)
{ {
// Handle non-integer types (FP32, FP64 and V128). // Handle non-integer types (FP32, FP64 and V128).
// For instructions without an immediate operand, we do the following: // For instructions without an immediate operand, we do the following:
@@ -161,7 +161,7 @@ namespace ARMeilleure.CodeGen.Arm64
if (src2.Kind == OperandKind.Constant) if (src2.Kind == OperandKind.Constant)
{ {
if (!src2.Type.IsInteger()) if (!src2.Type.IsInteger)
{ {
src2 = AddFloatConstantCopy(constants, nodes, node, src2); src2 = AddFloatConstantCopy(constants, nodes, node, src2);
@@ -191,7 +191,7 @@ namespace ARMeilleure.CodeGen.Arm64
if (src.Kind == OperandKind.Constant) if (src.Kind == OperandKind.Constant)
{ {
if (!src.Type.IsInteger()) if (!src.Type.IsInteger)
{ {
src = AddFloatConstantCopy(constants, nodes, node, src); src = AddFloatConstantCopy(constants, nodes, node, src);
@@ -282,7 +282,7 @@ namespace ARMeilleure.CodeGen.Arm64
bool passOnReg; bool passOnReg;
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
passOnReg = intCount < intMax; passOnReg = intCount < intMax;
} }
@@ -309,7 +309,7 @@ namespace ARMeilleure.CodeGen.Arm64
if (passOnReg) if (passOnReg)
{ {
Operand argReg = source.Type.IsInteger() Operand argReg = source.Type.IsInteger
? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type) ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type); : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);
@@ -327,7 +327,7 @@ namespace ARMeilleure.CodeGen.Arm64
InsertConstantRegCopies(constants, nodes, nodes.AddBefore(node, spillOp)); InsertConstantRegCopies(constants, nodes, nodes.AddBefore(node, spillOp));
stackOffset += source.Type.GetSizeInBytes(); stackOffset += source.Type.ByteSize;
} }
} }
@@ -345,7 +345,7 @@ namespace ARMeilleure.CodeGen.Arm64
} }
else else
{ {
Operand retReg = dest.Type.IsInteger() Operand retReg = dest.Type.IsInteger
? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type) ? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type)
: Xmm(CallingConvention.GetVecReturnRegister(), dest.Type); : Xmm(CallingConvention.GetVecReturnRegister(), dest.Type);
@@ -385,7 +385,7 @@ namespace ARMeilleure.CodeGen.Arm64
bool passOnReg; bool passOnReg;
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
passOnReg = intCount + 1 < intMax; passOnReg = intCount + 1 < intMax;
} }
@@ -408,7 +408,7 @@ namespace ARMeilleure.CodeGen.Arm64
if (passOnReg) if (passOnReg)
{ {
Operand argReg = source.Type.IsInteger() Operand argReg = source.Type.IsInteger
? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type) ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type); : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);
@@ -521,7 +521,7 @@ namespace ARMeilleure.CodeGen.Arm64
} }
else else
{ {
Operand retReg = source.Type.IsInteger() Operand retReg = source.Type.IsInteger
? Gpr(CallingConvention.GetIntReturnRegister(), source.Type) ? Gpr(CallingConvention.GetIntReturnRegister(), source.Type)
: Xmm(CallingConvention.GetVecReturnRegister(), source.Type); : Xmm(CallingConvention.GetVecReturnRegister(), source.Type);
@@ -551,7 +551,7 @@ namespace ARMeilleure.CodeGen.Arm64
{ {
OperandType argType = cctx.FuncArgTypes[cIndex]; OperandType argType = cctx.FuncArgTypes[cIndex];
if (argType.IsInteger()) if (argType.IsInteger)
{ {
intCount++; intCount++;
} }
@@ -567,7 +567,7 @@ namespace ARMeilleure.CodeGen.Arm64
bool passOnReg; bool passOnReg;
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
passOnReg = intCount < CallingConvention.GetArgumentsOnRegsCount(); passOnReg = intCount < CallingConvention.GetArgumentsOnRegsCount();
} }
@@ -606,7 +606,7 @@ namespace ARMeilleure.CodeGen.Arm64
{ {
Operand pArg = Local(dest.Type); Operand pArg = Local(dest.Type);
Operand argReg = dest.Type.IsInteger() Operand argReg = dest.Type.IsInteger
? Gpr(CallingConvention.GetIntArgumentRegister(intCount), dest.Type) ? Gpr(CallingConvention.GetIntArgumentRegister(intCount), dest.Type)
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount), dest.Type); : Xmm(CallingConvention.GetVecArgumentRegister(vecCount), dest.Type);

View File

@@ -51,7 +51,7 @@ namespace ARMeilleure.CodeGen.Optimizations
if (trueSucc == block.ListNext) if (trueSucc == block.ListNext)
{ {
Comparison comp = (Comparison)branchOp.GetSource(2).AsInt32(); Comparison comp = (Comparison)branchOp.GetSource(2).AsInt32();
Comparison compInv = comp.Invert(); Comparison compInv = comp.Inverse;
branchOp.SetSource(2, Const((int)compInv)); branchOp.SetSource(2, Const((int)compInv));

View File

@@ -161,7 +161,7 @@ namespace ARMeilleure.CodeGen.Optimizations
} }
else if (otherCompType == Comparison.Equal) else if (otherCompType == Comparison.Equal)
{ {
propCompType = compType.Invert(); propCompType = compType.Inverse;
} }
else else
{ {

View File

@@ -105,7 +105,7 @@ namespace ARMeilleure.CodeGen.Optimizations
Operand x = operation.GetSource(0); Operand x = operation.GetSource(0);
Operand y = operation.GetSource(1); Operand y = operation.GetSource(1);
if (x == y && x.Type.IsInteger()) if (x == y && x.Type.IsInteger)
{ {
operation.TurnIntoCopy(Const(x.Type, 0)); operation.TurnIntoCopy(Const(x.Type, 0));
} }
@@ -161,7 +161,7 @@ namespace ARMeilleure.CodeGen.Optimizations
private static bool IsConstEqual(Operand operand, ulong comparand) private static bool IsConstEqual(Operand operand, ulong comparand)
{ {
if (operand.Kind != OperandKind.Constant || !operand.Type.IsInteger()) if (operand.Kind != OperandKind.Constant || !operand.Type.IsInteger)
{ {
return false; return false;
} }

View File

@@ -98,7 +98,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
{ {
OperandType type = types[copyDest]; OperandType type = types[copyDest];
type = type.IsInteger() ? OperandType.I64 : OperandType.V128; type = type.IsInteger ? OperandType.I64 : OperandType.V128;
EmitXorSwap(sequence, GetRegister(copyDest, type), GetRegister(copySource, type)); EmitXorSwap(sequence, GetRegister(copyDest, type), GetRegister(copySource, type));

View File

@@ -178,7 +178,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
} }
else if (dest.Kind == OperandKind.Register) else if (dest.Kind == OperandKind.Register)
{ {
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
intFixedRegisters |= 1 << dest.GetRegister().Index; intFixedRegisters |= 1 << dest.GetRegister().Index;
} }
@@ -236,7 +236,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
{ {
Register reg = info.Register.GetRegister(); Register reg = info.Register.GetRegister();
if (local.Type.IsInteger()) if (local.Type.IsInteger)
{ {
intLocalFreeRegisters |= 1 << reg.Index; intLocalFreeRegisters |= 1 << reg.Index;
} }
@@ -254,7 +254,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
if (temp == default || info.Sequence != sequence) if (temp == default || info.Sequence != sequence)
{ {
temp = local.Type.IsInteger() temp = local.Type.IsInteger
? GetSpillTemp(local, intSpillTempRegisters, ref intLocalUse) ? GetSpillTemp(local, intSpillTempRegisters, ref intLocalUse)
: GetSpillTemp(local, vecSpillTempRegisters, ref vecLocalUse); : GetSpillTemp(local, vecSpillTempRegisters, ref vecLocalUse);
@@ -335,7 +335,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
if (info.UsesAllocated == 0) if (info.UsesAllocated == 0)
{ {
int mask = dest.Type.IsInteger() int mask = dest.Type.IsInteger
? intLocalFreeRegisters ? intLocalFreeRegisters
: vecLocalFreeRegisters; : vecLocalFreeRegisters;
@@ -343,9 +343,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
{ {
int selectedReg = BitOperations.TrailingZeroCount(mask); int selectedReg = BitOperations.TrailingZeroCount(mask);
info.Register = Register(selectedReg, info.Type.ToRegisterType(), info.Type); info.Register = Register(selectedReg, info.Type.Register, info.Type);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
intLocalFreeRegisters &= ~(1 << selectedReg); intLocalFreeRegisters &= ~(1 << selectedReg);
intUsedRegisters |= 1 << selectedReg; intUsedRegisters |= 1 << selectedReg;
@@ -359,7 +359,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
else else
{ {
info.Register = default; info.Register = default;
info.SpillOffset = Const(stackAlloc.Allocate(dest.Type.GetSizeInBytes())); info.SpillOffset = Const(stackAlloc.Allocate(dest.Type.ByteSize));
} }
} }
@@ -377,7 +377,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
if (temp == default || info.Sequence != sequence) if (temp == default || info.Sequence != sequence)
{ {
temp = dest.Type.IsInteger() temp = dest.Type.IsInteger
? GetSpillTemp(dest, intSpillTempRegisters, ref intLocalAsg) ? GetSpillTemp(dest, intSpillTempRegisters, ref intLocalAsg)
: GetSpillTemp(dest, vecSpillTempRegisters, ref vecLocalAsg); : GetSpillTemp(dest, vecSpillTempRegisters, ref vecLocalAsg);
@@ -443,7 +443,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
useMask |= 1 << selectedReg; useMask |= 1 << selectedReg;
return Register(selectedReg, local.Type.ToRegisterType(), local.Type); return Register(selectedReg, local.Type.Register, local.Type);
} }
private static int UsesCount(Operand local) private static int UsesCount(Operand local)

View File

@@ -208,7 +208,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
private bool TryAllocateRegWithoutSpill(AllocationContext context, LiveInterval current, int cIndex, int registersCount) private bool TryAllocateRegWithoutSpill(AllocationContext context, LiveInterval current, int cIndex, int registersCount)
{ {
RegisterType regType = current.Local.Type.ToRegisterType(); RegisterType regType = current.Local.Type.Register;
Span<int> freePositions = stackalloc int[registersCount]; Span<int> freePositions = stackalloc int[registersCount];
@@ -318,7 +318,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
private void AllocateRegWithSpill(AllocationContext context, LiveInterval current, int cIndex, int registersCount) private void AllocateRegWithSpill(AllocationContext context, LiveInterval current, int cIndex, int registersCount)
{ {
RegisterType regType = current.Local.Type.ToRegisterType(); RegisterType regType = current.Local.Type.Register;
Span<int> usePositions = stackalloc int[registersCount]; Span<int> usePositions = stackalloc int[registersCount];
Span<int> blockedPositions = stackalloc int[registersCount]; Span<int> blockedPositions = stackalloc int[registersCount];

View File

@@ -10,7 +10,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
public int Allocate(OperandType type) public int Allocate(OperandType type)
{ {
return Allocate(type.GetSizeInBytes()); return Allocate(type.ByteSize);
} }
public int Allocate(int sizeInBytes) public int Allocate(int sizeInBytes)

View File

@@ -385,7 +385,7 @@ namespace ARMeilleure.CodeGen.X86
{ {
ref readonly InstructionInfo info = ref _instTable[(int)X86Instruction.Movd]; ref readonly InstructionInfo info = ref _instTable[(int)X86Instruction.Movd];
if (source.Type.IsInteger() || source.Kind == OperandKind.Memory) if (source.Type.IsInteger || source.Kind == OperandKind.Memory)
{ {
WriteOpCode(dest, default, source, OperandType.None, info.Flags, info.OpRRM, rrm: true); WriteOpCode(dest, default, source, OperandType.None, info.Flags, info.OpRRM, rrm: true);
} }
@@ -416,11 +416,11 @@ namespace ARMeilleure.CodeGen.X86
InstructionFlags flags = info.Flags | InstructionFlags.RexW; InstructionFlags flags = info.Flags | InstructionFlags.RexW;
if (source.Type.IsInteger() || source.Kind == OperandKind.Memory) if (source.Type.IsInteger || source.Kind == OperandKind.Memory)
{ {
WriteOpCode(dest, default, source, OperandType.None, flags, info.OpRRM, rrm: true); WriteOpCode(dest, default, source, OperandType.None, flags, info.OpRRM, rrm: true);
} }
else if (dest.Type.IsInteger() || dest.Kind == OperandKind.Memory) else if (dest.Type.IsInteger || dest.Kind == OperandKind.Memory)
{ {
WriteOpCode(dest, default, source, OperandType.None, flags, info.OpRMR); WriteOpCode(dest, default, source, OperandType.None, flags, info.OpRMR);
} }
@@ -1107,17 +1107,17 @@ namespace ARMeilleure.CodeGen.X86
} }
else else
{ {
if (flags.HasFlag(InstructionFlags.Prefix66)) if ((flags & InstructionFlags.Prefix66) != 0)
{ {
WriteByte(0x66); WriteByte(0x66);
} }
if (flags.HasFlag(InstructionFlags.PrefixF2)) if ((flags & InstructionFlags.PrefixF2) != 0f)
{ {
WriteByte(0xf2); WriteByte(0xf2);
} }
if (flags.HasFlag(InstructionFlags.PrefixF3)) if ((flags & InstructionFlags.PrefixF3) != 0f)
{ {
WriteByte(0xf3); WriteByte(0xf3);
} }

View File

@@ -289,7 +289,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameType(dest, source); EnsureSameType(dest, source);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Popcnt(dest, source, dest.Type); context.Assembler.Popcnt(dest, source, dest.Type);
@@ -303,7 +303,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameType(dest, source); EnsureSameType(dest, source);
Debug.Assert(!dest.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger);
context.Assembler.WriteInstruction(info.Inst, dest, source); context.Assembler.WriteInstruction(info.Inst, dest, source);
@@ -315,7 +315,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && !source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && !source.Type.IsInteger);
if (operation.Intrinsic == Intrinsic.X86Cvtsi2si) if (operation.Intrinsic == Intrinsic.X86Cvtsi2si)
{ {
@@ -349,8 +349,8 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameReg(dest, src1); EnsureSameReg(dest, src1);
} }
Debug.Assert(!dest.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger);
Debug.Assert(!src2.Type.IsInteger() || src2.Kind == OperandKind.Constant); Debug.Assert(!src2.Type.IsInteger || src2.Kind == OperandKind.Constant);
context.Assembler.WriteInstruction(info.Inst, dest, src1, src2); context.Assembler.WriteInstruction(info.Inst, dest, src1, src2);
@@ -370,7 +370,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameReg(dest, src1); EnsureSameReg(dest, src1);
} }
Debug.Assert(!dest.Type.IsInteger() && src2.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger && src2.Type.IsInteger);
context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src2.Type); context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src2.Type);
@@ -385,7 +385,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameReg(dest, src1); EnsureSameReg(dest, src1);
Debug.Assert(dest.Type.IsInteger() && src1.Type.IsInteger() && src2.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && src1.Type.IsInteger && src2.Type.IsInteger);
context.Assembler.WriteInstruction(info.Inst, dest, src2, dest.Type); context.Assembler.WriteInstruction(info.Inst, dest, src2, dest.Type);
@@ -405,7 +405,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameReg(dest, src1); EnsureSameReg(dest, src1);
} }
Debug.Assert(!dest.Type.IsInteger() && src2.Kind == OperandKind.Constant); Debug.Assert(!dest.Type.IsInteger && src2.Kind == OperandKind.Constant);
context.Assembler.WriteInstruction(info.Inst, dest, src1, src2.AsByte()); context.Assembler.WriteInstruction(info.Inst, dest, src1, src2.AsByte());
@@ -421,7 +421,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameType(dest, src1, src2, src3); EnsureSameType(dest, src1, src2, src3);
Debug.Assert(!dest.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger);
if (info.Inst == X86Instruction.Blendvpd && HardwareCapabilities.SupportsVexEncoding) if (info.Inst == X86Instruction.Blendvpd && HardwareCapabilities.SupportsVexEncoding)
{ {
@@ -461,7 +461,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameReg(dest, src1); EnsureSameReg(dest, src1);
} }
Debug.Assert(!dest.Type.IsInteger() && src3.Kind == OperandKind.Constant); Debug.Assert(!dest.Type.IsInteger && src3.Kind == OperandKind.Constant);
context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src3.AsByte()); context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src3.AsByte());
@@ -512,7 +512,7 @@ namespace ARMeilleure.CodeGen.X86
Operand src1 = operation.GetSource(0); Operand src1 = operation.GetSource(0);
Operand src2 = operation.GetSource(1); Operand src2 = operation.GetSource(1);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
// If Destination and Source 1 Operands are the same, perform a standard add as there are no benefits to using LEA. // If Destination and Source 1 Operands are the same, perform a standard add as there are no benefits to using LEA.
if (dest.Kind == src1.Kind && dest.Value == src1.Value) if (dest.Kind == src1.Kind && dest.Value == src1.Value)
@@ -567,7 +567,7 @@ namespace ARMeilleure.CodeGen.X86
ValidateBinOp(dest, src1, src2); ValidateBinOp(dest, src1, src2);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
// Note: GenerateCompareCommon makes the assumption that BitwiseAnd will emit only a single `and` // Note: GenerateCompareCommon makes the assumption that BitwiseAnd will emit only a single `and`
// instruction. // instruction.
@@ -582,7 +582,7 @@ namespace ARMeilleure.CodeGen.X86
ValidateBinOp(dest, src1, src2); ValidateBinOp(dest, src1, src2);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Xor(dest, src2, dest.Type); context.Assembler.Xor(dest, src2, dest.Type);
} }
@@ -599,7 +599,7 @@ namespace ARMeilleure.CodeGen.X86
ValidateUnOp(dest, source); ValidateUnOp(dest, source);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Not(dest); context.Assembler.Not(dest);
} }
@@ -612,7 +612,7 @@ namespace ARMeilleure.CodeGen.X86
ValidateBinOp(dest, src1, src2); ValidateBinOp(dest, src1, src2);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Or(dest, src2, dest.Type); context.Assembler.Or(dest, src2, dest.Type);
} }
@@ -623,7 +623,7 @@ namespace ARMeilleure.CodeGen.X86
Debug.Assert(comp.Kind == OperandKind.Constant); Debug.Assert(comp.Kind == OperandKind.Constant);
X86Condition cond = ((Comparison)comp.AsInt32()).ToX86Condition(); X86Condition cond = ((Comparison)comp.AsInt32()).X86;
GenerateCompareCommon(context, operation); GenerateCompareCommon(context, operation);
@@ -637,7 +637,7 @@ namespace ARMeilleure.CodeGen.X86
ValidateUnOp(dest, source); ValidateUnOp(dest, source);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Bswap(dest); context.Assembler.Bswap(dest);
} }
@@ -661,7 +661,7 @@ namespace ARMeilleure.CodeGen.X86
Debug.Assert(dest.Type == OperandType.I32); Debug.Assert(dest.Type == OperandType.I32);
Debug.Assert(comp.Kind == OperandKind.Constant); Debug.Assert(comp.Kind == OperandKind.Constant);
X86Condition cond = ((Comparison)comp.AsInt32()).ToX86Condition(); X86Condition cond = ((Comparison)comp.AsInt32()).X86;
GenerateCompareCommon(context, operation); GenerateCompareCommon(context, operation);
@@ -676,7 +676,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameType(src1, src2); EnsureSameType(src1, src2);
Debug.Assert(src1.Type.IsInteger()); Debug.Assert(src1.Type.IsInteger);
if (src2.Kind == OperandKind.Constant && src2.Value == 0) if (src2.Kind == OperandKind.Constant && src2.Value == 0)
{ {
@@ -766,7 +766,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameReg(dest, src3); EnsureSameReg(dest, src3);
EnsureSameType(dest, src2, src3); EnsureSameType(dest, src2, src3);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
Debug.Assert(src1.Type == OperandType.I32); Debug.Assert(src1.Type == OperandType.I32);
context.Assembler.Test(src1, src1, src1.Type); context.Assembler.Test(src1, src1, src1.Type);
@@ -792,9 +792,9 @@ namespace ARMeilleure.CodeGen.X86
if (dest.Type == OperandType.FP32) if (dest.Type == OperandType.FP32)
{ {
Debug.Assert(source.Type.IsInteger() || source.Type == OperandType.FP64); Debug.Assert(source.Type.IsInteger || source.Type == OperandType.FP64);
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
context.Assembler.Xorps(dest, dest, dest); context.Assembler.Xorps(dest, dest, dest);
context.Assembler.Cvtsi2ss(dest, dest, source, source.Type); context.Assembler.Cvtsi2ss(dest, dest, source, source.Type);
@@ -808,9 +808,9 @@ namespace ARMeilleure.CodeGen.X86
} }
else /* if (dest.Type == OperandType.FP64) */ else /* if (dest.Type == OperandType.FP64) */
{ {
Debug.Assert(source.Type.IsInteger() || source.Type == OperandType.FP32); Debug.Assert(source.Type.IsInteger || source.Type == OperandType.FP32);
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
context.Assembler.Xorps(dest, dest, dest); context.Assembler.Xorps(dest, dest, dest);
context.Assembler.Cvtsi2sd(dest, dest, source, source.Type); context.Assembler.Cvtsi2sd(dest, dest, source, source.Type);
@@ -831,7 +831,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameType(dest, source); EnsureSameType(dest, source);
Debug.Assert(dest.Type.IsInteger() || source.Kind != OperandKind.Constant); Debug.Assert(dest.Type.IsInteger || source.Kind != OperandKind.Constant);
// Moves to the same register are useless. // Moves to the same register are useless.
if (dest.Kind == source.Kind && dest.Value == source.Value) if (dest.Kind == source.Kind && dest.Value == source.Value)
@@ -845,7 +845,7 @@ namespace ARMeilleure.CodeGen.X86
// Assemble "mov reg, 0" as "xor reg, reg" as the later is more efficient. // Assemble "mov reg, 0" as "xor reg, reg" as the later is more efficient.
context.Assembler.Xor(dest, dest, OperandType.I32); context.Assembler.Xor(dest, dest, OperandType.I32);
} }
else if (dest.Type.IsInteger()) else if (dest.Type.IsInteger)
{ {
context.Assembler.Mov(dest, source, dest.Type); context.Assembler.Mov(dest, source, dest.Type);
} }
@@ -862,7 +862,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameType(dest, source); EnsureSameType(dest, source);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Bsr(dest, source, dest.Type); context.Assembler.Bsr(dest, source, dest.Type);
@@ -894,12 +894,12 @@ namespace ARMeilleure.CodeGen.X86
Operand dividend = operation.GetSource(0); Operand dividend = operation.GetSource(0);
Operand divisor = operation.GetSource(1); Operand divisor = operation.GetSource(1);
if (!dest.Type.IsInteger()) if (!dest.Type.IsInteger)
{ {
ValidateBinOp(dest, dividend, divisor); ValidateBinOp(dest, dividend, divisor);
} }
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
divisor = operation.GetSource(2); divisor = operation.GetSource(2);
@@ -932,7 +932,7 @@ namespace ARMeilleure.CodeGen.X86
Operand rdx = Register(X86Register.Rdx); Operand rdx = Register(X86Register.Rdx);
Debug.Assert(divisor.Type.IsInteger()); Debug.Assert(divisor.Type.IsInteger);
context.Assembler.Xor(rdx, rdx, OperandType.I32); context.Assembler.Xor(rdx, rdx, OperandType.I32);
context.Assembler.Div(divisor); context.Assembler.Div(divisor);
@@ -967,7 +967,7 @@ namespace ARMeilleure.CodeGen.X86
Operand value = operation.Destination; Operand value = operation.Destination;
Operand address = Memory(operation.GetSource(0), value.Type); Operand address = Memory(operation.GetSource(0), value.Type);
Debug.Assert(value.Type.IsInteger()); Debug.Assert(value.Type.IsInteger);
context.Assembler.Movzx16(value, address, value.Type); context.Assembler.Movzx16(value, address, value.Type);
} }
@@ -977,7 +977,7 @@ namespace ARMeilleure.CodeGen.X86
Operand value = operation.Destination; Operand value = operation.Destination;
Operand address = Memory(operation.GetSource(0), value.Type); Operand address = Memory(operation.GetSource(0), value.Type);
Debug.Assert(value.Type.IsInteger()); Debug.Assert(value.Type.IsInteger);
context.Assembler.Movzx8(value, address, value.Type); context.Assembler.Movzx8(value, address, value.Type);
} }
@@ -1000,7 +1000,7 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameType(dest, src1, src2); EnsureSameType(dest, src1, src2);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
if (src2.Kind == OperandKind.Constant) if (src2.Kind == OperandKind.Constant)
{ {
@@ -1046,7 +1046,7 @@ namespace ARMeilleure.CodeGen.X86
ValidateUnOp(dest, source); ValidateUnOp(dest, source);
Debug.Assert(dest.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger);
context.Assembler.Neg(dest); context.Assembler.Neg(dest);
} }
@@ -1107,7 +1107,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Movsx16(dest, source, dest.Type); context.Assembler.Movsx16(dest, source, dest.Type);
} }
@@ -1117,7 +1117,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Movsx32(dest, source, dest.Type); context.Assembler.Movsx32(dest, source, dest.Type);
} }
@@ -1127,7 +1127,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Movsx8(dest, source, dest.Type); context.Assembler.Movsx8(dest, source, dest.Type);
} }
@@ -1187,7 +1187,7 @@ namespace ARMeilleure.CodeGen.X86
Operand value = operation.GetSource(1); Operand value = operation.GetSource(1);
Operand address = Memory(operation.GetSource(0), value.Type); Operand address = Memory(operation.GetSource(0), value.Type);
Debug.Assert(value.Type.IsInteger()); Debug.Assert(value.Type.IsInteger);
context.Assembler.Mov16(address, value); context.Assembler.Mov16(address, value);
} }
@@ -1197,7 +1197,7 @@ namespace ARMeilleure.CodeGen.X86
Operand value = operation.GetSource(1); Operand value = operation.GetSource(1);
Operand address = Memory(operation.GetSource(0), value.Type); Operand address = Memory(operation.GetSource(0), value.Type);
Debug.Assert(value.Type.IsInteger()); Debug.Assert(value.Type.IsInteger);
context.Assembler.Mov8(address, value); context.Assembler.Mov8(address, value);
} }
@@ -1210,7 +1210,7 @@ namespace ARMeilleure.CodeGen.X86
ValidateBinOp(dest, src1, src2); ValidateBinOp(dest, src1, src2);
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
context.Assembler.Sub(dest, src2, dest.Type); context.Assembler.Sub(dest, src2, dest.Type);
} }
@@ -1236,7 +1236,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(!dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger && source.Type.IsInteger);
if (source.Type == OperandType.I32) if (source.Type == OperandType.I32)
{ {
@@ -1259,7 +1259,7 @@ namespace ARMeilleure.CodeGen.X86
byte index = src2.AsByte(); byte index = src2.AsByte();
Debug.Assert(index < OperandType.V128.GetSizeInBytes() / dest.Type.GetSizeInBytes()); Debug.Assert(index < OperandType.V128.ByteSize / dest.Type.ByteSize);
if (dest.Type == OperandType.I32) if (dest.Type == OperandType.I32)
{ {
@@ -1541,7 +1541,7 @@ namespace ARMeilleure.CodeGen.X86
{ {
Operand dest = operation.Destination; Operand dest = operation.Destination;
Debug.Assert(!dest.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger);
context.Assembler.Pcmpeqw(dest, dest, dest); context.Assembler.Pcmpeqw(dest, dest, dest);
} }
@@ -1550,7 +1550,7 @@ namespace ARMeilleure.CodeGen.X86
{ {
Operand dest = operation.Destination; Operand dest = operation.Destination;
Debug.Assert(!dest.Type.IsInteger()); Debug.Assert(!dest.Type.IsInteger);
context.Assembler.Xorps(dest, dest, dest); context.Assembler.Xorps(dest, dest, dest);
} }
@@ -1580,7 +1580,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Movzx16(dest, source, OperandType.I32); context.Assembler.Movzx16(dest, source, OperandType.I32);
} }
@@ -1590,7 +1590,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
// We can eliminate the move if source is already 32-bit and the registers are the same. // We can eliminate the move if source is already 32-bit and the registers are the same.
if (dest.Value == source.Value && source.Type == OperandType.I32) if (dest.Value == source.Value && source.Type == OperandType.I32)
@@ -1606,7 +1606,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination; Operand dest = operation.Destination;
Operand source = operation.GetSource(0); Operand source = operation.GetSource(0);
Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger()); Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
context.Assembler.Movzx8(dest, source, OperandType.I32); context.Assembler.Movzx8(dest, source, OperandType.I32);
} }
@@ -1713,12 +1713,12 @@ namespace ARMeilleure.CodeGen.X86
EnsureSameReg(dest, src1); EnsureSameReg(dest, src1);
EnsureSameType(dest, src1); EnsureSameType(dest, src1);
Debug.Assert(dest.Type.IsInteger() && src2.Type == OperandType.I32); Debug.Assert(dest.Type.IsInteger && src2.Type == OperandType.I32);
} }
private static void EnsureSameReg(Operand op1, Operand op2) private static void EnsureSameReg(Operand op1, Operand op2)
{ {
if (!op1.Type.IsInteger() && HardwareCapabilities.SupportsVexEncoding) if (!op1.Type.IsInteger && HardwareCapabilities.SupportsVexEncoding)
{ {
return; return;
} }

View File

@@ -86,7 +86,7 @@ namespace ARMeilleure.CodeGen.X86
break; break;
case Instruction.Negate: case Instruction.Negate:
if (!node.GetSource(0).Type.IsInteger()) if (!node.GetSource(0).Type.IsInteger)
{ {
GenerateNegate(block.Operations, node); GenerateNegate(block.Operations, node);
} }
@@ -159,7 +159,7 @@ namespace ARMeilleure.CodeGen.X86
if (src1.Kind == OperandKind.Constant) if (src1.Kind == OperandKind.Constant)
{ {
if (!src1.Type.IsInteger()) if (!src1.Type.IsInteger)
{ {
// Handle non-integer types (FP32, FP64 and V128). // Handle non-integer types (FP32, FP64 and V128).
// For instructions without an immediate operand, we do the following: // For instructions without an immediate operand, we do the following:
@@ -208,7 +208,7 @@ namespace ARMeilleure.CodeGen.X86
if (src2.Kind == OperandKind.Constant) if (src2.Kind == OperandKind.Constant)
{ {
if (!src2.Type.IsInteger()) if (!src2.Type.IsInteger)
{ {
src2 = AddXmmCopy(nodes, node, src2); src2 = AddXmmCopy(nodes, node, src2);
@@ -298,7 +298,7 @@ namespace ARMeilleure.CodeGen.X86
// - The dividend is always in RDX:RAX. // - The dividend is always in RDX:RAX.
// - The result is always in RAX. // - The result is always in RAX.
// - Additionally it also writes the remainder in RDX. // - Additionally it also writes the remainder in RDX.
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
Operand src1 = node.GetSource(0); Operand src1 = node.GetSource(0);
@@ -466,7 +466,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = node.Destination; Operand dest = node.Destination;
Operand source = node.GetSource(0); Operand source = node.GetSource(0);
Debug.Assert(source.Type.IsInteger(), $"Invalid source type \"{source.Type}\"."); Debug.Assert(source.Type.IsInteger, $"Invalid source type \"{source.Type}\".");
Operation currentNode = node; Operation currentNode = node;
@@ -654,10 +654,10 @@ namespace ARMeilleure.CodeGen.X86
switch (operation.Instruction) switch (operation.Instruction)
{ {
case Instruction.Add: case Instruction.Add:
return !HardwareCapabilities.SupportsVexEncoding && !operation.Destination.Type.IsInteger(); return !HardwareCapabilities.SupportsVexEncoding && !operation.Destination.Type.IsInteger;
case Instruction.Multiply: case Instruction.Multiply:
case Instruction.Subtract: case Instruction.Subtract:
return !HardwareCapabilities.SupportsVexEncoding || operation.Destination.Type.IsInteger(); return !HardwareCapabilities.SupportsVexEncoding || operation.Destination.Type.IsInteger;
case Instruction.BitwiseAnd: case Instruction.BitwiseAnd:
case Instruction.BitwiseExclusiveOr: case Instruction.BitwiseExclusiveOr:
@@ -672,7 +672,7 @@ namespace ARMeilleure.CodeGen.X86
return true; return true;
case Instruction.Divide: case Instruction.Divide:
return !HardwareCapabilities.SupportsVexEncoding && !operation.Destination.Type.IsInteger(); return !HardwareCapabilities.SupportsVexEncoding && !operation.Destination.Type.IsInteger;
case Instruction.VectorInsert: case Instruction.VectorInsert:
case Instruction.VectorInsert16: case Instruction.VectorInsert16:

View File

@@ -35,7 +35,7 @@ namespace ARMeilleure.CodeGen.X86
bool passOnReg; bool passOnReg;
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
passOnReg = intCount < intMax; passOnReg = intCount < intMax;
} }
@@ -62,7 +62,7 @@ namespace ARMeilleure.CodeGen.X86
if (passOnReg) if (passOnReg)
{ {
Operand argReg = source.Type.IsInteger() Operand argReg = source.Type.IsInteger
? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type) ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type); : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);
@@ -80,7 +80,7 @@ namespace ARMeilleure.CodeGen.X86
InsertConstantRegCopies(nodes, nodes.AddBefore(node, spillOp)); InsertConstantRegCopies(nodes, nodes.AddBefore(node, spillOp));
stackOffset += source.Type.GetSizeInBytes(); stackOffset += source.Type.ByteSize;
} }
} }
@@ -102,7 +102,7 @@ namespace ARMeilleure.CodeGen.X86
} }
else else
{ {
Operand retReg = dest.Type.IsInteger() Operand retReg = dest.Type.IsInteger
? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type) ? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type)
: Xmm(CallingConvention.GetVecReturnRegister(), dest.Type); : Xmm(CallingConvention.GetVecReturnRegister(), dest.Type);
@@ -137,7 +137,7 @@ namespace ARMeilleure.CodeGen.X86
bool passOnReg; bool passOnReg;
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
passOnReg = intCount + 1 < intMax; passOnReg = intCount + 1 < intMax;
} }
@@ -160,7 +160,7 @@ namespace ARMeilleure.CodeGen.X86
if (passOnReg) if (passOnReg)
{ {
Operand argReg = source.Type.IsInteger() Operand argReg = source.Type.IsInteger
? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type) ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type); : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);
@@ -210,7 +210,7 @@ namespace ARMeilleure.CodeGen.X86
{ {
OperandType argType = cctx.FuncArgTypes[cIndex]; OperandType argType = cctx.FuncArgTypes[cIndex];
if (argType.IsInteger()) if (argType.IsInteger)
{ {
intCount++; intCount++;
} }
@@ -226,7 +226,7 @@ namespace ARMeilleure.CodeGen.X86
bool passOnReg; bool passOnReg;
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
passOnReg = intCount < CallingConvention.GetIntArgumentsOnRegsCount(); passOnReg = intCount < CallingConvention.GetIntArgumentsOnRegsCount();
} }
@@ -265,7 +265,7 @@ namespace ARMeilleure.CodeGen.X86
{ {
Operand pArg = Local(dest.Type); Operand pArg = Local(dest.Type);
Operand argReg = dest.Type.IsInteger() Operand argReg = dest.Type.IsInteger
? Gpr(CallingConvention.GetIntArgumentRegister(intCount), dest.Type) ? Gpr(CallingConvention.GetIntArgumentRegister(intCount), dest.Type)
: Xmm(CallingConvention.GetVecArgumentRegister(vecCount), dest.Type); : Xmm(CallingConvention.GetVecArgumentRegister(vecCount), dest.Type);
@@ -320,7 +320,7 @@ namespace ARMeilleure.CodeGen.X86
} }
else else
{ {
Operand retReg = source.Type.IsInteger() Operand retReg = source.Type.IsInteger
? Gpr(CallingConvention.GetIntReturnRegister(), source.Type) ? Gpr(CallingConvention.GetIntReturnRegister(), source.Type)
: Xmm(CallingConvention.GetVecReturnRegister(), source.Type); : Xmm(CallingConvention.GetVecReturnRegister(), source.Type);

View File

@@ -40,7 +40,7 @@ namespace ARMeilleure.CodeGen.X86
if (dest != default && dest.Type == OperandType.V128) if (dest != default && dest.Type == OperandType.V128)
{ {
int stackOffset = AllocateOnStack(dest.Type.GetSizeInBytes()); int stackOffset = AllocateOnStack(dest.Type.ByteSize);
arg0Reg = Gpr(CallingConvention.GetIntArgumentRegister(0), OperandType.I64); arg0Reg = Gpr(CallingConvention.GetIntArgumentRegister(0), OperandType.I64);
@@ -76,7 +76,7 @@ namespace ARMeilleure.CodeGen.X86
{ {
Operand stackAddr = Local(OperandType.I64); Operand stackAddr = Local(OperandType.I64);
int stackOffset = AllocateOnStack(source.Type.GetSizeInBytes()); int stackOffset = AllocateOnStack(source.Type.ByteSize);
nodes.AddBefore(node, Operation(Instruction.StackAlloc, stackAddr, Const(stackOffset))); nodes.AddBefore(node, Operation(Instruction.StackAlloc, stackAddr, Const(stackOffset)));
@@ -96,7 +96,7 @@ namespace ARMeilleure.CodeGen.X86
int argIndex = index + retArgs; int argIndex = index + retArgs;
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
argReg = Gpr(CallingConvention.GetIntArgumentRegister(argIndex), source.Type); argReg = Gpr(CallingConvention.GetIntArgumentRegister(argIndex), source.Type);
} }
@@ -140,7 +140,7 @@ namespace ARMeilleure.CodeGen.X86
} }
else else
{ {
Operand retReg = dest.Type.IsInteger() Operand retReg = dest.Type.IsInteger
? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type) ? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type)
: Xmm(CallingConvention.GetVecReturnRegister(), dest.Type); : Xmm(CallingConvention.GetVecReturnRegister(), dest.Type);
@@ -171,7 +171,7 @@ namespace ARMeilleure.CodeGen.X86
for (int index = 0; index < argsCount; index++) for (int index = 0; index < argsCount; index++)
{ {
Operand source = node.GetSource(1 + index); Operand source = node.GetSource(1 + index);
Operand argReg = source.Type.IsInteger() Operand argReg = source.Type.IsInteger
? Gpr(CallingConvention.GetIntArgumentRegister(index), source.Type) ? Gpr(CallingConvention.GetIntArgumentRegister(index), source.Type)
: Xmm(CallingConvention.GetVecArgumentRegister(index), source.Type); : Xmm(CallingConvention.GetVecArgumentRegister(index), source.Type);
@@ -219,7 +219,7 @@ namespace ARMeilleure.CodeGen.X86
{ {
Operand argReg, pArg; Operand argReg, pArg;
if (dest.Type.IsInteger()) if (dest.Type.IsInteger)
{ {
argReg = Gpr(CallingConvention.GetIntArgumentRegister(index), dest.Type); argReg = Gpr(CallingConvention.GetIntArgumentRegister(index), dest.Type);
pArg = Local(dest.Type); pArg = Local(dest.Type);
@@ -283,7 +283,7 @@ namespace ARMeilleure.CodeGen.X86
Operand source = node.GetSource(0); Operand source = node.GetSource(0);
Operand retReg; Operand retReg;
if (source.Type.IsInteger()) if (source.Type.IsInteger)
{ {
retReg = Gpr(CallingConvention.GetIntReturnRegister(), source.Type); retReg = Gpr(CallingConvention.GetIntReturnRegister(), source.Type);
} }

View File

@@ -25,9 +25,9 @@ namespace ARMeilleure.CodeGen.X86
static class ComparisonX86Extensions static class ComparisonX86Extensions
{ {
public static X86Condition ToX86Condition(this Comparison comp) extension(Comparison comparison)
{ {
return comp switch public X86Condition X86 => comparison switch
{ {
#pragma warning disable IDE0055 // Disable formatting #pragma warning disable IDE0055 // Disable formatting
Comparison.Equal => X86Condition.Equal, Comparison.Equal => X86Condition.Equal,
@@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.X86
Comparison.LessUI => X86Condition.Below, Comparison.LessUI => X86Condition.Below,
#pragma warning restore IDE0055 #pragma warning restore IDE0055
_ => throw new ArgumentException(null, nameof(comp)), _ => throw new ArgumentException(null, nameof(comparison))
}; };
} }
} }

View File

@@ -22,11 +22,11 @@ namespace ARMeilleure.Decoders
static class ConditionExtensions static class ConditionExtensions
{ {
public static Condition Invert(this Condition cond) extension(Condition condition)
{ {
// Bit 0 of all conditions is basically a negation bit, so // Bit 0 of all conditions is basically a negation bit, so
// inverting this bit has the effect of inverting the condition. // inverting this bit has the effect of inverting the condition.
return (Condition)((int)cond ^ 1); public Condition Inverse => (Condition)((int)condition ^ 1);
} }
} }
} }

View File

@@ -16,7 +16,7 @@ namespace ARMeilleure.Instructions
public static Operand EmitCrc32(ArmEmitterContext context, Operand crc, Operand value, int size, bool castagnoli) public static Operand EmitCrc32(ArmEmitterContext context, Operand crc, Operand value, int size, bool castagnoli)
{ {
Debug.Assert(crc.Type.IsInteger() && value.Type.IsInteger()); Debug.Assert(crc.Type.IsInteger && value.Type.IsInteger);
Debug.Assert(size is >= 0 and < 4); Debug.Assert(size is >= 0 and < 4);
Debug.Assert((size < 3) || (value.Type == OperandType.I64)); Debug.Assert((size < 3) || (value.Type == OperandType.I64));

View File

@@ -157,7 +157,7 @@ namespace ARMeilleure.Instructions
context.Copy(temp, value); context.Copy(temp, value);
if (!context.Memory.Type.IsHostMappedOrTracked()) if (!context.Memory.Type.IsHostMappedOrTracked)
{ {
context.Branch(lblEnd); context.Branch(lblEnd);
@@ -198,7 +198,7 @@ namespace ARMeilleure.Instructions
SetInt(context, rt, value); SetInt(context, rt, value);
if (!context.Memory.Type.IsHostMappedOrTracked()) if (!context.Memory.Type.IsHostMappedOrTracked)
{ {
context.Branch(lblEnd); context.Branch(lblEnd);
@@ -265,7 +265,7 @@ namespace ARMeilleure.Instructions
context.Copy(GetVec(rt), value); context.Copy(GetVec(rt), value);
if (!context.Memory.Type.IsHostMappedOrTracked()) if (!context.Memory.Type.IsHostMappedOrTracked)
{ {
context.Branch(lblEnd); context.Branch(lblEnd);
@@ -312,7 +312,7 @@ namespace ARMeilleure.Instructions
break; break;
} }
if (!context.Memory.Type.IsHostMappedOrTracked()) if (!context.Memory.Type.IsHostMappedOrTracked)
{ {
context.Branch(lblEnd); context.Branch(lblEnd);
@@ -385,7 +385,7 @@ namespace ARMeilleure.Instructions
break; break;
} }
if (!context.Memory.Type.IsHostMappedOrTracked()) if (!context.Memory.Type.IsHostMappedOrTracked)
{ {
context.Branch(lblEnd); context.Branch(lblEnd);
@@ -399,11 +399,11 @@ namespace ARMeilleure.Instructions
public static Operand EmitPtPointerLoad(ArmEmitterContext context, Operand address, Operand lblSlowPath, bool write, int size) public static Operand EmitPtPointerLoad(ArmEmitterContext context, Operand address, Operand lblSlowPath, bool write, int size)
{ {
if (context.Memory.Type.IsHostMapped()) if (context.Memory.Type.IsHostMapped)
{ {
return EmitHostMappedPointer(context, address); return EmitHostMappedPointer(context, address);
} }
else if (context.Memory.Type.IsHostTracked()) else if (context.Memory.Type.IsHostTracked)
{ {
if (address.Type == OperandType.I32) if (address.Type == OperandType.I32)
{ {

View File

@@ -1,692 +0,0 @@
using ARMeilleure.State;
using System;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static class SoftFallback
{
#region "ShrImm64"
[UnmanagedCallersOnly]
public static long SignedShrImm64(long value, long roundConst, int shift)
{
if (roundConst == 0L)
{
if (shift <= 63)
{
return value >> shift;
}
else /* if (shift == 64) */
{
if (value < 0L)
{
return -1L;
}
else /* if (value >= 0L) */
{
return 0L;
}
}
}
else /* if (roundConst == 1L << (shift - 1)) */
{
if (shift <= 63)
{
long add = value + roundConst;
if ((~value & (value ^ add)) < 0L)
{
return (long)((ulong)add >> shift);
}
else
{
return add >> shift;
}
}
else /* if (shift == 64) */
{
return 0L;
}
}
}
[UnmanagedCallersOnly]
public static ulong UnsignedShrImm64(ulong value, long roundConst, int shift)
{
if (roundConst == 0L)
{
if (shift <= 63)
{
return value >> shift;
}
else /* if (shift == 64) */
{
return 0UL;
}
}
else /* if (roundConst == 1L << (shift - 1)) */
{
ulong add = value + (ulong)roundConst;
if ((add < value) && (add < (ulong)roundConst))
{
if (shift <= 63)
{
return (add >> shift) | (0x8000000000000000UL >> (shift - 1));
}
else /* if (shift == 64) */
{
return 1UL;
}
}
else
{
if (shift <= 63)
{
return add >> shift;
}
else /* if (shift == 64) */
{
return 0UL;
}
}
}
}
#endregion
#region "Saturation"
[UnmanagedCallersOnly]
public static int SatF32ToS32(float value)
{
if (float.IsNaN(value))
{
return 0;
}
return value >= int.MaxValue ? int.MaxValue :
value <= int.MinValue ? int.MinValue : (int)value;
}
[UnmanagedCallersOnly]
public static long SatF32ToS64(float value)
{
if (float.IsNaN(value))
{
return 0;
}
return value >= long.MaxValue ? long.MaxValue :
value <= long.MinValue ? long.MinValue : (long)value;
}
[UnmanagedCallersOnly]
public static uint SatF32ToU32(float value)
{
if (float.IsNaN(value))
{
return 0;
}
return value >= uint.MaxValue ? uint.MaxValue :
value <= uint.MinValue ? uint.MinValue : (uint)value;
}
[UnmanagedCallersOnly]
public static ulong SatF32ToU64(float value)
{
if (float.IsNaN(value))
{
return 0;
}
return value >= ulong.MaxValue ? ulong.MaxValue :
value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
}
[UnmanagedCallersOnly]
public static int SatF64ToS32(double value)
{
if (double.IsNaN(value))
{
return 0;
}
return value >= int.MaxValue ? int.MaxValue :
value <= int.MinValue ? int.MinValue : (int)value;
}
[UnmanagedCallersOnly]
public static long SatF64ToS64(double value)
{
if (double.IsNaN(value))
{
return 0;
}
return value >= long.MaxValue ? long.MaxValue :
value <= long.MinValue ? long.MinValue : (long)value;
}
[UnmanagedCallersOnly]
public static uint SatF64ToU32(double value)
{
if (double.IsNaN(value))
{
return 0;
}
return value >= uint.MaxValue ? uint.MaxValue :
value <= uint.MinValue ? uint.MinValue : (uint)value;
}
[UnmanagedCallersOnly]
public static ulong SatF64ToU64(double value)
{
if (double.IsNaN(value))
{
return 0;
}
return value >= ulong.MaxValue ? ulong.MaxValue :
value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
}
#endregion
#region "Count"
[UnmanagedCallersOnly]
public static ulong CountLeadingSigns(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
{
value ^= value >> 1;
int highBit = size - 2;
for (int bit = highBit; bit >= 0; bit--)
{
if (((int)(value >> bit) & 0b1) != 0)
{
return (ulong)(highBit - bit);
}
}
return (ulong)(size - 1);
}
private static ReadOnlySpan<byte> ClzNibbleTbl => [4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0];
[UnmanagedCallersOnly]
public static ulong CountLeadingZeros(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
{
if (value == 0ul)
{
return (ulong)size;
}
int nibbleIdx = size;
int preCount, count = 0;
do
{
nibbleIdx -= 4;
preCount = ClzNibbleTbl[(int)(value >> nibbleIdx) & 0b1111];
count += preCount;
}
while (preCount == 4);
return (ulong)count;
}
#endregion
#region "Table"
[UnmanagedCallersOnly]
public static V128 Tbl1(V128 vector, int bytes, V128 tb0)
{
return TblOrTbx(default, vector, bytes, tb0);
}
[UnmanagedCallersOnly]
public static V128 Tbl2(V128 vector, int bytes, V128 tb0, V128 tb1)
{
return TblOrTbx(default, vector, bytes, tb0, tb1);
}
[UnmanagedCallersOnly]
public static V128 Tbl3(V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2)
{
return TblOrTbx(default, vector, bytes, tb0, tb1, tb2);
}
[UnmanagedCallersOnly]
public static V128 Tbl4(V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2, V128 tb3)
{
return TblOrTbx(default, vector, bytes, tb0, tb1, tb2, tb3);
}
[UnmanagedCallersOnly]
public static V128 Tbx1(V128 dest, V128 vector, int bytes, V128 tb0)
{
return TblOrTbx(dest, vector, bytes, tb0);
}
[UnmanagedCallersOnly]
public static V128 Tbx2(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1)
{
return TblOrTbx(dest, vector, bytes, tb0, tb1);
}
[UnmanagedCallersOnly]
public static V128 Tbx3(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2)
{
return TblOrTbx(dest, vector, bytes, tb0, tb1, tb2);
}
[UnmanagedCallersOnly]
public static V128 Tbx4(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2, V128 tb3)
{
return TblOrTbx(dest, vector, bytes, tb0, tb1, tb2, tb3);
}
private static V128 TblOrTbx(V128 dest, V128 vector, int bytes, params ReadOnlySpan<V128> tb)
{
byte[] res = new byte[16];
if (dest != default)
{
Buffer.BlockCopy(dest.ToArray(), 0, res, 0, bytes);
}
byte[] table = new byte[tb.Length * 16];
for (byte index = 0; index < tb.Length; index++)
{
Buffer.BlockCopy(tb[index].ToArray(), 0, table, index * 16, 16);
}
byte[] v = vector.ToArray();
for (byte index = 0; index < bytes; index++)
{
byte tblIndex = v[index];
if (tblIndex < table.Length)
{
res[index] = table[tblIndex];
}
}
return new V128(res);
}
#endregion
#region "Crc32"
private const uint Crc32RevPoly = 0xedb88320;
private const uint Crc32cRevPoly = 0x82f63b78;
[UnmanagedCallersOnly]
public static uint Crc32b(uint crc, byte value) => Crc32(crc, Crc32RevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32h(uint crc, ushort value) => Crc32h(crc, Crc32RevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32w(uint crc, uint value) => Crc32w(crc, Crc32RevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32x(uint crc, ulong value) => Crc32x(crc, Crc32RevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32cb(uint crc, byte value) => Crc32(crc, Crc32cRevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32ch(uint crc, ushort value) => Crc32h(crc, Crc32cRevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32cw(uint crc, uint value) => Crc32w(crc, Crc32cRevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32cx(uint crc, ulong value) => Crc32x(crc, Crc32cRevPoly, value);
private static uint Crc32h(uint crc, uint poly, ushort val)
{
crc = Crc32(crc, poly, (byte)(val >> 0));
crc = Crc32(crc, poly, (byte)(val >> 8));
return crc;
}
private static uint Crc32w(uint crc, uint poly, uint val)
{
crc = Crc32(crc, poly, (byte)(val >> 0));
crc = Crc32(crc, poly, (byte)(val >> 8));
crc = Crc32(crc, poly, (byte)(val >> 16));
crc = Crc32(crc, poly, (byte)(val >> 24));
return crc;
}
private static uint Crc32x(uint crc, uint poly, ulong val)
{
crc = Crc32(crc, poly, (byte)(val >> 0));
crc = Crc32(crc, poly, (byte)(val >> 8));
crc = Crc32(crc, poly, (byte)(val >> 16));
crc = Crc32(crc, poly, (byte)(val >> 24));
crc = Crc32(crc, poly, (byte)(val >> 32));
crc = Crc32(crc, poly, (byte)(val >> 40));
crc = Crc32(crc, poly, (byte)(val >> 48));
crc = Crc32(crc, poly, (byte)(val >> 56));
return crc;
}
private static uint Crc32(uint crc, uint poly, byte val)
{
crc ^= val;
for (int bit = 7; bit >= 0; bit--)
{
uint mask = (uint)(-(int)(crc & 1));
crc = (crc >> 1) ^ (poly & mask);
}
return crc;
}
#endregion
#region "Aes"
[UnmanagedCallersOnly]
public static V128 Decrypt(V128 value, V128 roundKey)
{
return CryptoHelper.AesInvSubBytes(CryptoHelper.AesInvShiftRows(value ^ roundKey));
}
[UnmanagedCallersOnly]
public static V128 Encrypt(V128 value, V128 roundKey)
{
return CryptoHelper.AesSubBytes(CryptoHelper.AesShiftRows(value ^ roundKey));
}
[UnmanagedCallersOnly]
public static V128 InverseMixColumns(V128 value)
{
return CryptoHelper.AesInvMixColumns(value);
}
[UnmanagedCallersOnly]
public static V128 MixColumns(V128 value)
{
return CryptoHelper.AesMixColumns(value);
}
#endregion
#region "Sha1"
[UnmanagedCallersOnly]
public static V128 HashChoose(V128 hash_abcd, uint hash_e, V128 wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaChoose(hash_abcd.Extract<uint>(1),
hash_abcd.Extract<uint>(2),
hash_abcd.Extract<uint>(3));
hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
t = Rol(hash_abcd.Extract<uint>(1), 30);
hash_abcd.Insert(1, t);
Rol32_160(ref hash_e, ref hash_abcd);
}
return hash_abcd;
}
[UnmanagedCallersOnly]
public static uint FixedRotate(uint hash_e)
{
return hash_e.Rol(30);
}
[UnmanagedCallersOnly]
public static V128 HashMajority(V128 hash_abcd, uint hash_e, V128 wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaMajority(hash_abcd.Extract<uint>(1),
hash_abcd.Extract<uint>(2),
hash_abcd.Extract<uint>(3));
hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
t = Rol(hash_abcd.Extract<uint>(1), 30);
hash_abcd.Insert(1, t);
Rol32_160(ref hash_e, ref hash_abcd);
}
return hash_abcd;
}
[UnmanagedCallersOnly]
public static V128 HashParity(V128 hash_abcd, uint hash_e, V128 wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaParity(hash_abcd.Extract<uint>(1),
hash_abcd.Extract<uint>(2),
hash_abcd.Extract<uint>(3));
hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
t = Rol(hash_abcd.Extract<uint>(1), 30);
hash_abcd.Insert(1, t);
Rol32_160(ref hash_e, ref hash_abcd);
}
return hash_abcd;
}
[UnmanagedCallersOnly]
public static V128 Sha1SchedulePart1(V128 w0_3, V128 w4_7, V128 w8_11)
{
ulong t2 = w4_7.Extract<ulong>(0);
ulong t1 = w0_3.Extract<ulong>(1);
V128 result = new(t1, t2);
return result ^ (w0_3 ^ w8_11);
}
[UnmanagedCallersOnly]
public static V128 Sha1SchedulePart2(V128 tw0_3, V128 w12_15)
{
V128 t = tw0_3 ^ (w12_15 >> 32);
uint tE0 = t.Extract<uint>(0);
uint tE1 = t.Extract<uint>(1);
uint tE2 = t.Extract<uint>(2);
uint tE3 = t.Extract<uint>(3);
return new V128(tE0.Rol(1), tE1.Rol(1), tE2.Rol(1), tE3.Rol(1) ^ tE0.Rol(2));
}
private static void Rol32_160(ref uint y, ref V128 x)
{
uint xE3 = x.Extract<uint>(3);
x <<= 32;
x.Insert(0, y);
y = xE3;
}
private static uint ShaChoose(uint x, uint y, uint z)
{
return ((y ^ z) & x) ^ z;
}
private static uint ShaMajority(uint x, uint y, uint z)
{
return (x & y) | ((x | y) & z);
}
private static uint ShaParity(uint x, uint y, uint z)
{
return x ^ y ^ z;
}
private static uint Rol(this uint value, int count)
{
return (value << count) | (value >> (32 - count));
}
#endregion
#region "Sha256"
[UnmanagedCallersOnly]
public static V128 HashLower(V128 hash_abcd, V128 hash_efgh, V128 wk)
{
return Sha256Hash(hash_abcd, hash_efgh, wk, part1: true);
}
[UnmanagedCallersOnly]
public static V128 HashUpper(V128 hash_abcd, V128 hash_efgh, V128 wk)
{
return Sha256Hash(hash_abcd, hash_efgh, wk, part1: false);
}
[UnmanagedCallersOnly]
public static V128 Sha256SchedulePart1(V128 w0_3, V128 w4_7)
{
V128 result = new();
for (int e = 0; e <= 3; e++)
{
uint elt = (e <= 2 ? w0_3 : w4_7).Extract<uint>(e <= 2 ? e + 1 : 0);
elt = elt.Ror(7) ^ elt.Ror(18) ^ elt.Lsr(3);
elt += w0_3.Extract<uint>(e);
result.Insert(e, elt);
}
return result;
}
[UnmanagedCallersOnly]
public static V128 Sha256SchedulePart2(V128 w0_3, V128 w8_11, V128 w12_15)
{
V128 result = new();
ulong t1 = w12_15.Extract<ulong>(1);
for (int e = 0; e <= 1; e++)
{
uint elt = t1.ULongPart(e);
elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
elt += w0_3.Extract<uint>(e) + w8_11.Extract<uint>(e + 1);
result.Insert(e, elt);
}
t1 = result.Extract<ulong>(0);
for (int e = 2; e <= 3; e++)
{
uint elt = t1.ULongPart(e - 2);
elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
elt += w0_3.Extract<uint>(e) + (e == 2 ? w8_11 : w12_15).Extract<uint>(e == 2 ? 3 : 0);
result.Insert(e, elt);
}
return result;
}
private static V128 Sha256Hash(V128 x, V128 y, V128 w, bool part1)
{
for (int e = 0; e <= 3; e++)
{
uint chs = ShaChoose(y.Extract<uint>(0),
y.Extract<uint>(1),
y.Extract<uint>(2));
uint maj = ShaMajority(x.Extract<uint>(0),
x.Extract<uint>(1),
x.Extract<uint>(2));
uint t1 = y.Extract<uint>(3) + ShaHashSigma1(y.Extract<uint>(0)) + chs + w.Extract<uint>(e);
uint t2 = t1 + x.Extract<uint>(3);
x.Insert(3, t2);
t2 = t1 + ShaHashSigma0(x.Extract<uint>(0)) + maj;
y.Insert(3, t2);
Rol32_256(ref y, ref x);
}
return part1 ? x : y;
}
private static void Rol32_256(ref V128 y, ref V128 x)
{
uint yE3 = y.Extract<uint>(3);
uint xE3 = x.Extract<uint>(3);
y <<= 32;
x <<= 32;
y.Insert(0, xE3);
x.Insert(0, yE3);
}
private static uint ShaHashSigma0(uint x)
{
return x.Ror(2) ^ x.Ror(13) ^ x.Ror(22);
}
private static uint ShaHashSigma1(uint x)
{
return x.Ror(6) ^ x.Ror(11) ^ x.Ror(25);
}
private static uint Ror(this uint value, int count)
{
return (value >> count) | (value << (32 - count));
}
private static uint Lsr(this uint value, int count)
{
return value >> count;
}
private static uint ULongPart(this ulong value, int part)
{
return part == 0
? (uint)(value & 0xFFFFFFFFUL)
: (uint)(value >> 32);
}
#endregion
[UnmanagedCallersOnly]
public static V128 PolynomialMult64_128(ulong op1, ulong op2)
{
V128 result = V128.Zero;
V128 op2_128 = new(op2, 0);
for (int i = 0; i < 64; i++)
{
if (((op1 >> i) & 1) == 1)
{
result ^= op2_128 << i;
}
}
return result;
}
}
}

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using ARMeilleure.State;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
[UnmanagedCallersOnly]
public static V128 Decrypt(V128 value, V128 roundKey)
{
return CryptoHelper.AesInvSubBytes(CryptoHelper.AesInvShiftRows(value ^ roundKey));
}
[UnmanagedCallersOnly]
public static V128 Encrypt(V128 value, V128 roundKey)
{
return CryptoHelper.AesSubBytes(CryptoHelper.AesShiftRows(value ^ roundKey));
}
[UnmanagedCallersOnly]
public static V128 InverseMixColumns(V128 value)
{
return CryptoHelper.AesInvMixColumns(value);
}
[UnmanagedCallersOnly]
public static V128 MixColumns(V128 value)
{
return CryptoHelper.AesMixColumns(value);
}
}
}

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using System;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
[UnmanagedCallersOnly]
public static ulong CountLeadingSigns(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
{
value ^= value >> 1;
int highBit = size - 2;
for (int bit = highBit; bit >= 0; bit--)
{
if (((int)(value >> bit) & 0b1) != 0)
{
return (ulong)(highBit - bit);
}
}
return (ulong)(size - 1);
}
private static ReadOnlySpan<byte> ClzNibbleTbl => [4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0];
[UnmanagedCallersOnly]
public static ulong CountLeadingZeros(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
{
if (value == 0ul)
{
return (ulong)size;
}
int nibbleIdx = size;
int preCount, count = 0;
do
{
nibbleIdx -= 4;
preCount = ClzNibbleTbl[(int)(value >> nibbleIdx) & 0b1111];
count += preCount;
}
while (preCount == 4);
return (ulong)count;
}
}
}

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using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
private const uint Crc32RevPoly = 0xedb88320;
private const uint Crc32cRevPoly = 0x82f63b78;
[UnmanagedCallersOnly]
public static uint Crc32b(uint crc, byte value) => Crc32(crc, Crc32RevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32h(uint crc, ushort value) => Crc32h(crc, Crc32RevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32w(uint crc, uint value) => Crc32w(crc, Crc32RevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32x(uint crc, ulong value) => Crc32x(crc, Crc32RevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32cb(uint crc, byte value) => Crc32(crc, Crc32cRevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32ch(uint crc, ushort value) => Crc32h(crc, Crc32cRevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32cw(uint crc, uint value) => Crc32w(crc, Crc32cRevPoly, value);
[UnmanagedCallersOnly]
public static uint Crc32cx(uint crc, ulong value) => Crc32x(crc, Crc32cRevPoly, value);
private static uint Crc32h(uint crc, uint poly, ushort val)
{
crc = Crc32(crc, poly, (byte)(val >> 0));
crc = Crc32(crc, poly, (byte)(val >> 8));
return crc;
}
private static uint Crc32w(uint crc, uint poly, uint val)
{
crc = Crc32(crc, poly, (byte)(val >> 0));
crc = Crc32(crc, poly, (byte)(val >> 8));
crc = Crc32(crc, poly, (byte)(val >> 16));
crc = Crc32(crc, poly, (byte)(val >> 24));
return crc;
}
private static uint Crc32x(uint crc, uint poly, ulong val)
{
crc = Crc32(crc, poly, (byte)(val >> 0));
crc = Crc32(crc, poly, (byte)(val >> 8));
crc = Crc32(crc, poly, (byte)(val >> 16));
crc = Crc32(crc, poly, (byte)(val >> 24));
crc = Crc32(crc, poly, (byte)(val >> 32));
crc = Crc32(crc, poly, (byte)(val >> 40));
crc = Crc32(crc, poly, (byte)(val >> 48));
crc = Crc32(crc, poly, (byte)(val >> 56));
return crc;
}
private static uint Crc32(uint crc, uint poly, byte val)
{
crc ^= val;
for (int bit = 7; bit >= 0; bit--)
{
uint mask = (uint)(-(int)(crc & 1));
crc = (crc >> 1) ^ (poly & mask);
}
return crc;
}
}
}

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using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
[UnmanagedCallersOnly]
public static int SatF32ToS32(float value)
{
if (float.IsNaN(value))
{
return 0;
}
return value >= int.MaxValue ? int.MaxValue :
value <= int.MinValue ? int.MinValue : (int)value;
}
[UnmanagedCallersOnly]
public static long SatF32ToS64(float value)
{
if (float.IsNaN(value))
{
return 0;
}
return value >= long.MaxValue ? long.MaxValue :
value <= long.MinValue ? long.MinValue : (long)value;
}
[UnmanagedCallersOnly]
public static uint SatF32ToU32(float value)
{
if (float.IsNaN(value))
{
return 0;
}
return value >= uint.MaxValue ? uint.MaxValue :
value <= uint.MinValue ? uint.MinValue : (uint)value;
}
[UnmanagedCallersOnly]
public static ulong SatF32ToU64(float value)
{
if (float.IsNaN(value))
{
return 0;
}
return value >= ulong.MaxValue ? ulong.MaxValue :
value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
}
[UnmanagedCallersOnly]
public static int SatF64ToS32(double value)
{
if (double.IsNaN(value))
{
return 0;
}
return value >= int.MaxValue ? int.MaxValue :
value <= int.MinValue ? int.MinValue : (int)value;
}
[UnmanagedCallersOnly]
public static long SatF64ToS64(double value)
{
if (double.IsNaN(value))
{
return 0;
}
return value >= long.MaxValue ? long.MaxValue :
value <= long.MinValue ? long.MinValue : (long)value;
}
[UnmanagedCallersOnly]
public static uint SatF64ToU32(double value)
{
if (double.IsNaN(value))
{
return 0;
}
return value >= uint.MaxValue ? uint.MaxValue :
value <= uint.MinValue ? uint.MinValue : (uint)value;
}
[UnmanagedCallersOnly]
public static ulong SatF64ToU64(double value)
{
if (double.IsNaN(value))
{
return 0;
}
return value >= ulong.MaxValue ? ulong.MaxValue :
value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
}
}
}

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using ARMeilleure.State;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
[UnmanagedCallersOnly]
public static V128 HashChoose(V128 hash_abcd, uint hash_e, V128 wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaChoose(hash_abcd.Extract<uint>(1),
hash_abcd.Extract<uint>(2),
hash_abcd.Extract<uint>(3));
hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
t = Rol(hash_abcd.Extract<uint>(1), 30);
hash_abcd.Insert(1, t);
Rol32_160(ref hash_e, ref hash_abcd);
}
return hash_abcd;
}
[UnmanagedCallersOnly]
public static uint FixedRotate(uint hash_e)
{
return hash_e.Rol(30);
}
[UnmanagedCallersOnly]
public static V128 HashMajority(V128 hash_abcd, uint hash_e, V128 wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaMajority(hash_abcd.Extract<uint>(1),
hash_abcd.Extract<uint>(2),
hash_abcd.Extract<uint>(3));
hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
t = Rol(hash_abcd.Extract<uint>(1), 30);
hash_abcd.Insert(1, t);
Rol32_160(ref hash_e, ref hash_abcd);
}
return hash_abcd;
}
[UnmanagedCallersOnly]
public static V128 HashParity(V128 hash_abcd, uint hash_e, V128 wk)
{
for (int e = 0; e <= 3; e++)
{
uint t = ShaParity(hash_abcd.Extract<uint>(1),
hash_abcd.Extract<uint>(2),
hash_abcd.Extract<uint>(3));
hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
t = Rol(hash_abcd.Extract<uint>(1), 30);
hash_abcd.Insert(1, t);
Rol32_160(ref hash_e, ref hash_abcd);
}
return hash_abcd;
}
[UnmanagedCallersOnly]
public static V128 Sha1SchedulePart1(V128 w0_3, V128 w4_7, V128 w8_11)
{
ulong t2 = w4_7.Extract<ulong>(0);
ulong t1 = w0_3.Extract<ulong>(1);
V128 result = new(t1, t2);
return result ^ (w0_3 ^ w8_11);
}
[UnmanagedCallersOnly]
public static V128 Sha1SchedulePart2(V128 tw0_3, V128 w12_15)
{
V128 t = tw0_3 ^ (w12_15 >> 32);
uint tE0 = t.Extract<uint>(0);
uint tE1 = t.Extract<uint>(1);
uint tE2 = t.Extract<uint>(2);
uint tE3 = t.Extract<uint>(3);
return new V128(tE0.Rol(1), tE1.Rol(1), tE2.Rol(1), tE3.Rol(1) ^ tE0.Rol(2));
}
private static void Rol32_160(ref uint y, ref V128 x)
{
uint xE3 = x.Extract<uint>(3);
x <<= 32;
x.Insert(0, y);
y = xE3;
}
private static uint ShaChoose(uint x, uint y, uint z)
{
return ((y ^ z) & x) ^ z;
}
private static uint ShaMajority(uint x, uint y, uint z)
{
return (x & y) | ((x | y) & z);
}
private static uint ShaParity(uint x, uint y, uint z)
{
return x ^ y ^ z;
}
private static uint Rol(this uint value, int count)
{
return (value << count) | (value >> (32 - count));
}
}
}

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using ARMeilleure.State;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
[UnmanagedCallersOnly]
public static V128 HashLower(V128 hash_abcd, V128 hash_efgh, V128 wk)
{
return Sha256Hash(hash_abcd, hash_efgh, wk, part1: true);
}
[UnmanagedCallersOnly]
public static V128 HashUpper(V128 hash_abcd, V128 hash_efgh, V128 wk)
{
return Sha256Hash(hash_abcd, hash_efgh, wk, part1: false);
}
[UnmanagedCallersOnly]
public static V128 Sha256SchedulePart1(V128 w0_3, V128 w4_7)
{
V128 result = new();
for (int e = 0; e <= 3; e++)
{
uint elt = (e <= 2 ? w0_3 : w4_7).Extract<uint>(e <= 2 ? e + 1 : 0);
elt = elt.Ror(7) ^ elt.Ror(18) ^ elt.Lsr(3);
elt += w0_3.Extract<uint>(e);
result.Insert(e, elt);
}
return result;
}
[UnmanagedCallersOnly]
public static V128 Sha256SchedulePart2(V128 w0_3, V128 w8_11, V128 w12_15)
{
V128 result = new();
ulong t1 = w12_15.Extract<ulong>(1);
for (int e = 0; e <= 1; e++)
{
uint elt = t1.ULongPart(e);
elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
elt += w0_3.Extract<uint>(e) + w8_11.Extract<uint>(e + 1);
result.Insert(e, elt);
}
t1 = result.Extract<ulong>(0);
for (int e = 2; e <= 3; e++)
{
uint elt = t1.ULongPart(e - 2);
elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
elt += w0_3.Extract<uint>(e) + (e == 2 ? w8_11 : w12_15).Extract<uint>(e == 2 ? 3 : 0);
result.Insert(e, elt);
}
return result;
}
private static V128 Sha256Hash(V128 x, V128 y, V128 w, bool part1)
{
for (int e = 0; e <= 3; e++)
{
uint chs = ShaChoose(y.Extract<uint>(0),
y.Extract<uint>(1),
y.Extract<uint>(2));
uint maj = ShaMajority(x.Extract<uint>(0),
x.Extract<uint>(1),
x.Extract<uint>(2));
uint t1 = y.Extract<uint>(3) + ShaHashSigma1(y.Extract<uint>(0)) + chs + w.Extract<uint>(e);
uint t2 = t1 + x.Extract<uint>(3);
x.Insert(3, t2);
t2 = t1 + ShaHashSigma0(x.Extract<uint>(0)) + maj;
y.Insert(3, t2);
Rol32_256(ref y, ref x);
}
return part1 ? x : y;
}
private static void Rol32_256(ref V128 y, ref V128 x)
{
uint yE3 = y.Extract<uint>(3);
uint xE3 = x.Extract<uint>(3);
y <<= 32;
x <<= 32;
y.Insert(0, xE3);
x.Insert(0, yE3);
}
private static uint ShaHashSigma0(uint x)
{
return x.Ror(2) ^ x.Ror(13) ^ x.Ror(22);
}
private static uint ShaHashSigma1(uint x)
{
return x.Ror(6) ^ x.Ror(11) ^ x.Ror(25);
}
private static uint Ror(this uint value, int count)
{
return (value >> count) | (value << (32 - count));
}
private static uint Lsr(this uint value, int count)
{
return value >> count;
}
private static uint ULongPart(this ulong value, int part)
{
return part == 0
? (uint)(value & 0xFFFFFFFFUL)
: (uint)(value >> 32);
}
}
}

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using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
[UnmanagedCallersOnly]
public static long SignedShrImm64(long value, long roundConst, int shift)
{
if (roundConst == 0L)
{
if (shift <= 63)
{
return value >> shift;
}
else /* if (shift == 64) */
{
if (value < 0L)
{
return -1L;
}
else /* if (value >= 0L) */
{
return 0L;
}
}
}
else /* if (roundConst == 1L << (shift - 1)) */
{
if (shift <= 63)
{
long add = value + roundConst;
if ((~value & (value ^ add)) < 0L)
{
return (long)((ulong)add >> shift);
}
else
{
return add >> shift;
}
}
else /* if (shift == 64) */
{
return 0L;
}
}
}
[UnmanagedCallersOnly]
public static ulong UnsignedShrImm64(ulong value, long roundConst, int shift)
{
if (roundConst == 0L)
{
if (shift <= 63)
{
return value >> shift;
}
else /* if (shift == 64) */
{
return 0UL;
}
}
else /* if (roundConst == 1L << (shift - 1)) */
{
ulong add = value + (ulong)roundConst;
if ((add < value) && (add < (ulong)roundConst))
{
if (shift <= 63)
{
return (add >> shift) | (0x8000000000000000UL >> (shift - 1));
}
else /* if (shift == 64) */
{
return 1UL;
}
}
else
{
if (shift <= 63)
{
return add >> shift;
}
else /* if (shift == 64) */
{
return 0UL;
}
}
}
}
}
}

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using ARMeilleure.State;
using System;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
[UnmanagedCallersOnly]
public static V128 Tbl1(V128 vector, int bytes, V128 tb0)
{
return TblOrTbx(default, vector, bytes, tb0);
}
[UnmanagedCallersOnly]
public static V128 Tbl2(V128 vector, int bytes, V128 tb0, V128 tb1)
{
return TblOrTbx(default, vector, bytes, tb0, tb1);
}
[UnmanagedCallersOnly]
public static V128 Tbl3(V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2)
{
return TblOrTbx(default, vector, bytes, tb0, tb1, tb2);
}
[UnmanagedCallersOnly]
public static V128 Tbl4(V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2, V128 tb3)
{
return TblOrTbx(default, vector, bytes, tb0, tb1, tb2, tb3);
}
[UnmanagedCallersOnly]
public static V128 Tbx1(V128 dest, V128 vector, int bytes, V128 tb0)
{
return TblOrTbx(dest, vector, bytes, tb0);
}
[UnmanagedCallersOnly]
public static V128 Tbx2(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1)
{
return TblOrTbx(dest, vector, bytes, tb0, tb1);
}
[UnmanagedCallersOnly]
public static V128 Tbx3(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2)
{
return TblOrTbx(dest, vector, bytes, tb0, tb1, tb2);
}
[UnmanagedCallersOnly]
public static V128 Tbx4(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2, V128 tb3)
{
return TblOrTbx(dest, vector, bytes, tb0, tb1, tb2, tb3);
}
private static V128 TblOrTbx(V128 dest, V128 vector, int bytes, params ReadOnlySpan<V128> tb)
{
byte[] res = new byte[16];
if (dest != default)
{
Buffer.BlockCopy(dest.ToArray(), 0, res, 0, bytes);
}
byte[] table = new byte[tb.Length * 16];
for (byte index = 0; index < tb.Length; index++)
{
Buffer.BlockCopy(tb[index].ToArray(), 0, table, index * 16, 16);
}
byte[] v = vector.ToArray();
for (byte index = 0; index < bytes; index++)
{
byte tblIndex = v[index];
if (tblIndex < table.Length)
{
res[index] = table[tblIndex];
}
}
return new V128(res);
}
}
}

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using ARMeilleure.State;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static partial class SoftFallback
{
[UnmanagedCallersOnly]
public static V128 PolynomialMult64_128(ulong op1, ulong op2)
{
V128 result = V128.Zero;
V128 op2_128 = new(op2, 0);
for (int i = 0; i < 64; i++)
{
if (((op1 >> i) & 1) == 1)
{
result ^= op2_128 << i;
}
}
return result;
}
}
}

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using ARMeilleure.State;
using System;
using System.Diagnostics;
namespace ARMeilleure.Instructions
{
static class SoftFloat
{
static SoftFloat()
{
RecipEstimateTable = BuildRecipEstimateTable();
RecipSqrtEstimateTable = BuildRecipSqrtEstimateTable();
}
public static readonly byte[] RecipEstimateTable;
public static readonly byte[] RecipSqrtEstimateTable;
private static byte[] BuildRecipEstimateTable()
{
byte[] tbl = new byte[256];
for (int idx = 0; idx < 256; idx++)
{
uint src = (uint)idx + 256u;
Debug.Assert(src is >= 256u and < 512u);
src = (src << 1) + 1u;
uint aux = (1u << 19) / src;
uint dst = (aux + 1u) >> 1;
Debug.Assert(dst is >= 256u and < 512u);
tbl[idx] = (byte)(dst - 256u);
}
return tbl;
}
private static byte[] BuildRecipSqrtEstimateTable()
{
byte[] tbl = new byte[384];
for (int idx = 0; idx < 384; idx++)
{
uint src = (uint)idx + 128u;
Debug.Assert(src is >= 128u and < 512u);
if (src < 256u)
{
src = (src << 1) + 1u;
}
else
{
src = (src >> 1) << 1;
src = (src + 1u) << 1;
}
uint aux = 512u;
while (src * (aux + 1u) * (aux + 1u) < (1u << 28))
{
aux++;
}
uint dst = (aux + 1u) >> 1;
Debug.Assert(dst is >= 256u and < 512u);
tbl[idx] = (byte)(dst - 256u);
}
return tbl;
}
public static void FPProcessException(FPException exc, ExecutionContext context)
{
FPProcessException(exc, context, context.Fpcr);
}
public static void FPProcessException(FPException exc, ExecutionContext context, FPCR fpcr)
{
int enable = (int)exc + 8;
if ((fpcr & (FPCR)(1 << enable)) != 0)
{
throw new NotImplementedException("Floating-point trap handling.");
}
else
{
context.Fpsr |= (FPSR)(1 << (int)exc);
}
}
extension(FPCR fpcr)
{
public FPRoundingMode RoundingMode
{
get
{
const int RModeShift = 22;
return (FPRoundingMode)(((uint)fpcr >> RModeShift) & 3u);
}
}
}
}
}

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using ARMeilleure.State;
using System;
namespace ARMeilleure.Instructions
{
static class SoftFloat16
{
public static ushort FPDefaultNaN()
{
return (ushort)0x7E00u;
}
public static ushort FPInfinity(bool sign)
{
return sign ? (ushort)0xFC00u : (ushort)0x7C00u;
}
public static ushort FPZero(bool sign)
{
return sign ? (ushort)0x8000u : (ushort)0x0000u;
}
public static ushort FPMaxNormal(bool sign)
{
return sign ? (ushort)0xFBFFu : (ushort)0x7BFFu;
}
public static double FPUnpackCv(
this ushort valueBits,
out FPType type,
out bool sign,
ExecutionContext context)
{
sign = (~(uint)valueBits & 0x8000u) == 0u;
uint exp16 = ((uint)valueBits & 0x7C00u) >> 10;
uint frac16 = (uint)valueBits & 0x03FFu;
double real;
if (exp16 == 0u)
{
if (frac16 == 0u)
{
type = FPType.Zero;
real = 0d;
}
else
{
type = FPType.Nonzero; // Subnormal.
real = Math.Pow(2d, -14) * ((double)frac16 * Math.Pow(2d, -10));
}
}
else if (exp16 == 0x1Fu && (context.Fpcr & FPCR.Ahp) == 0)
{
if (frac16 == 0u)
{
type = FPType.Infinity;
real = Math.Pow(2d, 1000);
}
else
{
type = (~frac16 & 0x0200u) == 0u ? FPType.QNaN : FPType.SNaN;
real = 0d;
}
}
else
{
type = FPType.Nonzero; // Normal.
real = Math.Pow(2d, (int)exp16 - 15) * (1d + (double)frac16 * Math.Pow(2d, -10));
}
return sign ? -real : real;
}
public static ushort FPRoundCv(double real, ExecutionContext context)
{
const int MinimumExp = -14;
const int E = 5;
const int F = 10;
bool sign;
double mantissa;
if (real < 0d)
{
sign = true;
mantissa = -real;
}
else
{
sign = false;
mantissa = real;
}
int exponent = 0;
while (mantissa < 1d)
{
mantissa *= 2d;
exponent--;
}
while (mantissa >= 2d)
{
mantissa /= 2d;
exponent++;
}
uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
if (biasedExp == 0u)
{
mantissa /= Math.Pow(2d, MinimumExp - exponent);
}
uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, F));
double error = mantissa * Math.Pow(2d, F) - (double)intMant;
if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
{
SoftFloat.FPProcessException(FPException.Underflow, context);
}
bool overflowToInf;
bool roundUp;
switch (context.Fpcr.RoundingMode)
{
case FPRoundingMode.ToNearest:
roundUp = (error > 0.5d || (error == 0.5d && (intMant & 1u) == 1u));
overflowToInf = true;
break;
case FPRoundingMode.TowardsPlusInfinity:
roundUp = (error != 0d && !sign);
overflowToInf = !sign;
break;
case FPRoundingMode.TowardsMinusInfinity:
roundUp = (error != 0d && sign);
overflowToInf = sign;
break;
case FPRoundingMode.TowardsZero:
roundUp = false;
overflowToInf = false;
break;
default:
throw new ArgumentException($"Invalid rounding mode \"{context.Fpcr.RoundingMode}\".");
}
if (roundUp)
{
intMant++;
if (intMant == 1u << F)
{
biasedExp = 1u;
}
if (intMant == 1u << (F + 1))
{
biasedExp++;
intMant >>= 1;
}
}
ushort resultBits;
if ((context.Fpcr & FPCR.Ahp) == 0)
{
if (biasedExp >= (1u << E) - 1u)
{
resultBits = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign);
SoftFloat.FPProcessException(FPException.Overflow, context);
error = 1d;
}
else
{
resultBits = (ushort)((sign ? 1u : 0u) << 15 | (biasedExp & 0x1Fu) << 10 | (intMant & 0x03FFu));
}
}
else
{
if (biasedExp >= 1u << E)
{
resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
SoftFloat.FPProcessException(FPException.InvalidOp, context);
error = 0d;
}
else
{
resultBits = (ushort)((sign ? 1u : 0u) << 15 | (biasedExp & 0x1Fu) << 10 | (intMant & 0x03FFu));
}
}
if (error != 0d)
{
SoftFloat.FPProcessException(FPException.Inexact, context);
}
return resultBits;
}
}
}

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using ARMeilleure.State;
using System;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static class SoftFloat16_32
{
[UnmanagedCallersOnly]
public static float FPConvert(ushort valueBits)
{
ExecutionContext context = NativeInterface.GetContext();
double real = valueBits.FPUnpackCv(out FPType type, out bool sign, context);
float result;
if (type is FPType.SNaN or FPType.QNaN)
{
if ((context.Fpcr & FPCR.Dn) != 0)
{
result = SoftFloat32.FPDefaultNaN();
}
else
{
result = FPConvertNaN(valueBits);
}
if (type == FPType.SNaN)
{
SoftFloat.FPProcessException(FPException.InvalidOp, context);
}
}
else if (type == FPType.Infinity)
{
result = SoftFloat32.FPInfinity(sign);
}
else if (type == FPType.Zero)
{
result = SoftFloat32.FPZero(sign);
}
else
{
result = FPRoundCv(real, context);
}
return result;
}
private static float FPRoundCv(double real, ExecutionContext context)
{
const int MinimumExp = -126;
const int E = 8;
const int F = 23;
bool sign;
double mantissa;
if (real < 0d)
{
sign = true;
mantissa = -real;
}
else
{
sign = false;
mantissa = real;
}
int exponent = 0;
while (mantissa < 1d)
{
mantissa *= 2d;
exponent--;
}
while (mantissa >= 2d)
{
mantissa /= 2d;
exponent++;
}
if ((context.Fpcr & FPCR.Fz) != 0 && exponent < MinimumExp)
{
context.Fpsr |= FPSR.Ufc;
return SoftFloat32.FPZero(sign);
}
uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
if (biasedExp == 0u)
{
mantissa /= Math.Pow(2d, MinimumExp - exponent);
}
uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, F));
double error = mantissa * Math.Pow(2d, F) - (double)intMant;
if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
{
SoftFloat.FPProcessException(FPException.Underflow, context);
}
bool overflowToInf;
bool roundUp;
switch (context.Fpcr.RoundingMode)
{
case FPRoundingMode.ToNearest:
roundUp = (error > 0.5d || (error == 0.5d && (intMant & 1u) == 1u));
overflowToInf = true;
break;
case FPRoundingMode.TowardsPlusInfinity:
roundUp = (error != 0d && !sign);
overflowToInf = !sign;
break;
case FPRoundingMode.TowardsMinusInfinity:
roundUp = (error != 0d && sign);
overflowToInf = sign;
break;
case FPRoundingMode.TowardsZero:
roundUp = false;
overflowToInf = false;
break;
default:
throw new ArgumentException($"Invalid rounding mode \"{context.Fpcr.RoundingMode}\".");
}
if (roundUp)
{
intMant++;
if (intMant == 1u << F)
{
biasedExp = 1u;
}
if (intMant == 1u << (F + 1))
{
biasedExp++;
intMant >>= 1;
}
}
float result;
if (biasedExp >= (1u << E) - 1u)
{
result = overflowToInf ? SoftFloat32.FPInfinity(sign) : SoftFloat32.FPMaxNormal(sign);
SoftFloat.FPProcessException(FPException.Overflow, context);
error = 1d;
}
else
{
result = BitConverter.Int32BitsToSingle(
(int)((sign ? 1u : 0u) << 31 | (biasedExp & 0xFFu) << 23 | (intMant & 0x007FFFFFu)));
}
if (error != 0d)
{
SoftFloat.FPProcessException(FPException.Inexact, context);
}
return result;
}
private static float FPConvertNaN(ushort valueBits)
{
return BitConverter.Int32BitsToSingle(
(int)(((uint)valueBits & 0x8000u) << 16 | 0x7FC00000u | ((uint)valueBits & 0x01FFu) << 13));
}
}
}

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using ARMeilleure.State;
using System;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static class SoftFloat16_64
{
[UnmanagedCallersOnly]
public static double FPConvert(ushort valueBits)
{
ExecutionContext context = NativeInterface.GetContext();
double real = valueBits.FPUnpackCv(out FPType type, out bool sign, context);
double result;
if (type is FPType.SNaN or FPType.QNaN)
{
if ((context.Fpcr & FPCR.Dn) != 0)
{
result = SoftFloat64.FPDefaultNaN();
}
else
{
result = FPConvertNaN(valueBits);
}
if (type == FPType.SNaN)
{
SoftFloat.FPProcessException(FPException.InvalidOp, context);
}
}
else if (type == FPType.Infinity)
{
result = SoftFloat64.FPInfinity(sign);
}
else if (type == FPType.Zero)
{
result = SoftFloat64.FPZero(sign);
}
else
{
result = FPRoundCv(real, context);
}
return result;
}
private static double FPRoundCv(double real, ExecutionContext context)
{
const int MinimumExp = -1022;
const int E = 11;
const int F = 52;
bool sign;
double mantissa;
if (real < 0d)
{
sign = true;
mantissa = -real;
}
else
{
sign = false;
mantissa = real;
}
int exponent = 0;
while (mantissa < 1d)
{
mantissa *= 2d;
exponent--;
}
while (mantissa >= 2d)
{
mantissa /= 2d;
exponent++;
}
if ((context.Fpcr & FPCR.Fz) != 0 && exponent < MinimumExp)
{
context.Fpsr |= FPSR.Ufc;
return SoftFloat64.FPZero(sign);
}
uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
if (biasedExp == 0u)
{
mantissa /= Math.Pow(2d, MinimumExp - exponent);
}
ulong intMant = (ulong)Math.Floor(mantissa * Math.Pow(2d, F));
double error = mantissa * Math.Pow(2d, F) - (double)intMant;
if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
{
SoftFloat.FPProcessException(FPException.Underflow, context);
}
bool overflowToInf;
bool roundUp;
switch (context.Fpcr.RoundingMode)
{
case FPRoundingMode.ToNearest:
roundUp = (error > 0.5d || (error == 0.5d && (intMant & 1u) == 1u));
overflowToInf = true;
break;
case FPRoundingMode.TowardsPlusInfinity:
roundUp = (error != 0d && !sign);
overflowToInf = !sign;
break;
case FPRoundingMode.TowardsMinusInfinity:
roundUp = (error != 0d && sign);
overflowToInf = sign;
break;
case FPRoundingMode.TowardsZero:
roundUp = false;
overflowToInf = false;
break;
default:
throw new ArgumentException($"Invalid rounding mode \"{context.Fpcr.RoundingMode}\".");
}
if (roundUp)
{
intMant++;
if (intMant == 1ul << F)
{
biasedExp = 1u;
}
if (intMant == 1ul << (F + 1))
{
biasedExp++;
intMant >>= 1;
}
}
double result;
if (biasedExp >= (1u << E) - 1u)
{
result = overflowToInf ? SoftFloat64.FPInfinity(sign) : SoftFloat64.FPMaxNormal(sign);
SoftFloat.FPProcessException(FPException.Overflow, context);
error = 1d;
}
else
{
result = BitConverter.Int64BitsToDouble(
(long)((sign ? 1ul : 0ul) << 63 | (biasedExp & 0x7FFul) << 52 | (intMant & 0x000FFFFFFFFFFFFFul)));
}
if (error != 0d)
{
SoftFloat.FPProcessException(FPException.Inexact, context);
}
return result;
}
private static double FPConvertNaN(ushort valueBits)
{
return BitConverter.Int64BitsToDouble(
(long)(((ulong)valueBits & 0x8000ul) << 48 | 0x7FF8000000000000ul | ((ulong)valueBits & 0x01FFul) << 42));
}
}
}

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using ARMeilleure.State;
using System;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static class SoftFloat32_16
{
[UnmanagedCallersOnly]
public static ushort FPConvert(float value)
{
ExecutionContext context = NativeInterface.GetContext();
double real = value.FPUnpackCv(out FPType type, out bool sign, out uint valueBits, context);
bool altHp = (context.Fpcr & FPCR.Ahp) != 0;
ushort resultBits;
if (type is FPType.SNaN or FPType.QNaN)
{
if (altHp)
{
resultBits = SoftFloat16.FPZero(sign);
}
else if ((context.Fpcr & FPCR.Dn) != 0)
{
resultBits = SoftFloat16.FPDefaultNaN();
}
else
{
resultBits = FPConvertNaN(valueBits);
}
if (type == FPType.SNaN || altHp)
{
SoftFloat.FPProcessException(FPException.InvalidOp, context);
}
}
else if (type == FPType.Infinity)
{
if (altHp)
{
resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
SoftFloat.FPProcessException(FPException.InvalidOp, context);
}
else
{
resultBits = SoftFloat16.FPInfinity(sign);
}
}
else if (type == FPType.Zero)
{
resultBits = SoftFloat16.FPZero(sign);
}
else
{
resultBits = SoftFloat16.FPRoundCv(real, context);
}
return resultBits;
}
private static double FPUnpackCv(
this float value,
out FPType type,
out bool sign,
out uint valueBits,
ExecutionContext context)
{
valueBits = (uint)BitConverter.SingleToInt32Bits(value);
sign = (~valueBits & 0x80000000u) == 0u;
uint exp32 = (valueBits & 0x7F800000u) >> 23;
uint frac32 = valueBits & 0x007FFFFFu;
double real;
if (exp32 == 0u)
{
if (frac32 == 0u || (context.Fpcr & FPCR.Fz) != 0)
{
type = FPType.Zero;
real = 0d;
if (frac32 != 0u)
{
SoftFloat.FPProcessException(FPException.InputDenorm, context);
}
}
else
{
type = FPType.Nonzero; // Subnormal.
real = Math.Pow(2d, -126) * ((double)frac32 * Math.Pow(2d, -23));
}
}
else if (exp32 == 0xFFu)
{
if (frac32 == 0u)
{
type = FPType.Infinity;
real = Math.Pow(2d, 1000);
}
else
{
type = (~frac32 & 0x00400000u) == 0u ? FPType.QNaN : FPType.SNaN;
real = 0d;
}
}
else
{
type = FPType.Nonzero; // Normal.
real = Math.Pow(2d, (int)exp32 - 127) * (1d + (double)frac32 * Math.Pow(2d, -23));
}
return sign ? -real : real;
}
private static ushort FPConvertNaN(uint valueBits)
{
return (ushort)((valueBits & 0x80000000u) >> 16 | 0x7E00u | (valueBits & 0x003FE000u) >> 13);
}
}
}

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@@ -0,0 +1,127 @@
using ARMeilleure.State;
using System;
using System.Runtime.InteropServices;
namespace ARMeilleure.Instructions
{
static class SoftFloat64_16
{
[UnmanagedCallersOnly]
public static ushort FPConvert(double value)
{
ExecutionContext context = NativeInterface.GetContext();
double real = value.FPUnpackCv(out FPType type, out bool sign, out ulong valueBits, context);
bool altHp = (context.Fpcr & FPCR.Ahp) != 0;
ushort resultBits;
if (type is FPType.SNaN or FPType.QNaN)
{
if (altHp)
{
resultBits = SoftFloat16.FPZero(sign);
}
else if ((context.Fpcr & FPCR.Dn) != 0)
{
resultBits = SoftFloat16.FPDefaultNaN();
}
else
{
resultBits = FPConvertNaN(valueBits);
}
if (type == FPType.SNaN || altHp)
{
SoftFloat.FPProcessException(FPException.InvalidOp, context);
}
}
else if (type == FPType.Infinity)
{
if (altHp)
{
resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
SoftFloat.FPProcessException(FPException.InvalidOp, context);
}
else
{
resultBits = SoftFloat16.FPInfinity(sign);
}
}
else if (type == FPType.Zero)
{
resultBits = SoftFloat16.FPZero(sign);
}
else
{
resultBits = SoftFloat16.FPRoundCv(real, context);
}
return resultBits;
}
private static double FPUnpackCv(
this double value,
out FPType type,
out bool sign,
out ulong valueBits,
ExecutionContext context)
{
valueBits = (ulong)BitConverter.DoubleToInt64Bits(value);
sign = (~valueBits & 0x8000000000000000ul) == 0u;
ulong exp64 = (valueBits & 0x7FF0000000000000ul) >> 52;
ulong frac64 = valueBits & 0x000FFFFFFFFFFFFFul;
double real;
if (exp64 == 0u)
{
if (frac64 == 0u || (context.Fpcr & FPCR.Fz) != 0)
{
type = FPType.Zero;
real = 0d;
if (frac64 != 0u)
{
SoftFloat.FPProcessException(FPException.InputDenorm, context);
}
}
else
{
type = FPType.Nonzero; // Subnormal.
real = Math.Pow(2d, -1022) * ((double)frac64 * Math.Pow(2d, -52));
}
}
else if (exp64 == 0x7FFul)
{
if (frac64 == 0u)
{
type = FPType.Infinity;
real = Math.Pow(2d, 1000000);
}
else
{
type = (~frac64 & 0x0008000000000000ul) == 0u ? FPType.QNaN : FPType.SNaN;
real = 0d;
}
}
else
{
type = FPType.Nonzero; // Normal.
real = Math.Pow(2d, (int)exp64 - 1023) * (1d + (double)frac64 * Math.Pow(2d, -52));
}
return sign ? -real : real;
}
private static ushort FPConvertNaN(ulong valueBits)
{
return (ushort)((valueBits & 0x8000000000000000ul) >> 48 | 0x7E00u |
(valueBits & 0x0007FC0000000000ul) >> 42);
}
}
}

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@@ -16,9 +16,9 @@ namespace ARMeilleure.IntermediateRepresentation
static class ComparisonExtensions static class ComparisonExtensions
{ {
public static Comparison Invert(this Comparison comp) extension(Comparison comparison)
{ {
return (Comparison)((int)comp ^ 1); public Comparison Inverse => (Comparison)((int)comparison ^ 1);
} }
} }
} }

View File

@@ -14,48 +14,38 @@ namespace ARMeilleure.IntermediateRepresentation
static class OperandTypeExtensions static class OperandTypeExtensions
{ {
public static bool IsInteger(this OperandType type) extension(OperandType type)
{ {
return type is OperandType.I32 or public bool IsInteger => type is OperandType.I32 or OperandType.I64;
OperandType.I64;
} public RegisterType Register => type switch
public static RegisterType ToRegisterType(this OperandType type)
{
return type switch
{ {
OperandType.FP32 => RegisterType.Vector, OperandType.FP32 => RegisterType.Vector,
OperandType.FP64 => RegisterType.Vector, OperandType.FP64 => RegisterType.Vector,
OperandType.I32 => RegisterType.Integer, OperandType.I32 => RegisterType.Integer,
OperandType.I64 => RegisterType.Integer, OperandType.I64 => RegisterType.Integer,
OperandType.V128 => RegisterType.Vector, OperandType.V128 => RegisterType.Vector,
_ => throw new InvalidOperationException($"Invalid operand type \"{type}\"."), _ => throw new InvalidOperationException($"Invalid operand type \"{type}\".")
}; };
}
public int ByteSize => type switch
public static int GetSizeInBytes(this OperandType type)
{
return type switch
{ {
OperandType.FP32 => 4, OperandType.FP32 => 4,
OperandType.FP64 => 8, OperandType.FP64 => 8,
OperandType.I32 => 4, OperandType.I32 => 4,
OperandType.I64 => 8, OperandType.I64 => 8,
OperandType.V128 => 16, OperandType.V128 => 16,
_ => throw new InvalidOperationException($"Invalid operand type \"{type}\"."), _ => throw new InvalidOperationException($"Invalid operand type \"{type}\".")
}; };
}
public int ByteSizeLog2 => type switch
public static int GetSizeInBytesLog2(this OperandType type)
{
return type switch
{ {
OperandType.FP32 => 2, OperandType.FP32 => 2,
OperandType.FP64 => 3, OperandType.FP64 => 3,
OperandType.I32 => 2, OperandType.I32 => 2,
OperandType.I64 => 3, OperandType.I64 => 3,
OperandType.V128 => 4, OperandType.V128 => 4,
_ => throw new InvalidOperationException($"Invalid operand type \"{type}\"."), _ => throw new InvalidOperationException($"Invalid operand type \"{type}\".")
}; };
} }
} }

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@@ -45,19 +45,12 @@ namespace ARMeilleure.Memory
public static class MemoryManagerTypeExtensions public static class MemoryManagerTypeExtensions
{ {
public static bool IsHostMapped(this MemoryManagerType type) extension(MemoryManagerType type)
{ {
return type is MemoryManagerType.HostMapped or MemoryManagerType.HostMappedUnsafe; public bool IsHostMapped => type is MemoryManagerType.HostMapped or MemoryManagerType.HostMappedUnsafe;
} public bool IsHostTracked => type is MemoryManagerType.HostTracked or MemoryManagerType.HostTrackedUnsafe;
public static bool IsHostTracked(this MemoryManagerType type) public bool IsHostMappedOrTracked => type.IsHostMapped || type.IsHostTracked;
{
return type is MemoryManagerType.HostTracked or MemoryManagerType.HostTrackedUnsafe;
}
public static bool IsHostMappedOrTracked(this MemoryManagerType type)
{
return type.IsHostMapped() || type.IsHostTracked();
} }
} }
} }

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@@ -412,7 +412,7 @@ namespace ARMeilleure.Translation
{ {
context.SyncQcFlag(); context.SyncQcFlag();
if (block.Branch != null && !block.Branch.Exit && block.Branch.Address <= block.Address) if (block.Branch is { Exit: false } && block.Branch.Address <= block.Address)
{ {
EmitSynchronization(context); EmitSynchronization(context);
} }
@@ -429,14 +429,14 @@ namespace ARMeilleure.Translation
{ {
lblPredicateSkip = Label(); lblPredicateSkip = Label();
InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, context.CurrentIfThenBlockCond.Invert()); InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, context.CurrentIfThenBlockCond.Inverse);
} }
if (opCode is OpCode32 op && op.Cond < Condition.Al) if (opCode is OpCode32 { Cond: < Condition.Al } op)
{ {
lblPredicateSkip = Label(); lblPredicateSkip = Label();
InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, op.Cond.Invert()); InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, op.Cond.Inverse);
} }
if (opCode.Instruction.Emitter != null) if (opCode.Instruction.Emitter != null)

View File

@@ -7,7 +7,7 @@
<ItemGroup> <ItemGroup>
<ProjectReference Include="..\Ryujinx.Audio\Ryujinx.Audio.csproj" /> <ProjectReference Include="..\Ryujinx.Audio\Ryujinx.Audio.csproj" />
<ProjectReference Include="..\Ryujinx.SDL2.Common\Ryujinx.SDL2.Common.csproj" /> <ProjectReference Include="..\Ryujinx.SDL3.Common\Ryujinx.SDL3.Common.csproj" />
</ItemGroup> </ItemGroup>
</Project> </Project>

View File

@@ -1,12 +1,12 @@
namespace Ryujinx.Audio.Backends.SDL2 namespace Ryujinx.Audio.Backends.SDL3
{ {
class SDL2AudioBuffer class SDL3AudioBuffer
{ {
public readonly ulong DriverIdentifier; public readonly ulong DriverIdentifier;
public readonly ulong SampleCount; public readonly ulong SampleCount;
public ulong SamplePlayed; public ulong SamplePlayed;
public SDL2AudioBuffer(ulong driverIdentifier, ulong sampleCount) public SDL3AudioBuffer(ulong driverIdentifier, ulong sampleCount)
{ {
DriverIdentifier = driverIdentifier; DriverIdentifier = driverIdentifier;
SampleCount = sampleCount; SampleCount = sampleCount;

View File

@@ -2,42 +2,41 @@ using Ryujinx.Audio.Common;
using Ryujinx.Audio.Integration; using Ryujinx.Audio.Integration;
using Ryujinx.Common.Logging; using Ryujinx.Common.Logging;
using Ryujinx.Memory; using Ryujinx.Memory;
using Ryujinx.SDL2.Common; using Ryujinx.SDL3.Common;
using System; using System;
using System.Collections.Concurrent; using System.Collections.Concurrent;
using System.Runtime.InteropServices;
using System.Threading; using System.Threading;
using static Ryujinx.Audio.Integration.IHardwareDeviceDriver; using static Ryujinx.Audio.Integration.IHardwareDeviceDriver;
using static SDL2.SDL; using SDL;
using static SDL.SDL3;
using System.Runtime.InteropServices;
namespace Ryujinx.Audio.Backends.SDL2
namespace Ryujinx.Audio.Backends.SDL3
{ {
public class SDL2HardwareDeviceDriver : IHardwareDeviceDriver
using unsafe SDL_AudioStreamCallbackPointer = delegate* unmanaged[Cdecl]<nint, SDL_AudioStream*, int, int, void>;
public class SDL3HardwareDeviceDriver : IHardwareDeviceDriver
{ {
private readonly ManualResetEvent _updateRequiredEvent; private readonly ManualResetEvent _updateRequiredEvent;
private readonly ManualResetEvent _pauseEvent; private readonly ManualResetEvent _pauseEvent;
private readonly ConcurrentDictionary<SDL2HardwareDeviceSession, byte> _sessions; private readonly ConcurrentDictionary<SDL3HardwareDeviceSession, byte> _sessions;
private readonly bool _supportSurroundConfiguration; private readonly bool _supportSurroundConfiguration;
public float Volume { get; set; } public float Volume { get; set; }
// TODO: Add this to SDL2-CS public unsafe SDL3HardwareDeviceDriver()
// NOTE: We use a DllImport here because of marshaling issue for spec.
[DllImport("SDL2")]
private static extern int SDL_GetDefaultAudioInfo(nint name, out SDL_AudioSpec spec, int isCapture);
public SDL2HardwareDeviceDriver()
{ {
_updateRequiredEvent = new ManualResetEvent(false); _updateRequiredEvent = new ManualResetEvent(false);
_pauseEvent = new ManualResetEvent(true); _pauseEvent = new ManualResetEvent(true);
_sessions = new ConcurrentDictionary<SDL2HardwareDeviceSession, byte>(); _sessions = new ConcurrentDictionary<SDL3HardwareDeviceSession, byte>();
SDL2Driver.Instance.Initialize(); SDL3Driver.Instance.Initialize();
int res = SDL_GetDefaultAudioInfo(nint.Zero, out SDL_AudioSpec spec, 0); SDL_AudioSpec spec;
if (!SDL_GetAudioDeviceFormat(SDL_AUDIO_DEVICE_DEFAULT_PLAYBACK, &spec, null))
if (res != 0)
{ {
Logger.Error?.Print(LogClass.Application, Logger.Error?.Print(LogClass.Application,
$"SDL_GetDefaultAudioInfo failed with error \"{SDL_GetError()}\""); $"SDL_GetDefaultAudioInfo failed with error \"{SDL_GetError()}\"");
@@ -54,16 +53,16 @@ namespace Ryujinx.Audio.Backends.SDL2
public static bool IsSupported => IsSupportedInternal(); public static bool IsSupported => IsSupportedInternal();
private static bool IsSupportedInternal() private unsafe static bool IsSupportedInternal()
{ {
uint device = OpenStream(SampleFormat.PcmInt16, Constants.TargetSampleRate, Constants.ChannelCountMax, Constants.TargetSampleCount, null); SDL_AudioStream* device = OpenStream(SampleFormat.PcmInt16, Constants.TargetSampleRate, Constants.ChannelCountMax, Constants.TargetSampleCount, null);
if (device != 0) if (device != null)
{ {
SDL_CloseAudioDevice(device); SDL_DestroyAudioStream(device);
} }
return device != 0; return device != null;
} }
public ManualResetEvent GetUpdateRequiredEvent() public ManualResetEvent GetUpdateRequiredEvent()
@@ -90,67 +89,68 @@ namespace Ryujinx.Audio.Backends.SDL2
if (direction != Direction.Output) if (direction != Direction.Output)
{ {
throw new NotImplementedException("Input direction is currently not implemented on SDL2 backend!"); throw new NotImplementedException("Input direction is currently not implemented on SDL3 backend!");
} }
SDL2HardwareDeviceSession session = new(this, memoryManager, sampleFormat, sampleRate, channelCount); SDL3HardwareDeviceSession session = new(this, memoryManager, sampleFormat, sampleRate, channelCount);
_sessions.TryAdd(session, 0); _sessions.TryAdd(session, 0);
return session; return session;
} }
internal bool Unregister(SDL2HardwareDeviceSession session) internal bool Unregister(SDL3HardwareDeviceSession session)
{ {
return _sessions.TryRemove(session, out _); return _sessions.TryRemove(session, out _);
} }
private static SDL_AudioSpec GetSDL2Spec(SampleFormat requestedSampleFormat, uint requestedSampleRate, uint requestedChannelCount, uint sampleCount) private static SDL_AudioSpec GetSDL3Spec(SampleFormat requestedSampleFormat, uint requestedSampleRate, uint requestedChannelCount)
{ {
return new SDL_AudioSpec return new SDL_AudioSpec
{ {
channels = (byte)requestedChannelCount, channels = (byte)requestedChannelCount,
format = GetSDL2Format(requestedSampleFormat), format = GetSDL3Format(requestedSampleFormat),
freq = (int)requestedSampleRate, freq = (int)requestedSampleRate,
samples = (ushort)sampleCount,
}; };
} }
internal static ushort GetSDL2Format(SampleFormat format) internal static SDL_AudioFormat GetSDL3Format(SampleFormat format)
{ {
return format switch return format switch
{ {
SampleFormat.PcmInt8 => AUDIO_S8, SampleFormat.PcmInt8 => SDL_AudioFormat.SDL_AUDIO_S8,
SampleFormat.PcmInt16 => AUDIO_S16, SampleFormat.PcmInt16 => SDL_AudioFormat.SDL_AUDIO_S16LE,
SampleFormat.PcmInt32 => AUDIO_S32, SampleFormat.PcmInt32 => SDL_AudioFormat.SDL_AUDIO_S32LE,
SampleFormat.PcmFloat => AUDIO_F32, SampleFormat.PcmFloat => SDL_AudioFormat.SDL_AUDIO_F32LE,
_ => throw new ArgumentException($"Unsupported sample format {format}"), _ => throw new ArgumentException($"Unsupported sample format {format}"),
}; };
} }
internal static uint OpenStream(SampleFormat requestedSampleFormat, uint requestedSampleRate, uint requestedChannelCount, uint sampleCount, SDL_AudioCallback callback) internal unsafe static SDL_AudioStream* OpenStream(SampleFormat requestedSampleFormat, uint requestedSampleRate, uint requestedChannelCount, uint sampleCount, SDL3HardwareDeviceSession.SDL_AudioStreamCallback callback)
{ {
SDL_AudioSpec desired = GetSDL2Spec(requestedSampleFormat, requestedSampleRate, requestedChannelCount, sampleCount); SDL_AudioSpec desired = GetSDL3Spec(requestedSampleFormat, requestedSampleRate, requestedChannelCount);
SDL_AudioSpec got = desired;
var pCallback = callback != null ? (SDL_AudioStreamCallbackPointer)Marshal.GetFunctionPointerForDelegate(callback) : null;
desired.callback = callback; // From SDL 3 and on, SDL requires us to set this as a hint
SDL_SetHint(SDL_HINT_AUDIO_DEVICE_SAMPLE_FRAMES, $"{sampleCount}");
SDL_AudioStream* device = SDL_OpenAudioDeviceStream(SDL_AUDIO_DEVICE_DEFAULT_PLAYBACK, &got, pCallback, 0);
uint device = SDL_OpenAudioDevice(nint.Zero, 0, ref desired, out SDL_AudioSpec got, 0); if (device == null)
if (device == 0)
{ {
Logger.Error?.Print(LogClass.Application, $"SDL2 open audio device initialization failed with error \"{SDL_GetError()}\""); Logger.Error?.Print(LogClass.Application, $"SDL3 open audio device initialization failed with error \"{SDL_GetError()}\"");
return 0; return null;
} }
bool isValid = got.format == desired.format && got.freq == desired.freq && got.channels == desired.channels; bool isValid = got.format == desired.format && got.freq == desired.freq && got.channels == desired.channels;
if (!isValid) if (!isValid)
{ {
Logger.Error?.Print(LogClass.Application, "SDL2 open audio device is not valid"); Logger.Error?.Print(LogClass.Application, "SDL3 open audio device is not valid");
SDL_CloseAudioDevice(device); SDL_DestroyAudioStream(device);
return 0; return null;
} }
return device; return device;
@@ -166,12 +166,12 @@ namespace Ryujinx.Audio.Backends.SDL2
{ {
if (disposing) if (disposing)
{ {
foreach (SDL2HardwareDeviceSession session in _sessions.Keys) foreach (SDL3HardwareDeviceSession session in _sessions.Keys)
{ {
session.Dispose(); session.Dispose();
} }
SDL2Driver.Instance.Dispose(); SDL3Driver.Instance.Dispose();
_pauseEvent.Dispose(); _pauseEvent.Dispose();
} }

View File

@@ -6,36 +6,43 @@ using Ryujinx.Memory;
using System; using System;
using System.Collections.Concurrent; using System.Collections.Concurrent;
using System.Threading; using System.Threading;
using SDL;
using static SDL.SDL3;
using System.Runtime.InteropServices;
using static SDL2.SDL; namespace Ryujinx.Audio.Backends.SDL3
namespace Ryujinx.Audio.Backends.SDL2
{ {
class SDL2HardwareDeviceSession : HardwareDeviceSessionOutputBase
unsafe class SDL3HardwareDeviceSession : HardwareDeviceSessionOutputBase
{ {
private readonly SDL2HardwareDeviceDriver _driver; private readonly SDL3HardwareDeviceDriver _driver;
private readonly ConcurrentQueue<SDL2AudioBuffer> _queuedBuffers; private readonly ConcurrentQueue<SDL3AudioBuffer> _queuedBuffers;
private readonly DynamicRingBuffer _ringBuffer; private readonly DynamicRingBuffer _ringBuffer;
private ulong _playedSampleCount; private ulong _playedSampleCount;
private readonly ManualResetEvent _updateRequiredEvent; private readonly ManualResetEvent _updateRequiredEvent;
private uint _outputStream; private SDL_AudioStream* _outputStream;
private bool _hasSetupError; private bool _hasSetupError;
private readonly SDL_AudioCallback _callbackDelegate; private readonly SDL_AudioStreamCallback _callbackDelegate;
private readonly int _bytesPerFrame; private readonly int _bytesPerFrame;
private uint _sampleCount; private uint _sampleCount;
private bool _started; private bool _started;
private float _volume; private float _volume;
private readonly ushort _nativeSampleFormat; private readonly SDL_AudioFormat _nativeSampleFormat;
public SDL2HardwareDeviceSession(SDL2HardwareDeviceDriver driver, IVirtualMemoryManager memoryManager, SampleFormat requestedSampleFormat, uint requestedSampleRate, uint requestedChannelCount) : base(memoryManager, requestedSampleFormat, requestedSampleRate, requestedChannelCount) [UnmanagedFunctionPointer(CallingConvention.Cdecl)]
internal delegate void SDL_AudioStreamCallback(nint session, SDL_AudioStream* stream, int stream_count, int device_count);
public SDL3HardwareDeviceSession(SDL3HardwareDeviceDriver driver, IVirtualMemoryManager memoryManager, SampleFormat requestedSampleFormat, uint requestedSampleRate, uint requestedChannelCount) : base(memoryManager, requestedSampleFormat, requestedSampleRate, requestedChannelCount)
{ {
_driver = driver; _driver = driver;
_updateRequiredEvent = _driver.GetUpdateRequiredEvent(); _updateRequiredEvent = _driver.GetUpdateRequiredEvent();
_queuedBuffers = new ConcurrentQueue<SDL2AudioBuffer>(); _queuedBuffers = new ConcurrentQueue<SDL3AudioBuffer>();
_ringBuffer = new DynamicRingBuffer(); _ringBuffer = new DynamicRingBuffer();
_callbackDelegate = Update; _callbackDelegate = Update;
_bytesPerFrame = BackendHelper.GetSampleSize(RequestedSampleFormat) * (int)RequestedChannelCount; _bytesPerFrame = BackendHelper.GetSampleSize(RequestedSampleFormat) * (int)RequestedChannelCount;
_nativeSampleFormat = SDL2HardwareDeviceDriver.GetSDL2Format(RequestedSampleFormat); _nativeSampleFormat = SDL3HardwareDeviceDriver.GetSDL3Format(RequestedSampleFormat);
_sampleCount = uint.MaxValue; _sampleCount = uint.MaxValue;
_started = false; _started = false;
_volume = 1f; _volume = 1f;
@@ -44,45 +51,51 @@ namespace Ryujinx.Audio.Backends.SDL2
private void EnsureAudioStreamSetup(AudioBuffer buffer) private void EnsureAudioStreamSetup(AudioBuffer buffer)
{ {
uint bufferSampleCount = (uint)GetSampleCount(buffer); uint bufferSampleCount = (uint)GetSampleCount(buffer);
bool needAudioSetup = (_outputStream == 0 && !_hasSetupError) || bool needAudioSetup = (_outputStream == null && !_hasSetupError) ||
(bufferSampleCount >= Constants.TargetSampleCount && bufferSampleCount < _sampleCount); (bufferSampleCount >= Constants.TargetSampleCount && bufferSampleCount < _sampleCount);
if (needAudioSetup) if (needAudioSetup)
{ {
_sampleCount = Math.Max(Constants.TargetSampleCount, bufferSampleCount); _sampleCount = Math.Max(Constants.TargetSampleCount, bufferSampleCount);
uint newOutputStream = SDL2HardwareDeviceDriver.OpenStream(RequestedSampleFormat, RequestedSampleRate, RequestedChannelCount, _sampleCount, _callbackDelegate); SDL_AudioStream* newOutputStream = SDL3HardwareDeviceDriver.OpenStream(RequestedSampleFormat, RequestedSampleRate, RequestedChannelCount, _sampleCount, _callbackDelegate);
_hasSetupError = newOutputStream == 0; _hasSetupError = newOutputStream == null;
if (!_hasSetupError) if (!_hasSetupError)
{ {
if (_outputStream != 0) if (_outputStream != null)
{ {
SDL_CloseAudioDevice(_outputStream); SDL_DestroyAudioStream(_outputStream);
} }
_outputStream = newOutputStream; _outputStream = newOutputStream;
SDL_PauseAudioDevice(_outputStream, _started ? 0 : 1); if (_started) {
SDL_ResumeAudioStreamDevice(_outputStream);
} else {
SDL_PauseAudioStreamDevice(_outputStream);
}
Logger.Info?.Print(LogClass.Audio, $"New audio stream setup with a target sample count of {_sampleCount}"); Logger.Info?.Print(LogClass.Audio, $"New audio stream setup with a target sample count of {_sampleCount}");
} }
} }
} }
private unsafe void Update(nint userdata, nint stream, int streamLength) private unsafe void Update(nint userdata, SDL_AudioStream* streamDevice, int additionalAmount, int totalAmmount)
{ {
Span<byte> streamSpan = new((void*)stream, streamLength); using SpanOwner<byte> stream = SpanOwner<byte>.Rent(additionalAmount);
Span<byte> streamSpan = stream.Span;
int maxFrameCount = (int)GetSampleCount(streamLength);
int maxFrameCount = (int)GetSampleCount(additionalAmount);
int bufferedFrames = _ringBuffer.Length / _bytesPerFrame; int bufferedFrames = _ringBuffer.Length / _bytesPerFrame;
int frameCount = Math.Min(bufferedFrames, maxFrameCount); int frameCount = Math.Min(bufferedFrames, maxFrameCount);
if (frameCount == 0) if (frameCount == 0)
{ {
// SDL2 left the responsibility to the user to clear the buffer. // SDL3 left the responsibility to the user to clear the buffer.
streamSpan.Clear(); streamSpan.Clear();
return; return;
@@ -94,15 +107,17 @@ namespace Ryujinx.Audio.Backends.SDL2
_ringBuffer.Read(samples, 0, samples.Length); _ringBuffer.Read(samples, 0, samples.Length);
fixed (byte* p = samples) // Zero the dest buffer
{ streamSpan.Clear();
nint pStreamSrc = (nint)p;
// Zero the dest buffer fixed (byte* pStreamDst = streamSpan) {
streamSpan.Clear(); fixed (byte* pStreamSrc = samples)
{
// Apply volume to written data // Apply volume to written data
SDL_MixAudioFormat(stream, pStreamSrc, _nativeSampleFormat, (uint)samples.Length, (int)(_driver.Volume * _volume * SDL_MIX_MAXVOLUME)); SDL_MixAudio(pStreamDst, pStreamSrc, _nativeSampleFormat, (uint)samples.Length, _driver.Volume * _volume);
SDL_PutAudioStreamData(streamDevice, (nint)pStreamDst, additionalAmount);
}
} }
ulong sampleCount = GetSampleCount(samples.Length); ulong sampleCount = GetSampleCount(samples.Length);
@@ -111,7 +126,7 @@ namespace Ryujinx.Audio.Backends.SDL2
bool needUpdate = false; bool needUpdate = false;
while (availaibleSampleCount > 0 && _queuedBuffers.TryPeek(out SDL2AudioBuffer driverBuffer)) while (availaibleSampleCount > 0 && _queuedBuffers.TryPeek(out SDL3AudioBuffer driverBuffer))
{ {
ulong sampleStillNeeded = driverBuffer.SampleCount - Interlocked.Read(ref driverBuffer.SamplePlayed); ulong sampleStillNeeded = driverBuffer.SampleCount - Interlocked.Read(ref driverBuffer.SamplePlayed);
ulong playedAudioBufferSampleCount = Math.Min(sampleStillNeeded, availaibleSampleCount); ulong playedAudioBufferSampleCount = Math.Min(sampleStillNeeded, availaibleSampleCount);
@@ -152,9 +167,9 @@ namespace Ryujinx.Audio.Backends.SDL2
{ {
EnsureAudioStreamSetup(buffer); EnsureAudioStreamSetup(buffer);
if (_outputStream != 0) if (_outputStream != null)
{ {
SDL2AudioBuffer driverBuffer = new(buffer.DataPointer, GetSampleCount(buffer)); SDL3AudioBuffer driverBuffer = new(buffer.DataPointer, GetSampleCount(buffer));
_ringBuffer.Write(buffer.Data, 0, buffer.Data.Length); _ringBuffer.Write(buffer.Data, 0, buffer.Data.Length);
@@ -177,9 +192,9 @@ namespace Ryujinx.Audio.Backends.SDL2
{ {
if (!_started) if (!_started)
{ {
if (_outputStream != 0) if (_outputStream != null)
{ {
SDL_PauseAudioDevice(_outputStream, 0); SDL_ResumeAudioStreamDevice(_outputStream);
} }
_started = true; _started = true;
@@ -190,9 +205,9 @@ namespace Ryujinx.Audio.Backends.SDL2
{ {
if (_started) if (_started)
{ {
if (_outputStream != 0) if (_outputStream != null)
{ {
SDL_PauseAudioDevice(_outputStream, 1); SDL_PauseAudioStreamDevice(_outputStream);
} }
_started = false; _started = false;
@@ -203,7 +218,7 @@ namespace Ryujinx.Audio.Backends.SDL2
public override bool WasBufferFullyConsumed(AudioBuffer buffer) public override bool WasBufferFullyConsumed(AudioBuffer buffer)
{ {
if (!_queuedBuffers.TryPeek(out SDL2AudioBuffer driverBuffer)) if (!_queuedBuffers.TryPeek(out SDL3AudioBuffer driverBuffer))
{ {
return true; return true;
} }
@@ -218,9 +233,9 @@ namespace Ryujinx.Audio.Backends.SDL2
PrepareToClose(); PrepareToClose();
Stop(); Stop();
if (_outputStream != 0) if (_outputStream != null)
{ {
SDL_CloseAudioDevice(_outputStream); SDL_DestroyAudioStream(_outputStream);
} }
} }
} }

View File

@@ -58,16 +58,16 @@ namespace Ryujinx.Audio.Backends.CompatLayer
switch (realSampleFormat) switch (realSampleFormat)
{ {
case SampleFormat.PcmInt8: case SampleFormat.PcmInt8:
PcmHelper.ConvertSampleToPcm8(MemoryMarshal.Cast<byte, sbyte>(convertedSamples), samples); PcmHelper.ConvertSampleToPcm8(MemoryMarshal.Cast<byte, sbyte>(new Span<byte>(convertedSamples)), samples);
break; break;
case SampleFormat.PcmInt24: case SampleFormat.PcmInt24:
PcmHelper.ConvertSampleToPcm24(convertedSamples, samples); PcmHelper.ConvertSampleToPcm24(convertedSamples, samples);
break; break;
case SampleFormat.PcmInt32: case SampleFormat.PcmInt32:
PcmHelper.ConvertSampleToPcm32(MemoryMarshal.Cast<byte, int>(convertedSamples), samples); PcmHelper.ConvertSampleToPcm32(MemoryMarshal.Cast<byte, int>(new Span<byte>(convertedSamples)), samples);
break; break;
case SampleFormat.PcmFloat: case SampleFormat.PcmFloat:
PcmHelper.ConvertSampleToPcmFloat(MemoryMarshal.Cast<byte, float>(convertedSamples), samples); PcmHelper.ConvertSampleToPcmFloat(MemoryMarshal.Cast<byte, float>(new Span<byte>(convertedSamples)), samples);
break; break;
default: default:
throw new NotImplementedException($"Sample format conversion from {_userSampleFormat} to {realSampleFormat} not implemented."); throw new NotImplementedException($"Sample format conversion from {_userSampleFormat} to {realSampleFormat} not implemented.");

View File

@@ -27,7 +27,7 @@ namespace Ryujinx.Audio.Integration
public void AppendBuffer(ReadOnlySpan<short> data, uint channelCount) public void AppendBuffer(ReadOnlySpan<short> data, uint channelCount)
{ {
data.CopyTo(MemoryMarshal.Cast<byte, short>(_buffer)); data.CopyTo(MemoryMarshal.Cast<byte, short>(new Span<byte>(_buffer)));
_session.QueueBuffer(new AudioBuffer _session.QueueBuffer(new AudioBuffer
{ {

View File

@@ -1,6 +1,7 @@
using Ryujinx.Audio.Integration; using Ryujinx.Audio.Integration;
using Ryujinx.Audio.Renderer.Server.Sink; using Ryujinx.Audio.Renderer.Server.Sink;
using System; using System;
using System.Buffers;
using System.Runtime.CompilerServices; using System.Runtime.CompilerServices;
using System.Text; using System.Text;
@@ -35,7 +36,9 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
Enabled = true; Enabled = true;
NodeId = nodeId; NodeId = nodeId;
DeviceName = Encoding.ASCII.GetString(sink.Parameter.DeviceName).TrimEnd('\0'); // Unused and wasting time and memory, re-add if needed
// DeviceName = Encoding.ASCII.GetString(sink.Parameter.DeviceName).TrimEnd('\0');
SessionId = sessionId; SessionId = sessionId;
InputCount = sink.Parameter.InputCount; InputCount = sink.Parameter.InputCount;
InputBufferIndices = new ushort[InputCount]; InputBufferIndices = new ushort[InputCount];
@@ -88,7 +91,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
inputCount = bufferCount; inputCount = bufferCount;
} }
short[] outputBuffer = new short[inputCount * SampleCount]; short[] outputBuffer = ArrayPool<short>.Shared.Rent((int)inputCount * SampleCount);
for (int i = 0; i < bufferCount; i++) for (int i = 0; i < bufferCount; i++)
{ {
@@ -100,7 +103,9 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
} }
} }
device.AppendBuffer(outputBuffer, inputCount); device.AppendBuffer(outputBuffer.AsSpan(..((int)inputCount * SampleCount)), inputCount);
ArrayPool<short>.Shared.Return(outputBuffer);
} }
else else
{ {

View File

@@ -99,7 +99,6 @@ namespace Ryujinx.Audio.Renderer.Server
break; break;
case CommandType.BiquadFilterFloatCoeff: case CommandType.BiquadFilterFloatCoeff:
throw new NotImplementedException(); throw new NotImplementedException();
break;
case CommandType.Mix: case CommandType.Mix:
_mixCommandPool.Release((MixCommand)command); _mixCommandPool.Release((MixCommand)command);
break; break;
@@ -159,7 +158,6 @@ namespace Ryujinx.Audio.Renderer.Server
break; break;
case CommandType.MultiTapBiquadFilterFloatCoeff: case CommandType.MultiTapBiquadFilterFloatCoeff:
throw new NotImplementedException(); throw new NotImplementedException();
break;
case CommandType.CaptureBuffer: case CommandType.CaptureBuffer:
_captureBufferCommandPool.Release((CaptureBufferCommand)command); _captureBufferCommandPool.Release((CaptureBufferCommand)command);
break; break;
@@ -171,25 +169,19 @@ namespace Ryujinx.Audio.Renderer.Server
break; break;
case CommandType.BiquadFilterAndMixFloatCoeff: case CommandType.BiquadFilterAndMixFloatCoeff:
throw new NotImplementedException(); throw new NotImplementedException();
break;
case CommandType.MultiTapBiquadFilterAndMix: case CommandType.MultiTapBiquadFilterAndMix:
_multiTapBiquadFilterAndMixCommandPool.Release((MultiTapBiquadFilterAndMixCommand)command); _multiTapBiquadFilterAndMixCommandPool.Release((MultiTapBiquadFilterAndMixCommand)command);
break; break;
case CommandType.MultiTapBiquadFilterAndMixFloatCoef: case CommandType.MultiTapBiquadFilterAndMixFloatCoef:
throw new NotImplementedException(); throw new NotImplementedException();
break;
case CommandType.AuxiliaryBufferGrouped: case CommandType.AuxiliaryBufferGrouped:
throw new NotImplementedException(); throw new NotImplementedException();
break;
case CommandType.FillMixBuffer: case CommandType.FillMixBuffer:
throw new NotImplementedException(); throw new NotImplementedException();
break;
case CommandType.BiquadFilterCrossFade: case CommandType.BiquadFilterCrossFade:
throw new NotImplementedException(); throw new NotImplementedException();
break;
case CommandType.MultiTapBiquadFilterCrossFade: case CommandType.MultiTapBiquadFilterCrossFade:
throw new NotImplementedException(); throw new NotImplementedException();
break;
case CommandType.FillBuffer: case CommandType.FillBuffer:
_fillBufferCommandPool.Release((FillBufferCommand)command); _fillBufferCommandPool.Release((FillBufferCommand)command);
break; break;

View File

@@ -188,6 +188,8 @@ namespace Ryujinx.Audio.Renderer.Server.Voice
/// </summary> /// </summary>
public Span<bool> BiquadFilterNeedInitialization => SpanHelpers.AsSpan<BiquadFilterNeedInitializationArrayStruct, bool>(ref _biquadFilterNeedInitialization); public Span<bool> BiquadFilterNeedInitialization => SpanHelpers.AsSpan<BiquadFilterNeedInitializationArrayStruct, bool>(ref _biquadFilterNeedInitialization);
private static List<ErrorInfo> _waveBufferUpdaterErrorInfosList;
/// <summary> /// <summary>
/// Initialize the <see cref="VoiceInfo"/>. /// Initialize the <see cref="VoiceInfo"/>.
/// </summary> /// </summary>
@@ -216,6 +218,8 @@ namespace Ryujinx.Audio.Renderer.Server.Voice
DataSourceStateAddressInfo.Setup(0, 0); DataSourceStateAddressInfo.Setup(0, 0);
InitializeWaveBuffers(); InitializeWaveBuffers();
_waveBufferUpdaterErrorInfosList ??= [];
} }
/// <summary> /// <summary>
@@ -587,14 +591,14 @@ namespace Ryujinx.Audio.Renderer.Server.Voice
Span<WaveBuffer> waveBuffersSpan = WaveBuffers.AsSpan(); Span<WaveBuffer> waveBuffersSpan = WaveBuffers.AsSpan();
Span<WaveBufferInternal> pWaveBuffersSpan = parameter.WaveBuffers.AsSpan(); Span<WaveBufferInternal> pWaveBuffersSpan = parameter.WaveBuffers.AsSpan();
List<ErrorInfo> errorInfosList = []; _waveBufferUpdaterErrorInfosList.Clear();
for (int i = 0; i < Constants.VoiceWaveBufferCount; i++) for (int i = 0; i < Constants.VoiceWaveBufferCount; i++)
{ {
UpdateWaveBuffer(errorInfosList, ref waveBuffersSpan[i], ref pWaveBuffersSpan[i], parameter.SampleFormat, voiceState.IsWaveBufferValid[i], mapper, ref behaviourInfo); UpdateWaveBuffer(_waveBufferUpdaterErrorInfosList, ref waveBuffersSpan[i], ref pWaveBuffersSpan[i], parameter.SampleFormat, voiceState.IsWaveBufferValid[i], mapper, ref behaviourInfo);
} }
errorInfos = errorInfosList.ToArray(); errorInfos = _waveBufferUpdaterErrorInfosList.ToArray();
} }
/// <summary> /// <summary>
@@ -628,14 +632,14 @@ namespace Ryujinx.Audio.Renderer.Server.Voice
Span<WaveBuffer> waveBuffersSpan = WaveBuffers.AsSpan(); Span<WaveBuffer> waveBuffersSpan = WaveBuffers.AsSpan();
Span<WaveBufferInternal> pWaveBuffersSpan = parameter.WaveBuffers.AsSpan(); Span<WaveBufferInternal> pWaveBuffersSpan = parameter.WaveBuffers.AsSpan();
List<ErrorInfo> errorInfosList = []; _waveBufferUpdaterErrorInfosList.Clear();
for (int i = 0; i < Constants.VoiceWaveBufferCount; i++) for (int i = 0; i < Constants.VoiceWaveBufferCount; i++)
{ {
UpdateWaveBuffer(errorInfosList, ref waveBuffersSpan[i], ref pWaveBuffersSpan[i], parameter.SampleFormat, voiceState.IsWaveBufferValid[i], mapper, ref behaviourInfo); UpdateWaveBuffer(_waveBufferUpdaterErrorInfosList, ref waveBuffersSpan[i], ref pWaveBuffersSpan[i], parameter.SampleFormat, voiceState.IsWaveBufferValid[i], mapper, ref behaviourInfo);
} }
errorInfos = errorInfosList.ToArray(); errorInfos = _waveBufferUpdaterErrorInfosList.ToArray();
} }
/// <summary> /// <summary>

View File

@@ -24,7 +24,10 @@ namespace Ryujinx.Common.Collections
/// <exception cref="ArgumentNullException"><paramref name="key"/> is null</exception> /// <exception cref="ArgumentNullException"><paramref name="key"/> is null</exception>
public int Get(TKey key, ref TValue[] overlaps) public int Get(TKey key, ref TValue[] overlaps)
{ {
ArgumentNullException.ThrowIfNull(key); if (!typeof(TKey).IsValueType)
{
ArgumentNullException.ThrowIfNull(key);
}
IntervalTreeNode<TKey, TValue> node = GetNode(key); IntervalTreeNode<TKey, TValue> node = GetNode(key);
@@ -91,7 +94,10 @@ namespace Ryujinx.Common.Collections
/// <returns>Number of deleted values</returns> /// <returns>Number of deleted values</returns>
public int Remove(TKey key, TValue value) public int Remove(TKey key, TValue value)
{ {
ArgumentNullException.ThrowIfNull(key); if (!typeof(TKey).IsValueType)
{
ArgumentNullException.ThrowIfNull(key);
}
int removed = Delete(key, value); int removed = Delete(key, value);
@@ -144,7 +150,10 @@ namespace Ryujinx.Common.Collections
/// <exception cref="ArgumentNullException"><paramref name="key"/> is null</exception> /// <exception cref="ArgumentNullException"><paramref name="key"/> is null</exception>
private IntervalTreeNode<TKey, TValue> GetNode(TKey key) private IntervalTreeNode<TKey, TValue> GetNode(TKey key)
{ {
ArgumentNullException.ThrowIfNull(key); if (!typeof(TKey).IsValueType)
{
ArgumentNullException.ThrowIfNull(key);
}
IntervalTreeNode<TKey, TValue> node = Root; IntervalTreeNode<TKey, TValue> node = Root;
while (node != null) while (node != null)

View File

@@ -8,6 +8,7 @@ namespace Ryujinx.Common.Configuration.Hid
{ {
Invalid, Invalid,
WindowKeyboard, WindowKeyboard,
GamepadSDL2, GamepadSDL2, //backcompat
GamepadSDL3,
} }
} }

View File

@@ -58,7 +58,7 @@ namespace Ryujinx.Common.Configuration.Hid
return backendType switch return backendType switch
{ {
InputBackendType.WindowKeyboard => JsonSerializer.Deserialize(ref reader, _serializerContext.StandardKeyboardInputConfig), InputBackendType.WindowKeyboard => JsonSerializer.Deserialize(ref reader, _serializerContext.StandardKeyboardInputConfig),
InputBackendType.GamepadSDL2 => JsonSerializer.Deserialize(ref reader, _serializerContext.StandardControllerInputConfig), InputBackendType.GamepadSDL2 or InputBackendType.GamepadSDL3 => JsonSerializer.Deserialize(ref reader, _serializerContext.StandardControllerInputConfig),
_ => throw new InvalidOperationException($"Unknown backend type {backendType}"), _ => throw new InvalidOperationException($"Unknown backend type {backendType}"),
}; };
} }
@@ -70,7 +70,7 @@ namespace Ryujinx.Common.Configuration.Hid
case InputBackendType.WindowKeyboard: case InputBackendType.WindowKeyboard:
JsonSerializer.Serialize(writer, value as StandardKeyboardInputConfig, _serializerContext.StandardKeyboardInputConfig); JsonSerializer.Serialize(writer, value as StandardKeyboardInputConfig, _serializerContext.StandardKeyboardInputConfig);
break; break;
case InputBackendType.GamepadSDL2: case InputBackendType.GamepadSDL2 or InputBackendType.GamepadSDL3:
JsonSerializer.Serialize(writer, value as StandardControllerInputConfig, _serializerContext.StandardControllerInputConfig); JsonSerializer.Serialize(writer, value as StandardControllerInputConfig, _serializerContext.StandardControllerInputConfig);
break; break;
default: default:

View File

@@ -7,11 +7,11 @@ namespace Ryujinx.Common
where T : class where T : class
{ {
private int _size = size; private int _size = size;
private readonly ConcurrentStack<T> _items = new(); private readonly ConcurrentBag<T> _items = new();
public T Allocate() public T Allocate()
{ {
bool success = _items.TryPop(out T instance); bool success = _items.TryTake(out T instance);
if (!success) if (!success)
{ {
@@ -25,7 +25,7 @@ namespace Ryujinx.Common
{ {
if (_size < 0 || _items.Count < _size) if (_size < 0 || _items.Count < _size)
{ {
_items.Push(obj); _items.Add(obj);
} }
} }

View File

@@ -151,6 +151,11 @@ namespace Ryujinx.Cpu.AppleHv
} }
} }
public override bool TryReadUnsafe(ulong va, int length, out Span<byte> data)
{
throw new NotImplementedException();
}
public override void Write(ulong va, ReadOnlySpan<byte> data) public override void Write(ulong va, ReadOnlySpan<byte> data)
{ {
try try

View File

@@ -17,7 +17,7 @@ namespace Ryujinx.Cpu.Jit
_functionTable = AddressTable<ulong>.CreateForArm(for64Bit, memory.Type); _functionTable = AddressTable<ulong>.CreateForArm(for64Bit, memory.Type);
_translator = new Translator(new JitMemoryAllocator(forJit: true), memory, _functionTable); _translator = new Translator(new JitMemoryAllocator(forJit: true), memory, _functionTable);
if (memory.Type.IsHostMappedOrTracked()) if (memory.Type.IsHostMappedOrTracked)
{ {
NativeSignalHandler.InitializeSignalHandler(); NativeSignalHandler.InitializeSignalHandler();
} }

View File

@@ -174,6 +174,11 @@ namespace Ryujinx.Cpu.Jit
} }
} }
} }
public override bool TryReadUnsafe(ulong va, int length, out Span<byte> data)
{
throw new NotImplementedException();
}
public override void Write(ulong va, ReadOnlySpan<byte> data) public override void Write(ulong va, ReadOnlySpan<byte> data)
{ {

View File

@@ -151,6 +151,11 @@ namespace Ryujinx.Cpu.Jit
return default; return default;
} }
} }
public override bool TryReadUnsafe(ulong va, int length, out Span<byte> data)
{
throw new NotImplementedException();
}
public override T ReadTracked<T>(ulong va) public override T ReadTracked<T>(ulong va)
{ {

View File

@@ -227,6 +227,11 @@ namespace Ryujinx.Cpu.Jit
} }
} }
} }
public override bool TryReadUnsafe(ulong va, int length, out Span<byte> data)
{
throw new NotImplementedException();
}
public override bool WriteWithRedundancyCheck(ulong va, ReadOnlySpan<byte> data) public override bool WriteWithRedundancyCheck(ulong va, ReadOnlySpan<byte> data)
{ {

View File

@@ -26,7 +26,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
return; return;
} }
if (_operand.Type.IsInteger()) if (_operand.Type.IsInteger)
{ {
_registerAllocator.FreeTempGprRegister(_operand.AsInt32()); _registerAllocator.FreeTempGprRegister(_operand.AsInt32());
} }

View File

@@ -381,7 +381,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
if (currentCond != ArmCondition.Al) if (currentCond != ArmCondition.Al)
{ {
instructionPointer = context.CodeWriter.InstructionPointer; instructionPointer = context.CodeWriter.InstructionPointer;
context.Arm64Assembler.B(currentCond.Invert(), 0); context.Arm64Assembler.B(currentCond.Inverse, 0);
} }
} }
} }

View File

@@ -104,7 +104,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
if (invert) if (invert)
{ {
conditions[i++] = ((ArmCondition)firstCond).Invert(); conditions[i++] = ((ArmCondition)firstCond).Inverse;
} }
else else
{ {

View File

@@ -1129,7 +1129,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
// We don't need to mask the address for the safe mode, since it is already naturally limited to 32-bit // We don't need to mask the address for the safe mode, since it is already naturally limited to 32-bit
// and can never reach out of the guest address space. // and can never reach out of the guest address space.
if (mmType.IsHostTracked()) if (mmType.IsHostTracked)
{ {
int tempRegister = regAlloc.AllocateTempGprRegister(); int tempRegister = regAlloc.AllocateTempGprRegister();
@@ -1141,7 +1141,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
regAlloc.FreeTempGprRegister(tempRegister); regAlloc.FreeTempGprRegister(tempRegister);
} }
else if (mmType.IsHostMapped()) else if (mmType.IsHostMapped)
{ {
asm.Add(destination64, basePointer, guestAddress); asm.Add(destination64, basePointer, guestAddress);
} }

View File

@@ -132,7 +132,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
InstName lastInstructionName = Instructions[^1].Name; InstName lastInstructionName = Instructions[^1].Name;
return lastInstructionName.IsCall() || lastInstructionName.IsException(); return lastInstructionName.IsCall || lastInstructionName.IsException;
} }
} }
} }

View File

@@ -1042,126 +1042,39 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
static class InstNameExtensions static class InstNameExtensions
{ {
public static bool IsCall(this InstName name) extension(InstName name)
{ {
return name is InstName.Bl or InstName.Blr; public bool IsCall => name is InstName.Bl or InstName.Blr;
}
public static bool IsControlFlowOrException(this InstName name) public bool IsControlFlowOrException => name is
{ InstName.BUncond or InstName.BCond or InstName.Bl or InstName.Blr or InstName.Br or InstName.Brk
switch (name) or InstName.Cbnz or InstName.Cbz or InstName.Ret or InstName.Tbnz or InstName.Tbz or InstName.Svc
or InstName.UdfPermUndef;
public bool IsException => name is InstName.Brk or InstName.Svc or InstName.UdfPermUndef;
public bool IsSystem => name switch
{ {
case InstName.BUncond: InstName.Mrs or InstName.MsrImm or InstName.MsrReg => true,
case InstName.BCond: _ => name.IsException
case InstName.Bl: };
case InstName.Blr:
case InstName.Br:
case InstName.Brk:
case InstName.Cbnz:
case InstName.Cbz:
case InstName.Ret:
case InstName.Tbnz:
case InstName.Tbz:
case InstName.Svc:
case InstName.UdfPermUndef:
return true;
}
return false; public bool IsSystemOrCall => name.IsCall || name is
} InstName.Svc or InstName.Mrs or InstName.MsrImm or InstName.MsrReg
or InstName.Sysl;
public static bool IsException(this InstName name) public bool IsPrivileged => name is
{ InstName.Dcps1 or InstName.Dcps2 or InstName.Dcps3 or InstName.Drps or InstName.Eret or InstName.Ereta
switch (name) or InstName.Hvc or InstName.MsrImm or InstName.Smc;
{
case InstName.Brk:
case InstName.Svc:
case InstName.UdfPermUndef:
return true;
}
return false; public bool IsPartialRegisterUpdateMemory => name is
} InstName.Ld1AdvsimdSnglAsNoPostIndex or InstName.Ld1AdvsimdSnglAsPostIndex
or InstName.Ld2AdvsimdSnglAsNoPostIndex or InstName.Ld2AdvsimdSnglAsPostIndex
or InstName.Ld3AdvsimdSnglAsNoPostIndex or InstName.Ld3AdvsimdSnglAsPostIndex
or InstName.Ld4AdvsimdSnglAsNoPostIndex or InstName.Ld4AdvsimdSnglAsPostIndex;
public static bool IsSystem(this InstName name) public bool IsPrefetchMemory => name is
{ InstName.PrfmImm or InstName.PrfmLit or InstName.PrfmReg or InstName.Prfum;
switch (name)
{
case InstName.Mrs:
case InstName.MsrImm:
case InstName.MsrReg:
return true;
}
return name.IsException();
}
public static bool IsSystemOrCall(this InstName name)
{
switch (name)
{
case InstName.Bl:
case InstName.Blr:
case InstName.Svc:
case InstName.Mrs:
case InstName.MsrImm:
case InstName.MsrReg:
case InstName.Sysl:
return true;
}
return false;
}
public static bool IsPrivileged(this InstName name)
{
switch (name)
{
case InstName.Dcps1:
case InstName.Dcps2:
case InstName.Dcps3:
case InstName.Drps:
case InstName.Eret:
case InstName.Ereta:
case InstName.Hvc:
case InstName.MsrImm:
case InstName.Smc:
return true;
}
return false;
}
public static bool IsPartialRegisterUpdateMemory(this InstName name)
{
switch (name)
{
case InstName.Ld1AdvsimdSnglAsNoPostIndex:
case InstName.Ld1AdvsimdSnglAsPostIndex:
case InstName.Ld2AdvsimdSnglAsNoPostIndex:
case InstName.Ld2AdvsimdSnglAsPostIndex:
case InstName.Ld3AdvsimdSnglAsNoPostIndex:
case InstName.Ld3AdvsimdSnglAsPostIndex:
case InstName.Ld4AdvsimdSnglAsNoPostIndex:
case InstName.Ld4AdvsimdSnglAsPostIndex:
return true;
}
return false;
}
public static bool IsPrefetchMemory(this InstName name)
{
switch (name)
{
case InstName.PrfmImm:
case InstName.PrfmLit:
case InstName.PrfmReg:
case InstName.Prfum:
return true;
}
return false;
} }
} }
} }

View File

@@ -150,7 +150,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
public static int CalculateMaxTemps(MemoryManagerType mmType) public static int CalculateMaxTemps(MemoryManagerType mmType)
{ {
return mmType.IsHostMapped() ? 1 : 2; return mmType.IsHostMapped ? 1 : 2;
} }
public static int CalculateMaxTempsInclFixed(MemoryManagerType mmType) public static int CalculateMaxTempsInclFixed(MemoryManagerType mmType)

View File

@@ -247,7 +247,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
} }
} }
if (!flags.HasFlag(InstFlags.ReadRt) || name.IsPartialRegisterUpdateMemory()) if (!flags.HasFlag(InstFlags.ReadRt) || name.IsPartialRegisterUpdateMemory)
{ {
if (flags.HasFlag(InstFlags.Rt)) if (flags.HasFlag(InstFlags.Rt))
{ {
@@ -281,7 +281,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
gprMask |= MaskFromIndex(ExtractRd(flags, encoding)); gprMask |= MaskFromIndex(ExtractRd(flags, encoding));
} }
if (!flags.HasFlag(InstFlags.ReadRt) || name.IsPartialRegisterUpdateMemory()) if (!flags.HasFlag(InstFlags.ReadRt) || name.IsPartialRegisterUpdateMemory)
{ {
if (flags.HasFlag(InstFlags.Rt)) if (flags.HasFlag(InstFlags.Rt))
{ {

View File

@@ -364,7 +364,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
{ {
InstEmitMemory.RewriteSysInstruction(memoryManager.AddressSpaceBits, memoryManager.Type, writer, regAlloc, encoding); InstEmitMemory.RewriteSysInstruction(memoryManager.AddressSpaceBits, memoryManager.Type, writer, regAlloc, encoding);
} }
else if (instInfo.Name.IsSystem()) else if (instInfo.Name.IsSystem)
{ {
bool needsContextStoreLoad = InstEmitSystem.NeedsContextStoreLoad(instInfo.Name); bool needsContextStoreLoad = InstEmitSystem.NeedsContextStoreLoad(instInfo.Name);
@@ -405,7 +405,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
lastInstructionEncoding = RegisterUtils.RemapRegisters(regAlloc, lastInstructionFlags, lastInstructionEncoding); lastInstructionEncoding = RegisterUtils.RemapRegisters(regAlloc, lastInstructionFlags, lastInstructionEncoding);
if (lastInstructionName.IsCall()) if (lastInstructionName.IsCall)
{ {
context.StoreToContextBeforeCall(blockIndex, pc + 4UL); context.StoreToContextBeforeCall(blockIndex, pc + 4UL);

View File

@@ -257,7 +257,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
(name, flags, AddressForm addressForm) = InstTable.GetInstNameAndFlags(encoding, cpuPreset.Version, cpuPreset.Features); (name, flags, AddressForm addressForm) = InstTable.GetInstNameAndFlags(encoding, cpuPreset.Version, cpuPreset.Features);
if (name.IsPrivileged() || (name == InstName.Sys && IsPrivilegedSys(encoding))) if (name.IsPrivileged || (name == InstName.Sys && IsPrivilegedSys(encoding)))
{ {
name = InstName.UdfPermUndef; name = InstName.UdfPermUndef;
flags = InstFlags.None; flags = InstFlags.None;
@@ -267,7 +267,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
(uint instGprReadMask, uint instFpSimdReadMask) = RegisterUtils.PopulateReadMasks(name, flags, encoding); (uint instGprReadMask, uint instFpSimdReadMask) = RegisterUtils.PopulateReadMasks(name, flags, encoding);
(uint instGprWriteMask, uint instFpSimdWriteMask) = RegisterUtils.PopulateWriteMasks(name, flags, encoding); (uint instGprWriteMask, uint instFpSimdWriteMask) = RegisterUtils.PopulateWriteMasks(name, flags, encoding);
if (name.IsCall()) if (name.IsCall)
{ {
instGprWriteMask |= 1u << RegisterUtils.LrIndex; instGprWriteMask |= 1u << RegisterUtils.LrIndex;
} }
@@ -310,12 +310,12 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
fpSimdUseMask |= instFpSimdReadMask | instFpSimdWriteMask; fpSimdUseMask |= instFpSimdReadMask | instFpSimdWriteMask;
pStateUseMask |= instPStateReadMask | instPStateWriteMask; pStateUseMask |= instPStateReadMask | instPStateWriteMask;
if (name.IsSystemOrCall() && !hasHostCall) if (name.IsSystemOrCall && !hasHostCall)
{ {
hasHostCall = name.IsCall() || InstEmitSystem.NeedsCall(encoding); hasHostCall = name.IsCall || InstEmitSystem.NeedsCall(encoding);
} }
isControlFlow = name.IsControlFlowOrException(); isControlFlow = name.IsControlFlowOrException;
RegisterUse registerUse = new( RegisterUse registerUse = new(
instGprReadMask, instGprReadMask,
@@ -339,7 +339,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
useMask = new(gprUseMask, fpSimdUseMask, pStateUseMask); useMask = new(gprUseMask, fpSimdUseMask, pStateUseMask);
return new(startAddress, address, insts, !isTruncated && !name.IsException(), isTruncated, isLoopEnd); return new(startAddress, address, insts, !isTruncated && !name.IsException, isTruncated, isLoopEnd);
} }
private static bool IsPrivilegedSys(uint encoding) private static bool IsPrivilegedSys(uint encoding)

View File

@@ -55,7 +55,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
ulong pc, ulong pc,
uint encoding) uint encoding)
{ {
if (name.IsPrefetchMemory() && mmType == MemoryManagerType.HostTrackedUnsafe) if (name.IsPrefetchMemory && mmType == MemoryManagerType.HostTrackedUnsafe)
{ {
// Prefetch to invalid addresses do not cause faults, so for memory manager // Prefetch to invalid addresses do not cause faults, so for memory manager
// types where we need to access the page table before doing the prefetch, // types where we need to access the page table before doing the prefetch,
@@ -544,7 +544,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
{ {
Operand basePointer = new(regAlloc.FixedPageTableRegister, RegisterType.Integer, OperandType.I64); Operand basePointer = new(regAlloc.FixedPageTableRegister, RegisterType.Integer, OperandType.I64);
if (mmType.IsHostTracked()) if (mmType.IsHostTracked)
{ {
int tempRegister = regAlloc.AllocateTempGprRegister(); int tempRegister = regAlloc.AllocateTempGprRegister();
@@ -562,7 +562,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
regAlloc.FreeTempGprRegister(tempRegister); regAlloc.FreeTempGprRegister(tempRegister);
} }
else if (mmType.IsHostMapped()) else if (mmType.IsHostMapped)
{ {
if (mmType == MemoryManagerType.HostMapped) if (mmType == MemoryManagerType.HostMapped)
{ {

View File

@@ -22,9 +22,9 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
static class ArmConditionExtensions static class ArmConditionExtensions
{ {
public static ArmCondition Invert(this ArmCondition condition) extension(ArmCondition condition)
{ {
return (ArmCondition)((int)condition ^ 1); public ArmCondition Inverse => (ArmCondition)((int)condition ^ 1);
} }
} }
} }

View File

@@ -673,7 +673,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
public readonly void Mov(Operand rd, Operand rn) public readonly void Mov(Operand rd, Operand rn)
{ {
Debug.Assert(rd.Type.IsInteger()); Debug.Assert(rd.Type.IsInteger);
Orr(rd, new Operand(ZrRegister, RegisterType.Integer, rd.Type), rn); Orr(rd, new Operand(ZrRegister, RegisterType.Integer, rd.Type), rn);
} }
@@ -4544,7 +4544,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
uint instruction; uint instruction;
int scale; int scale;
if (type.IsInteger()) if (type.IsInteger)
{ {
instruction = intInst; instruction = intInst;
@@ -4580,7 +4580,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
{ {
uint instruction; uint instruction;
if (type.IsInteger()) if (type.IsInteger)
{ {
instruction = intInst; instruction = intInst;
@@ -4610,7 +4610,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
{ {
uint instruction; uint instruction;
if (type.IsInteger()) if (type.IsInteger)
{ {
instruction = intInst; instruction = intInst;

View File

@@ -34,7 +34,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
int gprCalleeSavedRegsCount = BitOperations.PopCount(_gprMask); int gprCalleeSavedRegsCount = BitOperations.PopCount(_gprMask);
int fpSimdCalleeSavedRegsCount = BitOperations.PopCount(_fpSimdMask); int fpSimdCalleeSavedRegsCount = BitOperations.PopCount(_fpSimdMask);
return (_hasCall ? 16 : 0) + Align16(gprCalleeSavedRegsCount * 8 + fpSimdCalleeSavedRegsCount * _fpSimdType.GetSizeInBytes()); return (_hasCall ? 16 : 0) + Align16(gprCalleeSavedRegsCount * 8 + fpSimdCalleeSavedRegsCount * _fpSimdType.ByteSize);
} }
public void WritePrologue(ref Assembler asm) public void WritePrologue(ref Assembler asm)
@@ -46,7 +46,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
int fpSimdCalleeSavedRegsCount = BitOperations.PopCount(fpSimdMask); int fpSimdCalleeSavedRegsCount = BitOperations.PopCount(fpSimdMask);
int reservedStackSize = Align16(_reservedStackSize); int reservedStackSize = Align16(_reservedStackSize);
int calleeSaveRegionSize = Align16(gprCalleeSavedRegsCount * 8 + fpSimdCalleeSavedRegsCount * _fpSimdType.GetSizeInBytes()) + reservedStackSize; int calleeSaveRegionSize = Align16(gprCalleeSavedRegsCount * 8 + fpSimdCalleeSavedRegsCount * _fpSimdType.ByteSize) + reservedStackSize;
int offset = 0; int offset = 0;
WritePrologueCalleeSavesPreIndexed(ref asm, ref gprMask, ref offset, calleeSaveRegionSize, OperandType.I64); WritePrologueCalleeSavesPreIndexed(ref asm, ref gprMask, ref offset, calleeSaveRegionSize, OperandType.I64);
@@ -103,7 +103,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
asm.StrRiUn(Register(reg, type), Register(Assembler.SpRegister), 0); asm.StrRiUn(Register(reg, type), Register(Assembler.SpRegister), 0);
} }
offset += type.GetSizeInBytes(); offset += type.ByteSize;
} }
while (mask != 0) while (mask != 0)
@@ -130,7 +130,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
asm.StpRiUn(Register(reg, type), Register(reg2, type), Register(Assembler.SpRegister), 0); asm.StpRiUn(Register(reg, type), Register(reg2, type), Register(Assembler.SpRegister), 0);
} }
offset += type.GetSizeInBytes() * 2; offset += type.ByteSize * 2;
} }
} }
@@ -144,7 +144,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
bool misalignedVector = _fpSimdType == OperandType.V128 && (gprCalleeSavedRegsCount & 1) != 0; bool misalignedVector = _fpSimdType == OperandType.V128 && (gprCalleeSavedRegsCount & 1) != 0;
int offset = gprCalleeSavedRegsCount * 8 + fpSimdCalleeSavedRegsCount * _fpSimdType.GetSizeInBytes(); int offset = gprCalleeSavedRegsCount * 8 + fpSimdCalleeSavedRegsCount * _fpSimdType.ByteSize;
if (misalignedVector) if (misalignedVector)
{ {
@@ -197,7 +197,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
mask &= ~(1u << reg2); mask &= ~(1u << reg2);
offset -= type.GetSizeInBytes() * 2; offset -= type.ByteSize * 2;
if (offset != 0) if (offset != 0)
{ {
@@ -215,7 +215,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
} }
else else
{ {
offset -= type.GetSizeInBytes(); offset -= type.ByteSize;
if (offset != 0) if (offset != 0)
{ {

View File

@@ -14,14 +14,11 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen
static class OperandTypeExtensions static class OperandTypeExtensions
{ {
public static bool IsInteger(this OperandType type) extension(OperandType type)
{ {
return type is OperandType.I32 or OperandType.I64; public bool IsInteger => type is OperandType.I32 or OperandType.I64;
}
public static int GetSizeInBytes(this OperandType type) public int ByteSize => type switch
{
return type switch
{ {
OperandType.FP32 => 4, OperandType.FP32 => 4,
OperandType.FP64 => 8, OperandType.FP64 => 8,

View File

@@ -48,7 +48,7 @@ namespace Ryujinx.Cpu.LightningJit
FunctionTable.Fill = (ulong)Stubs.SlowDispatchStub; FunctionTable.Fill = (ulong)Stubs.SlowDispatchStub;
if (memory.Type.IsHostMappedOrTracked()) if (memory.Type.IsHostMappedOrTracked)
{ {
NativeSignalHandler.InitializeSignalHandler(); NativeSignalHandler.InitializeSignalHandler();
} }

View File

@@ -41,22 +41,12 @@ namespace Ryujinx.Graphics.GAL
public static class BlendFactorExtensions public static class BlendFactorExtensions
{ {
public static bool IsDualSource(this BlendFactor factor) extension(BlendFactor factor)
{ {
switch (factor) public bool IsDualSource => factor is
{ BlendFactor.Src1Color or BlendFactor.Src1ColorGl or BlendFactor.Src1Alpha or BlendFactor.Src1AlphaGl
case BlendFactor.Src1Color: or BlendFactor.OneMinusSrc1Color or BlendFactor.OneMinusSrc1ColorGl or BlendFactor.OneMinusSrc1Alpha
case BlendFactor.Src1ColorGl: or BlendFactor.OneMinusSrc1AlphaGl;
case BlendFactor.Src1Alpha:
case BlendFactor.Src1AlphaGl:
case BlendFactor.OneMinusSrc1Color:
case BlendFactor.OneMinusSrc1ColorGl:
case BlendFactor.OneMinusSrc1Alpha:
case BlendFactor.OneMinusSrc1AlphaGl:
return true;
default:
return false;
}
} }
} }
} }

View File

@@ -1,3 +1,4 @@
using System.Runtime.CompilerServices;
using System.Runtime.InteropServices; using System.Runtime.InteropServices;
namespace Ryujinx.Graphics.GAL namespace Ryujinx.Graphics.GAL
@@ -10,5 +11,7 @@ namespace Ryujinx.Graphics.GAL
public static BufferHandle Null => new(0); public static BufferHandle Null => new(0);
private BufferHandle(ulong value) => _value = value; private BufferHandle(ulong value) => _value = value;
public static implicit operator int(BufferHandle handle) => (int)Unsafe.As<BufferHandle, ulong>(ref handle);
} }
} }

View File

@@ -159,589 +159,191 @@ namespace Ryujinx.Graphics.GAL
/// </summary> /// </summary>
public const int MaxBufferFormatScalarSize = 4; public const int MaxBufferFormatScalarSize = 4;
/// <summary> extension(Format fmt)
/// Gets the byte size for a single component of this format, or its packed size.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>Byte size for a single component, or packed size</returns>
public static int GetScalarSize(this Format format)
{ {
switch (format) /// <summary>
/// Gets the byte size for a single component of this format, or its packed size.
/// </summary>
public int ScalarSize => fmt switch
{ {
case Format.R8Unorm: Format.R8Unorm or Format.R8Snorm or Format.R8Uint or Format.R8Sint or Format.R8G8Unorm
case Format.R8Snorm: or Format.R8G8Snorm or Format.R8G8Uint or Format.R8G8Sint or Format.R8G8B8Unorm
case Format.R8Uint: or Format.R8G8B8Snorm or Format.R8G8B8Uint or Format.R8G8B8Sint or Format.R8G8B8A8Unorm
case Format.R8Sint: or Format.R8G8B8A8Snorm or Format.R8G8B8A8Uint or Format.R8G8B8A8Sint or Format.R8G8B8A8Srgb
case Format.R8G8Unorm: or Format.R4G4Unorm or Format.R8Uscaled or Format.R8Sscaled or Format.R8G8Uscaled
case Format.R8G8Snorm: or Format.R8G8Sscaled or Format.R8G8B8Uscaled or Format.R8G8B8Sscaled or Format.R8G8B8A8Uscaled
case Format.R8G8Uint: or Format.R8G8B8A8Sscaled or Format.B8G8R8A8Unorm or Format.B8G8R8A8Srgb => 1,
case Format.R8G8Sint: Format.R16Float or Format.R16Unorm or Format.R16Snorm or Format.R16Uint or Format.R16Sint
case Format.R8G8B8Unorm: or Format.R16G16Float or Format.R16G16Unorm or Format.R16G16Snorm or Format.R16G16Uint
case Format.R8G8B8Snorm: or Format.R16G16Sint or Format.R16G16B16Float or Format.R16G16B16Unorm or Format.R16G16B16Snorm
case Format.R8G8B8Uint: or Format.R16G16B16Uint or Format.R16G16B16Sint or Format.R16G16B16A16Float
case Format.R8G8B8Sint: or Format.R16G16B16A16Unorm or Format.R16G16B16A16Snorm or Format.R16G16B16A16Uint
case Format.R8G8B8A8Unorm: or Format.R16G16B16A16Sint or Format.R4G4B4A4Unorm or Format.R5G5B5X1Unorm or Format.R5G5B5A1Unorm
case Format.R8G8B8A8Snorm: or Format.R5G6B5Unorm or Format.R16Uscaled or Format.R16Sscaled or Format.R16G16Uscaled
case Format.R8G8B8A8Uint: or Format.R16G16Sscaled or Format.R16G16B16Uscaled or Format.R16G16B16Sscaled
case Format.R8G8B8A8Sint: or Format.R16G16B16A16Uscaled or Format.R16G16B16A16Sscaled or Format.B5G6R5Unorm
case Format.R8G8B8A8Srgb: or Format.B5G5R5A1Unorm or Format.A1B5G5R5Unorm => 2,
case Format.R4G4Unorm: Format.R32Float or Format.R32Uint or Format.R32Sint or Format.R32G32Float or Format.R32G32Uint
case Format.R8Uscaled: or Format.R32G32Sint or Format.R32G32B32Float or Format.R32G32B32Uint or Format.R32G32B32Sint
case Format.R8Sscaled: or Format.R32G32B32A32Float or Format.R32G32B32A32Uint or Format.R32G32B32A32Sint
case Format.R8G8Uscaled: or Format.R10G10B10A2Unorm or Format.R10G10B10A2Uint or Format.R11G11B10Float
case Format.R8G8Sscaled: or Format.R9G9B9E5Float or Format.R32Uscaled or Format.R32Sscaled or Format.R32G32Uscaled
case Format.R8G8B8Uscaled: or Format.R32G32Sscaled or Format.R32G32B32Uscaled or Format.R32G32B32Sscaled
case Format.R8G8B8Sscaled: or Format.R32G32B32A32Uscaled or Format.R32G32B32A32Sscaled or Format.R10G10B10A2Snorm
case Format.R8G8B8A8Uscaled: or Format.R10G10B10A2Sint or Format.R10G10B10A2Uscaled or Format.R10G10B10A2Sscaled
case Format.R8G8B8A8Sscaled: or Format.B10G10R10A2Unorm => 4,
case Format.B8G8R8A8Unorm: Format.S8Uint => 1,
case Format.B8G8R8A8Srgb: Format.D16Unorm => 2,
return 1; Format.S8UintD24Unorm or Format.X8UintD24Unorm or Format.D32Float or Format.D24UnormS8Uint => 4,
Format.D32FloatS8Uint => 8,
Format.Bc1RgbaUnorm or Format.Bc1RgbaSrgb => 8,
Format.Bc2Unorm or Format.Bc3Unorm or Format.Bc2Srgb or Format.Bc3Srgb or Format.Bc4Unorm
or Format.Bc4Snorm or Format.Bc5Unorm or Format.Bc5Snorm or Format.Bc7Unorm or Format.Bc7Srgb
or Format.Bc6HSfloat or Format.Bc6HUfloat => 16,
Format.Etc2RgbUnorm or Format.Etc2RgbPtaUnorm or Format.Etc2RgbSrgb or Format.Etc2RgbPtaSrgb => 8,
Format.Etc2RgbaUnorm or Format.Etc2RgbaSrgb => 16,
Format.Astc4x4Unorm or Format.Astc5x4Unorm or Format.Astc5x5Unorm or Format.Astc6x5Unorm
or Format.Astc6x6Unorm or Format.Astc8x5Unorm or Format.Astc8x6Unorm or Format.Astc8x8Unorm
or Format.Astc10x5Unorm or Format.Astc10x6Unorm or Format.Astc10x8Unorm or Format.Astc10x10Unorm
or Format.Astc12x10Unorm or Format.Astc12x12Unorm or Format.Astc4x4Srgb or Format.Astc5x4Srgb
or Format.Astc5x5Srgb or Format.Astc6x5Srgb or Format.Astc6x6Srgb or Format.Astc8x5Srgb
or Format.Astc8x6Srgb or Format.Astc8x8Srgb or Format.Astc10x5Srgb or Format.Astc10x6Srgb
or Format.Astc10x8Srgb or Format.Astc10x10Srgb or Format.Astc12x10Srgb
or Format.Astc12x12Srgb => 16,
_ => 1
};
case Format.R16Float: /// <summary>
case Format.R16Unorm: /// Checks if the texture format is a depth or depth-stencil format.
case Format.R16Snorm: /// </summary>
case Format.R16Uint: public bool HasDepth => fmt is
case Format.R16Sint: Format.D16Unorm or Format.D24UnormS8Uint or Format.S8UintD24Unorm or Format.X8UintD24Unorm
case Format.R16G16Float: or Format.D32Float or Format.D32FloatS8Uint;
case Format.R16G16Unorm:
case Format.R16G16Snorm:
case Format.R16G16Uint:
case Format.R16G16Sint:
case Format.R16G16B16Float:
case Format.R16G16B16Unorm:
case Format.R16G16B16Snorm:
case Format.R16G16B16Uint:
case Format.R16G16B16Sint:
case Format.R16G16B16A16Float:
case Format.R16G16B16A16Unorm:
case Format.R16G16B16A16Snorm:
case Format.R16G16B16A16Uint:
case Format.R16G16B16A16Sint:
case Format.R4G4B4A4Unorm:
case Format.R5G5B5X1Unorm:
case Format.R5G5B5A1Unorm:
case Format.R5G6B5Unorm:
case Format.R16Uscaled:
case Format.R16Sscaled:
case Format.R16G16Uscaled:
case Format.R16G16Sscaled:
case Format.R16G16B16Uscaled:
case Format.R16G16B16Sscaled:
case Format.R16G16B16A16Uscaled:
case Format.R16G16B16A16Sscaled:
case Format.B5G6R5Unorm:
case Format.B5G5R5A1Unorm:
case Format.A1B5G5R5Unorm:
return 2;
case Format.R32Float: /// <summary>
case Format.R32Uint: /// Checks if the texture format is a stencil or depth-stencil format.
case Format.R32Sint: /// </summary>
case Format.R32G32Float: public bool HasStencil => fmt is
case Format.R32G32Uint: Format.D24UnormS8Uint or Format.S8UintD24Unorm or Format.D32FloatS8Uint or Format.S8Uint;
case Format.R32G32Sint:
case Format.R32G32B32Float:
case Format.R32G32B32Uint:
case Format.R32G32B32Sint:
case Format.R32G32B32A32Float:
case Format.R32G32B32A32Uint:
case Format.R32G32B32A32Sint:
case Format.R10G10B10A2Unorm:
case Format.R10G10B10A2Uint:
case Format.R11G11B10Float:
case Format.R9G9B9E5Float:
case Format.R32Uscaled:
case Format.R32Sscaled:
case Format.R32G32Uscaled:
case Format.R32G32Sscaled:
case Format.R32G32B32Uscaled:
case Format.R32G32B32Sscaled:
case Format.R32G32B32A32Uscaled:
case Format.R32G32B32A32Sscaled:
case Format.R10G10B10A2Snorm:
case Format.R10G10B10A2Sint:
case Format.R10G10B10A2Uscaled:
case Format.R10G10B10A2Sscaled:
case Format.B10G10R10A2Unorm:
return 4;
case Format.S8Uint: /// <summary>
return 1; /// Checks if the texture format is valid to use as image format.
case Format.D16Unorm: /// </summary>
return 2; public bool IsImageCompatible => fmt is
case Format.S8UintD24Unorm: Format.R8Unorm or Format.R8Snorm or Format.R8Uint or Format.R8Sint or Format.R16Float or Format.R16Unorm
case Format.X8UintD24Unorm: or Format.R16Snorm or Format.R16Uint or Format.R16Sint or Format.R32Float or Format.R32Uint
case Format.D32Float: or Format.R32Sint or Format.R8G8Unorm or Format.R8G8Snorm or Format.R8G8Uint or Format.R8G8Sint
case Format.D24UnormS8Uint: or Format.R16G16Float or Format.R16G16Unorm or Format.R16G16Snorm or Format.R16G16Uint
return 4; or Format.R16G16Sint or Format.R32G32Float or Format.R32G32Uint or Format.R32G32Sint
case Format.D32FloatS8Uint: or Format.R8G8B8A8Unorm or Format.R8G8B8A8Snorm or Format.R8G8B8A8Uint or Format.R8G8B8A8Sint
return 8; or Format.R16G16B16A16Float or Format.R16G16B16A16Unorm or Format.R16G16B16A16Snorm
or Format.R16G16B16A16Uint or Format.R16G16B16A16Sint or Format.R32G32B32A32Float
or Format.R32G32B32A32Uint or Format.R32G32B32A32Sint or Format.R10G10B10A2Unorm
or Format.R10G10B10A2Uint or Format.R11G11B10Float or Format.B8G8R8A8Unorm;
case Format.Bc1RgbaUnorm: /// <summary>
case Format.Bc1RgbaSrgb: /// Checks if the texture format is valid to use as render target color format.
return 8; /// </summary>
public bool IsRtColorCompatible => fmt is
Format.R32G32B32A32Float or Format.R32G32B32A32Sint or Format.R32G32B32A32Uint
or Format.R16G16B16A16Unorm or Format.R16G16B16A16Snorm or Format.R16G16B16A16Sint
or Format.R16G16B16A16Uint or Format.R16G16B16A16Float or Format.R32G32Float or Format.R32G32Sint
or Format.R32G32Uint or Format.B8G8R8A8Unorm or Format.B8G8R8A8Srgb or Format.B10G10R10A2Unorm
or Format.R10G10B10A2Unorm or Format.R10G10B10A2Uint or Format.R8G8B8A8Unorm or Format.R8G8B8A8Srgb
or Format.R8G8B8A8Snorm or Format.R8G8B8A8Sint or Format.R8G8B8A8Uint or Format.R16G16Unorm
or Format.R16G16Snorm or Format.R16G16Sint or Format.R16G16Uint or Format.R16G16Float
or Format.R11G11B10Float or Format.R32Sint or Format.R32Uint or Format.R32Float
or Format.B5G6R5Unorm or Format.B5G5R5A1Unorm or Format.R8G8Unorm or Format.R8G8Snorm
or Format.R8G8Sint or Format.R8G8Uint or Format.R16Unorm or Format.R16Snorm or Format.R16Sint
or Format.R16Uint or Format.R16Float or Format.R8Unorm or Format.R8Snorm or Format.R8Sint
or Format.R8Uint;
case Format.Bc2Unorm: /// <summary>
case Format.Bc3Unorm: /// Checks if the texture format is 16 bit packed.
case Format.Bc2Srgb: /// </summary>
case Format.Bc3Srgb: public bool Is16BitPacked => fmt is
case Format.Bc4Unorm: Format.B5G6R5Unorm or Format.B5G5R5A1Unorm or Format.R5G5B5X1Unorm or Format.R5G5B5A1Unorm
case Format.Bc4Snorm: or Format.R5G6B5Unorm or Format.R4G4B4A4Unorm;
case Format.Bc5Unorm:
case Format.Bc5Snorm:
case Format.Bc7Unorm:
case Format.Bc7Srgb:
case Format.Bc6HSfloat:
case Format.Bc6HUfloat:
return 16;
case Format.Etc2RgbUnorm: /// <summary>
case Format.Etc2RgbPtaUnorm: /// Checks if the texture format is an ETC2 format.
case Format.Etc2RgbSrgb: /// </summary>
case Format.Etc2RgbPtaSrgb: public bool IsEtc2 => fmt is
return 8; Format.Etc2RgbaSrgb or Format.Etc2RgbaUnorm or Format.Etc2RgbPtaSrgb
or Format.Etc2RgbPtaUnorm or Format.Etc2RgbSrgb or Format.Etc2RgbUnorm;
case Format.Etc2RgbaUnorm: /// <summary>
case Format.Etc2RgbaSrgb: /// Checks if the texture format is a BGR format.
return 16; /// </summary>
public bool IsBgr => fmt is
Format.B5G6R5Unorm or Format.B5G5R5A1Unorm or Format.B8G8R8A8Unorm or Format.B8G8R8A8Srgb
or Format.B10G10R10A2Unorm;
case Format.Astc4x4Unorm: /// <summary>
case Format.Astc5x4Unorm: /// Checks if the texture format is a depth, stencil or depth-stencil format.
case Format.Astc5x5Unorm: /// </summary>
case Format.Astc6x5Unorm: public bool IsDepthOrStencil => fmt is
case Format.Astc6x6Unorm: Format.D16Unorm or Format.D24UnormS8Uint or Format.S8UintD24Unorm or Format.X8UintD24Unorm
case Format.Astc8x5Unorm: or Format.D32Float or Format.D32FloatS8Uint or Format.S8Uint;
case Format.Astc8x6Unorm:
case Format.Astc8x8Unorm:
case Format.Astc10x5Unorm:
case Format.Astc10x6Unorm:
case Format.Astc10x8Unorm:
case Format.Astc10x10Unorm:
case Format.Astc12x10Unorm:
case Format.Astc12x12Unorm:
case Format.Astc4x4Srgb:
case Format.Astc5x4Srgb:
case Format.Astc5x5Srgb:
case Format.Astc6x5Srgb:
case Format.Astc6x6Srgb:
case Format.Astc8x5Srgb:
case Format.Astc8x6Srgb:
case Format.Astc8x8Srgb:
case Format.Astc10x5Srgb:
case Format.Astc10x6Srgb:
case Format.Astc10x8Srgb:
case Format.Astc10x10Srgb:
case Format.Astc12x10Srgb:
case Format.Astc12x12Srgb:
return 16;
}
return 1; /// <summary>
} /// Checks if the texture format is a float or sRGB color format.
/// </summary>
/// <remarks>
/// Does not include normalized, compressed or depth formats.
/// Float and sRGB formats do not participate in logical operations.
/// </remarks>
public bool IsFloatOrSrgb => fmt is
Format.R8G8B8A8Srgb or Format.B8G8R8A8Srgb or Format.R16Float or Format.R16G16Float
or Format.R16G16B16Float or Format.R16G16B16A16Float or Format.R32Float or Format.R32G32Float
or Format.R32G32B32Float or Format.R32G32B32A32Float or Format.R11G11B10Float
or Format.R9G9B9E5Float;
/// <summary>
/// Checks if the texture format is an ASTC Unorm format.
/// </summary>
public bool IsAstcUnorm => fmt is
Format.Astc4x4Unorm or Format.Astc5x4Unorm or Format.Astc5x5Unorm or Format.Astc6x5Unorm
or Format.Astc6x6Unorm or Format.Astc8x5Unorm or Format.Astc8x6Unorm or Format.Astc8x8Unorm
or Format.Astc10x5Unorm or Format.Astc10x6Unorm or Format.Astc10x8Unorm or Format.Astc10x10Unorm
or Format.Astc12x10Unorm or Format.Astc12x12Unorm;
/// <summary> /// <summary>
/// Checks if the texture format is a depth or depth-stencil format. /// Checks if the texture format is an ASTC SRGB format.
/// </summary> /// </summary>
/// <param name="format">Texture format</param> public bool IsAstcSrgb => fmt is
/// <returns>True if the format is a depth or depth-stencil format, false otherwise</returns> Format.Astc4x4Srgb or Format.Astc5x4Srgb or Format.Astc5x5Srgb or Format.Astc6x5Srgb
public static bool HasDepth(this Format format) or Format.Astc6x6Srgb or Format.Astc8x5Srgb or Format.Astc8x6Srgb or Format.Astc8x8Srgb
{ or Format.Astc10x5Srgb or Format.Astc10x6Srgb or Format.Astc10x8Srgb or Format.Astc10x10Srgb
switch (format) or Format.Astc12x10Srgb or Format.Astc12x12Srgb;
{
case Format.D16Unorm:
case Format.D24UnormS8Uint:
case Format.S8UintD24Unorm:
case Format.X8UintD24Unorm:
case Format.D32Float:
case Format.D32FloatS8Uint:
return true;
}
return false; /// <summary>
} /// Checks if the texture format is an ASTC format.
/// </summary>
public bool IsAstc => fmt.IsAstcUnorm || fmt.IsAstcSrgb;
/// <summary> /// <summary>
/// Checks if the texture format is a stencil or depth-stencil format. /// Checks if the texture format is an unsigned integer color format.
/// </summary> /// </summary>
/// <param name="format">Texture format</param> public bool IsUnsignedInt => fmt is
/// <returns>True if the format is a stencil or depth-stencil format, false otherwise</returns> Format.R8Uint or Format.R16Uint or Format.R32Uint or Format.R8G8Uint or Format.R16G16Uint
public static bool HasStencil(this Format format) or Format.R32G32Uint or Format.R8G8B8Uint or Format.R16G16B16Uint or Format.R32G32B32Uint
{ or Format.R8G8B8A8Uint or Format.R16G16B16A16Uint or Format.R32G32B32A32Uint
switch (format) or Format.R10G10B10A2Uint;
{
case Format.D24UnormS8Uint:
case Format.S8UintD24Unorm:
case Format.D32FloatS8Uint:
case Format.S8Uint:
return true;
}
return false; /// <summary>
} /// Checks if the texture format is a signed integer color format.
/// </summary>
public bool IsSignedInt => fmt is
Format.R8Sint or Format.R16Sint or Format.R32Sint or Format.R8G8Sint or Format.R16G16Sint
or Format.R32G32Sint or Format.R8G8B8Sint or Format.R16G16B16Sint or Format.R32G32B32Sint
or Format.R8G8B8A8Sint or Format.R16G16B16A16Sint or Format.R32G32B32A32Sint
or Format.R10G10B10A2Sint;
/// <summary> /// <summary>
/// Checks if the texture format is valid to use as image format. /// Checks if the texture format is an integer color format.
/// </summary> /// </summary>
/// <param name="format">Texture format</param> public bool IsInt => fmt.IsUnsignedInt || fmt.IsSignedInt;
/// <returns>True if the texture can be used as image, false otherwise</returns>
public static bool IsImageCompatible(this Format format)
{
switch (format)
{
case Format.R8Unorm:
case Format.R8Snorm:
case Format.R8Uint:
case Format.R8Sint:
case Format.R16Float:
case Format.R16Unorm:
case Format.R16Snorm:
case Format.R16Uint:
case Format.R16Sint:
case Format.R32Float:
case Format.R32Uint:
case Format.R32Sint:
case Format.R8G8Unorm:
case Format.R8G8Snorm:
case Format.R8G8Uint:
case Format.R8G8Sint:
case Format.R16G16Float:
case Format.R16G16Unorm:
case Format.R16G16Snorm:
case Format.R16G16Uint:
case Format.R16G16Sint:
case Format.R32G32Float:
case Format.R32G32Uint:
case Format.R32G32Sint:
case Format.R8G8B8A8Unorm:
case Format.R8G8B8A8Snorm:
case Format.R8G8B8A8Uint:
case Format.R8G8B8A8Sint:
case Format.R16G16B16A16Float:
case Format.R16G16B16A16Unorm:
case Format.R16G16B16A16Snorm:
case Format.R16G16B16A16Uint:
case Format.R16G16B16A16Sint:
case Format.R32G32B32A32Float:
case Format.R32G32B32A32Uint:
case Format.R32G32B32A32Sint:
case Format.R10G10B10A2Unorm:
case Format.R10G10B10A2Uint:
case Format.R11G11B10Float:
case Format.B8G8R8A8Unorm:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is valid to use as render target color format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture can be used as render target, false otherwise</returns>
public static bool IsRtColorCompatible(this Format format)
{
switch (format)
{
case Format.R32G32B32A32Float:
case Format.R32G32B32A32Sint:
case Format.R32G32B32A32Uint:
case Format.R16G16B16A16Unorm:
case Format.R16G16B16A16Snorm:
case Format.R16G16B16A16Sint:
case Format.R16G16B16A16Uint:
case Format.R16G16B16A16Float:
case Format.R32G32Float:
case Format.R32G32Sint:
case Format.R32G32Uint:
case Format.B8G8R8A8Unorm:
case Format.B8G8R8A8Srgb:
case Format.B10G10R10A2Unorm:
case Format.R10G10B10A2Unorm:
case Format.R10G10B10A2Uint:
case Format.R8G8B8A8Unorm:
case Format.R8G8B8A8Srgb:
case Format.R8G8B8A8Snorm:
case Format.R8G8B8A8Sint:
case Format.R8G8B8A8Uint:
case Format.R16G16Unorm:
case Format.R16G16Snorm:
case Format.R16G16Sint:
case Format.R16G16Uint:
case Format.R16G16Float:
case Format.R11G11B10Float:
case Format.R32Sint:
case Format.R32Uint:
case Format.R32Float:
case Format.B5G6R5Unorm:
case Format.B5G5R5A1Unorm:
case Format.R8G8Unorm:
case Format.R8G8Snorm:
case Format.R8G8Sint:
case Format.R8G8Uint:
case Format.R16Unorm:
case Format.R16Snorm:
case Format.R16Sint:
case Format.R16Uint:
case Format.R16Float:
case Format.R8Unorm:
case Format.R8Snorm:
case Format.R8Sint:
case Format.R8Uint:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is 16 bit packed.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is 16 bit packed, false otherwise</returns>
public static bool Is16BitPacked(this Format format)
{
switch (format)
{
case Format.B5G6R5Unorm:
case Format.B5G5R5A1Unorm:
case Format.R5G5B5X1Unorm:
case Format.R5G5B5A1Unorm:
case Format.R5G6B5Unorm:
case Format.R4G4B4A4Unorm:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is an ASTC format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is an ASTC format, false otherwise</returns>
public static bool IsAstc(this Format format)
{
return format.IsAstcUnorm() || format.IsAstcSrgb();
}
/// <summary>
/// Checks if the texture format is an ASTC Unorm format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is an ASTC Unorm format, false otherwise</returns>
public static bool IsAstcUnorm(this Format format)
{
switch (format)
{
case Format.Astc4x4Unorm:
case Format.Astc5x4Unorm:
case Format.Astc5x5Unorm:
case Format.Astc6x5Unorm:
case Format.Astc6x6Unorm:
case Format.Astc8x5Unorm:
case Format.Astc8x6Unorm:
case Format.Astc8x8Unorm:
case Format.Astc10x5Unorm:
case Format.Astc10x6Unorm:
case Format.Astc10x8Unorm:
case Format.Astc10x10Unorm:
case Format.Astc12x10Unorm:
case Format.Astc12x12Unorm:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is an ASTC SRGB format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is an ASTC SRGB format, false otherwise</returns>
public static bool IsAstcSrgb(this Format format)
{
switch (format)
{
case Format.Astc4x4Srgb:
case Format.Astc5x4Srgb:
case Format.Astc5x5Srgb:
case Format.Astc6x5Srgb:
case Format.Astc6x6Srgb:
case Format.Astc8x5Srgb:
case Format.Astc8x6Srgb:
case Format.Astc8x8Srgb:
case Format.Astc10x5Srgb:
case Format.Astc10x6Srgb:
case Format.Astc10x8Srgb:
case Format.Astc10x10Srgb:
case Format.Astc12x10Srgb:
case Format.Astc12x12Srgb:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is an ETC2 format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is an ETC2 format, false otherwise</returns>
public static bool IsEtc2(this Format format)
{
switch (format)
{
case Format.Etc2RgbaSrgb:
case Format.Etc2RgbaUnorm:
case Format.Etc2RgbPtaSrgb:
case Format.Etc2RgbPtaUnorm:
case Format.Etc2RgbSrgb:
case Format.Etc2RgbUnorm:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is a BGR format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is a BGR format, false otherwise</returns>
public static bool IsBgr(this Format format)
{
switch (format)
{
case Format.B5G6R5Unorm:
case Format.B5G5R5A1Unorm:
case Format.B8G8R8A8Unorm:
case Format.B8G8R8A8Srgb:
case Format.B10G10R10A2Unorm:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is a depth, stencil or depth-stencil format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the format is a depth, stencil or depth-stencil format, false otherwise</returns>
public static bool IsDepthOrStencil(this Format format)
{
switch (format)
{
case Format.D16Unorm:
case Format.D24UnormS8Uint:
case Format.S8UintD24Unorm:
case Format.X8UintD24Unorm:
case Format.D32Float:
case Format.D32FloatS8Uint:
case Format.S8Uint:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is an unsigned integer color format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is an unsigned integer color format, false otherwise</returns>
public static bool IsUint(this Format format)
{
switch (format)
{
case Format.R8Uint:
case Format.R16Uint:
case Format.R32Uint:
case Format.R8G8Uint:
case Format.R16G16Uint:
case Format.R32G32Uint:
case Format.R8G8B8Uint:
case Format.R16G16B16Uint:
case Format.R32G32B32Uint:
case Format.R8G8B8A8Uint:
case Format.R16G16B16A16Uint:
case Format.R32G32B32A32Uint:
case Format.R10G10B10A2Uint:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is a signed integer color format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is a signed integer color format, false otherwise</returns>
public static bool IsSint(this Format format)
{
switch (format)
{
case Format.R8Sint:
case Format.R16Sint:
case Format.R32Sint:
case Format.R8G8Sint:
case Format.R16G16Sint:
case Format.R32G32Sint:
case Format.R8G8B8Sint:
case Format.R16G16B16Sint:
case Format.R32G32B32Sint:
case Format.R8G8B8A8Sint:
case Format.R16G16B16A16Sint:
case Format.R32G32B32A32Sint:
case Format.R10G10B10A2Sint:
return true;
}
return false;
}
/// <summary>
/// Checks if the texture format is an integer color format.
/// </summary>
/// <param name="format">Texture format</param>
/// <returns>True if the texture format is an integer color format, false otherwise</returns>
public static bool IsInteger(this Format format)
{
return format.IsUint() || format.IsSint();
}
/// <summary>
/// Checks if the texture format is a float or sRGB color format.
/// </summary>
/// <remarks>
/// Does not include normalized, compressed or depth formats.
/// Float and sRGB formats do not participate in logical operations.
/// </remarks>
/// <param name="format">Texture format</param>
/// <returns>True if the format is a float or sRGB color format, false otherwise</returns>
public static bool IsFloatOrSrgb(this Format format)
{
switch (format)
{
case Format.R8G8B8A8Srgb:
case Format.B8G8R8A8Srgb:
case Format.R16Float:
case Format.R16G16Float:
case Format.R16G16B16Float:
case Format.R16G16B16A16Float:
case Format.R32Float:
case Format.R32G32Float:
case Format.R32G32B32Float:
case Format.R32G32B32A32Float:
case Format.R11G11B10Float:
case Format.R9G9B9E5Float:
return true;
}
return false;
} }
} }
} }

View File

@@ -1,11 +1,12 @@
using Ryujinx.Graphics.GAL.Multithreading.Model; using Ryujinx.Graphics.GAL.Multithreading.Model;
using Ryujinx.Graphics.GAL.Multithreading.Resources; using Ryujinx.Graphics.GAL.Multithreading.Resources;
using System.Linq; using System.Buffers;
namespace Ryujinx.Graphics.GAL.Multithreading.Commands namespace Ryujinx.Graphics.GAL.Multithreading.Commands
{ {
struct SetRenderTargetsCommand : IGALCommand, IGALCommand<SetRenderTargetsCommand> struct SetRenderTargetsCommand : IGALCommand, IGALCommand<SetRenderTargetsCommand>
{ {
public static readonly ArrayPool<ITexture> ArrayPool = ArrayPool<ITexture>.Create(512, 50);
public readonly CommandType CommandType => CommandType.SetRenderTargets; public readonly CommandType CommandType => CommandType.SetRenderTargets;
private TableRef<ITexture[]> _colors; private TableRef<ITexture[]> _colors;
private TableRef<ITexture> _depthStencil; private TableRef<ITexture> _depthStencil;
@@ -18,7 +19,18 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Commands
public static void Run(ref SetRenderTargetsCommand command, ThreadedRenderer threaded, IRenderer renderer) public static void Run(ref SetRenderTargetsCommand command, ThreadedRenderer threaded, IRenderer renderer)
{ {
renderer.Pipeline.SetRenderTargets(command._colors.Get(threaded).Select(color => ((ThreadedTexture)color)?.Base).ToArray(), command._depthStencil.GetAs<ThreadedTexture>(threaded)?.Base); ITexture[] colors = command._colors.Get(threaded);
ITexture[] colorsCopy = ArrayPool.Rent(colors.Length);
for (int i = 0; i < colors.Length; i++)
{
colorsCopy[i] = ((ThreadedTexture)colors[i])?.Base;
}
renderer.Pipeline.SetRenderTargets(colorsCopy, command._depthStencil.GetAs<ThreadedTexture>(threaded)?.Base);
ArrayPool.Return(colorsCopy);
ArrayPool.Return(colors);
} }
} }
} }

View File

@@ -29,9 +29,9 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
return new TableRef<T>(_renderer, reference); return new TableRef<T>(_renderer, reference);
} }
public void Dispose() public unsafe void Dispose()
{ {
_renderer.New<CounterEventDisposeCommand>().Set(Ref(this)); _renderer.New<CounterEventDisposeCommand>()->Set(Ref(this));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }

View File

@@ -21,15 +21,15 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
return new TableRef<T>(_renderer, reference); return new TableRef<T>(_renderer, reference);
} }
public void Dispose() public unsafe void Dispose()
{ {
_renderer.New<ImageArrayDisposeCommand>().Set(Ref(this)); _renderer.New<ImageArrayDisposeCommand>()->Set(Ref(this));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetImages(int index, ITexture[] images) public unsafe void SetImages(int index, ITexture[] images)
{ {
_renderer.New<ImageArraySetImagesCommand>().Set(Ref(this), index, Ref(images)); _renderer.New<ImageArraySetImagesCommand>()->Set(Ref(this), index, Ref(images));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
} }

View File

@@ -21,25 +21,25 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
return new TableRef<T>(_renderer, reference); return new TableRef<T>(_renderer, reference);
} }
public void Dispose() public unsafe void Dispose()
{ {
_renderer.New<ProgramDisposeCommand>().Set(Ref(this)); _renderer.New<ProgramDisposeCommand>()->Set(Ref(this));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public byte[] GetBinary() public unsafe byte[] GetBinary()
{ {
ResultBox<byte[]> box = new(); ResultBox<byte[]> box = new();
_renderer.New<ProgramGetBinaryCommand>().Set(Ref(this), Ref(box)); _renderer.New<ProgramGetBinaryCommand>()->Set(Ref(this), Ref(box));
_renderer.InvokeCommand(); _renderer.InvokeCommand();
return box.Result; return box.Result;
} }
public ProgramLinkStatus CheckProgramLink(bool blocking) public unsafe ProgramLinkStatus CheckProgramLink(bool blocking)
{ {
ResultBox<ProgramLinkStatus> box = new(); ResultBox<ProgramLinkStatus> box = new();
_renderer.New<ProgramCheckLinkCommand>().Set(Ref(this), blocking, Ref(box)); _renderer.New<ProgramCheckLinkCommand>()->Set(Ref(this), blocking, Ref(box));
_renderer.InvokeCommand(); _renderer.InvokeCommand();
return box.Result; return box.Result;

View File

@@ -13,9 +13,9 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
_renderer = renderer; _renderer = renderer;
} }
public void Dispose() public unsafe void Dispose()
{ {
_renderer.New<SamplerDisposeCommand>().Set(new TableRef<ThreadedSampler>(_renderer, this)); _renderer.New<SamplerDisposeCommand>()->Set(new TableRef<ThreadedSampler>(_renderer, this));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
} }

View File

@@ -28,25 +28,25 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
return new TableRef<T>(_renderer, reference); return new TableRef<T>(_renderer, reference);
} }
public void CopyTo(ITexture destination, int firstLayer, int firstLevel) public unsafe void CopyTo(ITexture destination, int firstLayer, int firstLevel)
{ {
_renderer.New<TextureCopyToCommand>().Set(Ref(this), Ref((ThreadedTexture)destination), firstLayer, firstLevel); _renderer.New<TextureCopyToCommand>()->Set(Ref(this), Ref((ThreadedTexture)destination), firstLayer, firstLevel);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void CopyTo(ITexture destination, int srcLayer, int dstLayer, int srcLevel, int dstLevel) public unsafe void CopyTo(ITexture destination, int srcLayer, int dstLayer, int srcLevel, int dstLevel)
{ {
_renderer.New<TextureCopyToSliceCommand>().Set(Ref(this), Ref((ThreadedTexture)destination), srcLayer, dstLayer, srcLevel, dstLevel); _renderer.New<TextureCopyToSliceCommand>()->Set(Ref(this), Ref((ThreadedTexture)destination), srcLayer, dstLayer, srcLevel, dstLevel);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void CopyTo(ITexture destination, Extents2D srcRegion, Extents2D dstRegion, bool linearFilter) public unsafe void CopyTo(ITexture destination, Extents2D srcRegion, Extents2D dstRegion, bool linearFilter)
{ {
ThreadedTexture dest = (ThreadedTexture)destination; ThreadedTexture dest = (ThreadedTexture)destination;
if (_renderer.IsGpuThread()) if (_renderer.IsGpuThread())
{ {
_renderer.New<TextureCopyToScaledCommand>().Set(Ref(this), Ref(dest), srcRegion, dstRegion, linearFilter); _renderer.New<TextureCopyToScaledCommand>()->Set(Ref(this), Ref(dest), srcRegion, dstRegion, linearFilter);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
else else
@@ -59,21 +59,21 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
} }
} }
public ITexture CreateView(TextureCreateInfo info, int firstLayer, int firstLevel) public unsafe ITexture CreateView(TextureCreateInfo info, int firstLayer, int firstLevel)
{ {
ThreadedTexture newTex = new(_renderer, info); ThreadedTexture newTex = new(_renderer, info);
_renderer.New<TextureCreateViewCommand>().Set(Ref(this), Ref(newTex), info, firstLayer, firstLevel); _renderer.New<TextureCreateViewCommand>()->Set(Ref(this), Ref(newTex), info, firstLayer, firstLevel);
_renderer.QueueCommand(); _renderer.QueueCommand();
return newTex; return newTex;
} }
public PinnedSpan<byte> GetData() public unsafe PinnedSpan<byte> GetData()
{ {
if (_renderer.IsGpuThread()) if (_renderer.IsGpuThread())
{ {
ResultBox<PinnedSpan<byte>> box = new(); ResultBox<PinnedSpan<byte>> box = new();
_renderer.New<TextureGetDataCommand>().Set(Ref(this), Ref(box)); _renderer.New<TextureGetDataCommand>()->Set(Ref(this), Ref(box));
_renderer.InvokeCommand(); _renderer.InvokeCommand();
return box.Result; return box.Result;
@@ -86,12 +86,12 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
} }
} }
public PinnedSpan<byte> GetData(int layer, int level) public unsafe PinnedSpan<byte> GetData(int layer, int level)
{ {
if (_renderer.IsGpuThread()) if (_renderer.IsGpuThread())
{ {
ResultBox<PinnedSpan<byte>> box = new(); ResultBox<PinnedSpan<byte>> box = new();
_renderer.New<TextureGetDataSliceCommand>().Set(Ref(this), Ref(box), layer, level); _renderer.New<TextureGetDataSliceCommand>()->Set(Ref(this), Ref(box), layer, level);
_renderer.InvokeCommand(); _renderer.InvokeCommand();
return box.Result; return box.Result;
@@ -104,42 +104,42 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
} }
} }
public void CopyTo(BufferRange range, int layer, int level, int stride) public unsafe void CopyTo(BufferRange range, int layer, int level, int stride)
{ {
_renderer.New<TextureCopyToBufferCommand>().Set(Ref(this), range, layer, level, stride); _renderer.New<TextureCopyToBufferCommand>()->Set(Ref(this), range, layer, level, stride);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
/// <inheritdoc/> /// <inheritdoc/>
public void SetData(MemoryOwner<byte> data) public unsafe void SetData(MemoryOwner<byte> data)
{ {
_renderer.New<TextureSetDataCommand>().Set(Ref(this), Ref(data)); _renderer.New<TextureSetDataCommand>()->Set(Ref(this), Ref(data));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
/// <inheritdoc/> /// <inheritdoc/>
public void SetData(MemoryOwner<byte> data, int layer, int level) public unsafe void SetData(MemoryOwner<byte> data, int layer, int level)
{ {
_renderer.New<TextureSetDataSliceCommand>().Set(Ref(this), Ref(data), layer, level); _renderer.New<TextureSetDataSliceCommand>()->Set(Ref(this), Ref(data), layer, level);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
/// <inheritdoc/> /// <inheritdoc/>
public void SetData(MemoryOwner<byte> data, int layer, int level, Rectangle<int> region) public unsafe void SetData(MemoryOwner<byte> data, int layer, int level, Rectangle<int> region)
{ {
_renderer.New<TextureSetDataSliceRegionCommand>().Set(Ref(this), Ref(data), layer, level, region); _renderer.New<TextureSetDataSliceRegionCommand>()->Set(Ref(this), Ref(data), layer, level, region);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetStorage(BufferRange buffer) public unsafe void SetStorage(BufferRange buffer)
{ {
_renderer.New<TextureSetStorageCommand>().Set(Ref(this), buffer); _renderer.New<TextureSetStorageCommand>()->Set(Ref(this), buffer);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void Release() public unsafe void Release()
{ {
_renderer.New<TextureReleaseCommand>().Set(Ref(this)); _renderer.New<TextureReleaseCommand>()->Set(Ref(this));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
} }

View File

@@ -22,21 +22,21 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
return new TableRef<T>(_renderer, reference); return new TableRef<T>(_renderer, reference);
} }
public void Dispose() public unsafe void Dispose()
{ {
_renderer.New<TextureArrayDisposeCommand>().Set(Ref(this)); _renderer.New<TextureArrayDisposeCommand>()->Set(Ref(this));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetSamplers(int index, ISampler[] samplers) public unsafe void SetSamplers(int index, ISampler[] samplers)
{ {
_renderer.New<TextureArraySetSamplersCommand>().Set(Ref(this), index, Ref(samplers.ToArray())); _renderer.New<TextureArraySetSamplersCommand>()->Set(Ref(this), index, Ref(samplers.ToArray()));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetTextures(int index, ITexture[] textures) public unsafe void SetTextures(int index, ITexture[] textures)
{ {
_renderer.New<TextureArraySetTexturesCommand>().Set(Ref(this), index, Ref(textures.ToArray())); _renderer.New<TextureArraySetTexturesCommand>()->Set(Ref(this), index, Ref(textures.ToArray()));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
} }

View File

@@ -21,343 +21,346 @@ namespace Ryujinx.Graphics.GAL.Multithreading
return new TableRef<T>(_renderer, reference); return new TableRef<T>(_renderer, reference);
} }
public void Barrier() public unsafe void Barrier()
{ {
_renderer.New<BarrierCommand>(); _renderer.New<BarrierCommand>();
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void BeginTransformFeedback(PrimitiveTopology topology) public unsafe void BeginTransformFeedback(PrimitiveTopology topology)
{ {
_renderer.New<BeginTransformFeedbackCommand>().Set(topology); _renderer.New<BeginTransformFeedbackCommand>()->Set(topology);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void ClearBuffer(BufferHandle destination, int offset, int size, uint value) public unsafe void ClearBuffer(BufferHandle destination, int offset, int size, uint value)
{ {
_renderer.New<ClearBufferCommand>().Set(destination, offset, size, value); _renderer.New<ClearBufferCommand>()->Set(destination, offset, size, value);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void ClearRenderTargetColor(int index, int layer, int layerCount, uint componentMask, ColorF color) public unsafe void ClearRenderTargetColor(int index, int layer, int layerCount, uint componentMask, ColorF color)
{ {
_renderer.New<ClearRenderTargetColorCommand>().Set(index, layer, layerCount, componentMask, color); _renderer.New<ClearRenderTargetColorCommand>()->Set(index, layer, layerCount, componentMask, color);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void ClearRenderTargetDepthStencil(int layer, int layerCount, float depthValue, bool depthMask, int stencilValue, int stencilMask) public unsafe void ClearRenderTargetDepthStencil(int layer, int layerCount, float depthValue, bool depthMask, int stencilValue, int stencilMask)
{ {
_renderer.New<ClearRenderTargetDepthStencilCommand>().Set(layer, layerCount, depthValue, depthMask, stencilValue, stencilMask); _renderer.New<ClearRenderTargetDepthStencilCommand>()->Set(layer, layerCount, depthValue, depthMask, stencilValue, stencilMask);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void CommandBufferBarrier() public unsafe void CommandBufferBarrier()
{ {
_renderer.New<CommandBufferBarrierCommand>(); _renderer.New<CommandBufferBarrierCommand>();
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void CopyBuffer(BufferHandle source, BufferHandle destination, int srcOffset, int dstOffset, int size) public unsafe void CopyBuffer(BufferHandle source, BufferHandle destination, int srcOffset, int dstOffset, int size)
{ {
_renderer.New<CopyBufferCommand>().Set(source, destination, srcOffset, dstOffset, size); _renderer.New<CopyBufferCommand>()->Set(source, destination, srcOffset, dstOffset, size);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void DispatchCompute(int groupsX, int groupsY, int groupsZ) public unsafe void DispatchCompute(int groupsX, int groupsY, int groupsZ)
{ {
_renderer.New<DispatchComputeCommand>().Set(groupsX, groupsY, groupsZ); _renderer.New<DispatchComputeCommand>()->Set(groupsX, groupsY, groupsZ);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void Draw(int vertexCount, int instanceCount, int firstVertex, int firstInstance) public unsafe void Draw(int vertexCount, int instanceCount, int firstVertex, int firstInstance)
{ {
_renderer.New<DrawCommand>().Set(vertexCount, instanceCount, firstVertex, firstInstance); _renderer.New<DrawCommand>()->Set(vertexCount, instanceCount, firstVertex, firstInstance);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void DrawIndexed(int indexCount, int instanceCount, int firstIndex, int firstVertex, int firstInstance) public unsafe void DrawIndexed(int indexCount, int instanceCount, int firstIndex, int firstVertex, int firstInstance)
{ {
_renderer.New<DrawIndexedCommand>().Set(indexCount, instanceCount, firstIndex, firstVertex, firstInstance); _renderer.New<DrawIndexedCommand>()->Set(indexCount, instanceCount, firstIndex, firstVertex, firstInstance);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void DrawIndexedIndirect(BufferRange indirectBuffer) public unsafe void DrawIndexedIndirect(BufferRange indirectBuffer)
{ {
_renderer.New<DrawIndexedIndirectCommand>().Set(indirectBuffer); _renderer.New<DrawIndexedIndirectCommand>()->Set(indirectBuffer);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void DrawIndexedIndirectCount(BufferRange indirectBuffer, BufferRange parameterBuffer, int maxDrawCount, int stride) public unsafe void DrawIndexedIndirectCount(BufferRange indirectBuffer, BufferRange parameterBuffer, int maxDrawCount, int stride)
{ {
_renderer.New<DrawIndexedIndirectCountCommand>().Set(indirectBuffer, parameterBuffer, maxDrawCount, stride); _renderer.New<DrawIndexedIndirectCountCommand>()->Set(indirectBuffer, parameterBuffer, maxDrawCount, stride);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void DrawIndirect(BufferRange indirectBuffer) public unsafe void DrawIndirect(BufferRange indirectBuffer)
{ {
_renderer.New<DrawIndirectCommand>().Set(indirectBuffer); _renderer.New<DrawIndirectCommand>()->Set(indirectBuffer);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void DrawIndirectCount(BufferRange indirectBuffer, BufferRange parameterBuffer, int maxDrawCount, int stride) public unsafe void DrawIndirectCount(BufferRange indirectBuffer, BufferRange parameterBuffer, int maxDrawCount, int stride)
{ {
_renderer.New<DrawIndirectCountCommand>().Set(indirectBuffer, parameterBuffer, maxDrawCount, stride); _renderer.New<DrawIndirectCountCommand>()->Set(indirectBuffer, parameterBuffer, maxDrawCount, stride);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void DrawTexture(ITexture texture, ISampler sampler, Extents2DF srcRegion, Extents2DF dstRegion) public unsafe void DrawTexture(ITexture texture, ISampler sampler, Extents2DF srcRegion, Extents2DF dstRegion)
{ {
_renderer.New<DrawTextureCommand>().Set(Ref(texture), Ref(sampler), srcRegion, dstRegion); _renderer.New<DrawTextureCommand>()->Set(Ref(texture), Ref(sampler), srcRegion, dstRegion);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void EndHostConditionalRendering() public unsafe void EndHostConditionalRendering()
{ {
_renderer.New<EndHostConditionalRenderingCommand>(); _renderer.New<EndHostConditionalRenderingCommand>();
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void EndTransformFeedback() public unsafe void EndTransformFeedback()
{ {
_renderer.New<EndTransformFeedbackCommand>(); _renderer.New<EndTransformFeedbackCommand>();
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetAlphaTest(bool enable, float reference, CompareOp op) public unsafe void SetAlphaTest(bool enable, float reference, CompareOp op)
{ {
_renderer.New<SetAlphaTestCommand>().Set(enable, reference, op); _renderer.New<SetAlphaTestCommand>()->Set(enable, reference, op);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetBlendState(AdvancedBlendDescriptor blend) public unsafe void SetBlendState(AdvancedBlendDescriptor blend)
{ {
_renderer.New<SetBlendStateAdvancedCommand>().Set(blend); _renderer.New<SetBlendStateAdvancedCommand>()->Set(blend);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetBlendState(int index, BlendDescriptor blend) public unsafe void SetBlendState(int index, BlendDescriptor blend)
{ {
_renderer.New<SetBlendStateCommand>().Set(index, blend); _renderer.New<SetBlendStateCommand>()->Set(index, blend);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetDepthBias(PolygonModeMask enables, float factor, float units, float clamp) public unsafe void SetDepthBias(PolygonModeMask enables, float factor, float units, float clamp)
{ {
_renderer.New<SetDepthBiasCommand>().Set(enables, factor, units, clamp); _renderer.New<SetDepthBiasCommand>()->Set(enables, factor, units, clamp);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetDepthClamp(bool clamp) public unsafe void SetDepthClamp(bool clamp)
{ {
_renderer.New<SetDepthClampCommand>().Set(clamp); _renderer.New<SetDepthClampCommand>()->Set(clamp);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetDepthMode(DepthMode mode) public unsafe void SetDepthMode(DepthMode mode)
{ {
_renderer.New<SetDepthModeCommand>().Set(mode); _renderer.New<SetDepthModeCommand>()->Set(mode);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetDepthTest(DepthTestDescriptor depthTest) public unsafe void SetDepthTest(DepthTestDescriptor depthTest)
{ {
_renderer.New<SetDepthTestCommand>().Set(depthTest); _renderer.New<SetDepthTestCommand>()->Set(depthTest);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetFaceCulling(bool enable, Face face) public unsafe void SetFaceCulling(bool enable, Face face)
{ {
_renderer.New<SetFaceCullingCommand>().Set(enable, face); _renderer.New<SetFaceCullingCommand>()->Set(enable, face);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetFrontFace(FrontFace frontFace) public unsafe void SetFrontFace(FrontFace frontFace)
{ {
_renderer.New<SetFrontFaceCommand>().Set(frontFace); _renderer.New<SetFrontFaceCommand>()->Set(frontFace);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetImage(ShaderStage stage, int binding, ITexture texture) public unsafe void SetImage(ShaderStage stage, int binding, ITexture texture)
{ {
_renderer.New<SetImageCommand>().Set(stage, binding, Ref(texture)); _renderer.New<SetImageCommand>()->Set(stage, binding, Ref(texture));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetImageArray(ShaderStage stage, int binding, IImageArray array) public unsafe void SetImageArray(ShaderStage stage, int binding, IImageArray array)
{ {
_renderer.New<SetImageArrayCommand>().Set(stage, binding, Ref(array)); _renderer.New<SetImageArrayCommand>()->Set(stage, binding, Ref(array));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetImageArraySeparate(ShaderStage stage, int setIndex, IImageArray array) public unsafe void SetImageArraySeparate(ShaderStage stage, int setIndex, IImageArray array)
{ {
_renderer.New<SetImageArraySeparateCommand>().Set(stage, setIndex, Ref(array)); _renderer.New<SetImageArraySeparateCommand>()->Set(stage, setIndex, Ref(array));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetIndexBuffer(BufferRange buffer, IndexType type) public unsafe void SetIndexBuffer(BufferRange buffer, IndexType type)
{ {
_renderer.New<SetIndexBufferCommand>().Set(buffer, type); _renderer.New<SetIndexBufferCommand>()->Set(buffer, type);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetLineParameters(float width, bool smooth) public unsafe void SetLineParameters(float width, bool smooth)
{ {
_renderer.New<SetLineParametersCommand>().Set(width, smooth); _renderer.New<SetLineParametersCommand>()->Set(width, smooth);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetLogicOpState(bool enable, LogicalOp op) public unsafe void SetLogicOpState(bool enable, LogicalOp op)
{ {
_renderer.New<SetLogicOpStateCommand>().Set(enable, op); _renderer.New<SetLogicOpStateCommand>()->Set(enable, op);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetMultisampleState(MultisampleDescriptor multisample) public unsafe void SetMultisampleState(MultisampleDescriptor multisample)
{ {
_renderer.New<SetMultisampleStateCommand>().Set(multisample); _renderer.New<SetMultisampleStateCommand>()->Set(multisample);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetPatchParameters(int vertices, ReadOnlySpan<float> defaultOuterLevel, ReadOnlySpan<float> defaultInnerLevel) public unsafe void SetPatchParameters(int vertices, ReadOnlySpan<float> defaultOuterLevel, ReadOnlySpan<float> defaultInnerLevel)
{ {
_renderer.New<SetPatchParametersCommand>().Set(vertices, defaultOuterLevel, defaultInnerLevel); _renderer.New<SetPatchParametersCommand>()->Set(vertices, defaultOuterLevel, defaultInnerLevel);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetPointParameters(float size, bool isProgramPointSize, bool enablePointSprite, Origin origin) public unsafe void SetPointParameters(float size, bool isProgramPointSize, bool enablePointSprite, Origin origin)
{ {
_renderer.New<SetPointParametersCommand>().Set(size, isProgramPointSize, enablePointSprite, origin); _renderer.New<SetPointParametersCommand>()->Set(size, isProgramPointSize, enablePointSprite, origin);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetPolygonMode(PolygonMode frontMode, PolygonMode backMode) public unsafe void SetPolygonMode(PolygonMode frontMode, PolygonMode backMode)
{ {
_renderer.New<SetPolygonModeCommand>().Set(frontMode, backMode); _renderer.New<SetPolygonModeCommand>()->Set(frontMode, backMode);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetPrimitiveRestart(bool enable, int index) public unsafe void SetPrimitiveRestart(bool enable, int index)
{ {
_renderer.New<SetPrimitiveRestartCommand>().Set(enable, index); _renderer.New<SetPrimitiveRestartCommand>()->Set(enable, index);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetPrimitiveTopology(PrimitiveTopology topology) public unsafe void SetPrimitiveTopology(PrimitiveTopology topology)
{ {
_renderer.New<SetPrimitiveTopologyCommand>().Set(topology); _renderer.New<SetPrimitiveTopologyCommand>()->Set(topology);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetProgram(IProgram program) public unsafe void SetProgram(IProgram program)
{ {
_renderer.New<SetProgramCommand>().Set(Ref(program)); _renderer.New<SetProgramCommand>()->Set(Ref(program));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetRasterizerDiscard(bool discard) public unsafe void SetRasterizerDiscard(bool discard)
{ {
_renderer.New<SetRasterizerDiscardCommand>().Set(discard); _renderer.New<SetRasterizerDiscardCommand>()->Set(discard);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetRenderTargetColorMasks(ReadOnlySpan<uint> componentMask) public unsafe void SetRenderTargetColorMasks(ReadOnlySpan<uint> componentMask)
{ {
_renderer.New<SetRenderTargetColorMasksCommand>().Set(_renderer.CopySpan(componentMask)); _renderer.New<SetRenderTargetColorMasksCommand>()->Set(_renderer.CopySpan(componentMask));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetRenderTargets(ITexture[] colors, ITexture depthStencil) public unsafe void SetRenderTargets(ITexture[] colors, ITexture depthStencil)
{ {
_renderer.New<SetRenderTargetsCommand>().Set(Ref(colors.ToArray()), Ref(depthStencil)); ITexture[] colorsCopy = SetRenderTargetsCommand.ArrayPool.Rent(colors.Length);
colors.CopyTo(colorsCopy, 0);
_renderer.New<SetRenderTargetsCommand>()->Set(Ref(colorsCopy), Ref(depthStencil));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetScissors(ReadOnlySpan<Rectangle<int>> scissors) public unsafe void SetScissors(ReadOnlySpan<Rectangle<int>> scissors)
{ {
_renderer.New<SetScissorsCommand>().Set(_renderer.CopySpan(scissors)); _renderer.New<SetScissorsCommand>()->Set(_renderer.CopySpan(scissors));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetStencilTest(StencilTestDescriptor stencilTest) public unsafe void SetStencilTest(StencilTestDescriptor stencilTest)
{ {
_renderer.New<SetStencilTestCommand>().Set(stencilTest); _renderer.New<SetStencilTestCommand>()->Set(stencilTest);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetStorageBuffers(ReadOnlySpan<BufferAssignment> buffers) public unsafe void SetStorageBuffers(ReadOnlySpan<BufferAssignment> buffers)
{ {
_renderer.New<SetStorageBuffersCommand>().Set(_renderer.CopySpan(buffers)); _renderer.New<SetStorageBuffersCommand>()->Set(_renderer.CopySpan(buffers));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetTextureAndSampler(ShaderStage stage, int binding, ITexture texture, ISampler sampler) public unsafe void SetTextureAndSampler(ShaderStage stage, int binding, ITexture texture, ISampler sampler)
{ {
_renderer.New<SetTextureAndSamplerCommand>().Set(stage, binding, Ref(texture), Ref(sampler)); _renderer.New<SetTextureAndSamplerCommand>()->Set(stage, binding, Ref(texture), Ref(sampler));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetTextureArray(ShaderStage stage, int binding, ITextureArray array) public unsafe void SetTextureArray(ShaderStage stage, int binding, ITextureArray array)
{ {
_renderer.New<SetTextureArrayCommand>().Set(stage, binding, Ref(array)); _renderer.New<SetTextureArrayCommand>()->Set(stage, binding, Ref(array));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetTextureArraySeparate(ShaderStage stage, int setIndex, ITextureArray array) public unsafe void SetTextureArraySeparate(ShaderStage stage, int setIndex, ITextureArray array)
{ {
_renderer.New<SetTextureArraySeparateCommand>().Set(stage, setIndex, Ref(array)); _renderer.New<SetTextureArraySeparateCommand>()->Set(stage, setIndex, Ref(array));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetTransformFeedbackBuffers(ReadOnlySpan<BufferRange> buffers) public unsafe void SetTransformFeedbackBuffers(ReadOnlySpan<BufferRange> buffers)
{ {
_renderer.New<SetTransformFeedbackBuffersCommand>().Set(_renderer.CopySpan(buffers)); _renderer.New<SetTransformFeedbackBuffersCommand>()->Set(_renderer.CopySpan(buffers));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetUniformBuffers(ReadOnlySpan<BufferAssignment> buffers) public unsafe void SetUniformBuffers(ReadOnlySpan<BufferAssignment> buffers)
{ {
_renderer.New<SetUniformBuffersCommand>().Set(_renderer.CopySpan(buffers)); _renderer.New<SetUniformBuffersCommand>()->Set(_renderer.CopySpan(buffers));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetUserClipDistance(int index, bool enableClip) public unsafe void SetUserClipDistance(int index, bool enableClip)
{ {
_renderer.New<SetUserClipDistanceCommand>().Set(index, enableClip); _renderer.New<SetUserClipDistanceCommand>()->Set(index, enableClip);
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetVertexAttribs(ReadOnlySpan<VertexAttribDescriptor> vertexAttribs) public unsafe void SetVertexAttribs(ReadOnlySpan<VertexAttribDescriptor> vertexAttribs)
{ {
_renderer.New<SetVertexAttribsCommand>().Set(_renderer.CopySpan(vertexAttribs)); _renderer.New<SetVertexAttribsCommand>()->Set(_renderer.CopySpan(vertexAttribs));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetVertexBuffers(ReadOnlySpan<VertexBufferDescriptor> vertexBuffers) public unsafe void SetVertexBuffers(ReadOnlySpan<VertexBufferDescriptor> vertexBuffers)
{ {
_renderer.New<SetVertexBuffersCommand>().Set(_renderer.CopySpan(vertexBuffers)); _renderer.New<SetVertexBuffersCommand>()->Set(_renderer.CopySpan(vertexBuffers));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void SetViewports(ReadOnlySpan<Viewport> viewports) public unsafe void SetViewports(ReadOnlySpan<Viewport> viewports)
{ {
_renderer.New<SetViewportsCommand>().Set(_renderer.CopySpan(viewports)); _renderer.New<SetViewportsCommand>()->Set(_renderer.CopySpan(viewports));
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void TextureBarrier() public unsafe void TextureBarrier()
{ {
_renderer.New<TextureBarrierCommand>(); _renderer.New<TextureBarrierCommand>();
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public void TextureBarrierTiled() public unsafe void TextureBarrierTiled()
{ {
_renderer.New<TextureBarrierTiledCommand>(); _renderer.New<TextureBarrierTiledCommand>();
_renderer.QueueCommand(); _renderer.QueueCommand();
} }
public bool TryHostConditionalRendering(ICounterEvent value, ulong compare, bool isEqual) public unsafe bool TryHostConditionalRendering(ICounterEvent value, ulong compare, bool isEqual)
{ {
ThreadedCounterEvent evt = value as ThreadedCounterEvent; ThreadedCounterEvent evt = value as ThreadedCounterEvent;
if (evt != null) if (evt != null)
@@ -369,20 +372,20 @@ namespace Ryujinx.Graphics.GAL.Multithreading
return false; return false;
} }
_renderer.New<TryHostConditionalRenderingCommand>().Set(Ref(evt), compare, isEqual); _renderer.New<TryHostConditionalRenderingCommand>()->Set(Ref(evt), compare, isEqual);
_renderer.QueueCommand(); _renderer.QueueCommand();
return true; return true;
} }
} }
_renderer.New<TryHostConditionalRenderingFlushCommand>().Set(Ref(evt), Ref<ThreadedCounterEvent>(null), isEqual); _renderer.New<TryHostConditionalRenderingFlushCommand>()->Set(Ref(evt), Ref<ThreadedCounterEvent>(null), isEqual);
_renderer.QueueCommand(); _renderer.QueueCommand();
return false; return false;
} }
public bool TryHostConditionalRendering(ICounterEvent value, ICounterEvent compare, bool isEqual) public unsafe bool TryHostConditionalRendering(ICounterEvent value, ICounterEvent compare, bool isEqual)
{ {
_renderer.New<TryHostConditionalRenderingFlushCommand>().Set(Ref(value as ThreadedCounterEvent), Ref(compare as ThreadedCounterEvent), isEqual); _renderer.New<TryHostConditionalRenderingFlushCommand>()->Set(Ref(value as ThreadedCounterEvent), Ref(compare as ThreadedCounterEvent), isEqual);
_renderer.QueueCommand(); _renderer.QueueCommand();
return false; return false;
} }

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