Attempt 1

2026-02-20 15:51:09 +00:00 · 2025-04-09 01:03:32 -05:00
1096 changed files with 22174 additions and 34633 deletions
--- a/.editorconfig
+++ b/.editorconfig
@@ -16,17 +16,6 @@ tab_width = 4
 # New line preferences
 end_of_line = lf
 insert_final_newline = true
-dotnet_style_coalesce_expression = true:suggestion
-dotnet_style_null_propagation = true:suggestion
-dotnet_style_prefer_is_null_check_over_reference_equality_method = true:suggestion
-dotnet_style_prefer_auto_properties = true:silent
-dotnet_style_object_initializer = true:suggestion
-dotnet_style_collection_initializer = true:suggestion
-dotnet_style_prefer_simplified_boolean_expressions = true:suggestion
-dotnet_style_prefer_conditional_expression_over_assignment = true:silent
-dotnet_style_prefer_conditional_expression_over_return = true:silent
-dotnet_style_operator_placement_when_wrapping = beginning_of_line
-dotnet_style_explicit_tuple_names = true:suggestion

 # Markdown, JSON, YAML, props and csproj files
 [*.{md,json,yml,props,csproj}]
@@ -117,7 +106,7 @@ csharp_style_conditional_delegate_call = true:suggestion
 csharp_prefer_static_local_function = true:suggestion
 csharp_preferred_modifier_order = public,private,protected,internal,static,extern,new,virtual,abstract,sealed,override,readonly,unsafe,volatile,async:silent
 csharp_style_prefer_readonly_struct = true
-csharp_style_prefer_method_group_conversion = true:silent
+csharp_style_prefer_method_group_conversion = true

 # Code-block preferences
 csharp_prefer_braces = true:silent
@@ -188,9 +177,9 @@ csharp_preserve_single_line_statements = false

 # Naming rules

-dotnet_naming_rule.interfaces_should_be_prefixed_with_i.severity = suggestion
+dotnet_naming_rule.interfaces_should_be_prefixed_with_I.severity = suggestion
 dotnet_naming_rule.interfaces_should_be_prefixed_with_I.symbols = interface
-dotnet_naming_rule.interfaces_should_be_prefixed_with_i.style = IPascalCase
+dotnet_naming_rule.interfaces_should_be_prefixed_with_I.style = IPascalCase

 dotnet_naming_rule.types_should_be_pascal_case.severity = suggestion
 dotnet_naming_rule.types_should_be_pascal_case.symbols = types
@@ -247,22 +236,28 @@ dotnet_naming_style.IPascalCase.required_suffix =
 dotnet_naming_style.IPascalCase.word_separator =
 dotnet_naming_style.IPascalCase.capitalization = pascal_case

-# Other settings
-csharp_style_prefer_top_level_statements = true:suggestion
-csharp_style_prefer_primary_constructors = false:suggestion
-csharp_prefer_system_threading_lock = true:suggestion
-
-
-# Analyzers
-dotnet_diagnostic.CA1069.severity = none  # CA1069: Enums values should not be duplicated
-# Disable Collection initialization can be simplified
+# TODO:
+# .NET 8 migration (new warnings are caused by the NET 8 C# compiler and analyzer)
+# The following info messages might need to be fixed in the source code instead of hiding the actual message
+# Without the following lines, dotnet format would fail
+# Disable "Collection initialization can be simplified"
 dotnet_diagnostic.IDE0028.severity = none
 dotnet_diagnostic.IDE0300.severity = none
 dotnet_diagnostic.IDE0301.severity = none
 dotnet_diagnostic.IDE0302.severity = none
 dotnet_diagnostic.IDE0305.severity = none
-dotnet_diagnostic.CS9113.severity = none  # CS9113: Parameter 'value' is unread
-dotnet_diagnostic.IDE0130.severity = none  # IDE0130: Namespace does not match folder structure
+# Disable "'new' expression can be simplified"
+dotnet_diagnostic.IDE0090.severity = none
+# Disable "Use primary constructor"
+dotnet_diagnostic.IDE0290.severity = none
+# Disable "Member '' does not access instance data and can be marked as static"
+dotnet_diagnostic.CA1822.severity = none
+# Disable "Change type of field '' from '' to '' for improved performance"
+dotnet_diagnostic.CA1859.severity = none
+# Disable "Prefer 'static readonly' fields over constant array arguments if the called method is called repeatedly and is not mutating the passed array"
+dotnet_diagnostic.CA1861.severity = none
+# Disable "Prefer using 'string.Equals(string, StringComparison)' to perform a case-insensitive comparison, but keep in mind that this might cause subtle changes in behavior, so make sure to conduct thorough testing after applying the suggestion, or if culturally sensitive comparison is not required, consider using 'StringComparison.OrdinalIgnoreCase'"
+dotnet_diagnostic.CA1862.severity = none

 [src/Ryujinx/UI/ViewModels/**.cs]
 # Disable "mark members as static" rule for ViewModels
--- a/.gitattributes
+++ b/.gitattributes
@@ -2,4 +2,3 @@
 # Set default behavior to automatically normalize line endings.
 ###############################################################################
 * text=auto eol=lf
-*.json text eol=lf
--- a/.github/workflows/canary.yml
+++ b/.github/workflows/canary.yml
@@ -1,4 +1,4 @@
-name: Canary CI
+name: Canary release job

 on:
  workflow_dispatch:
@@ -19,18 +19,70 @@ concurrency: release
 env:
  POWERSHELL_TELEMETRY_OPTOUT: 1
  DOTNET_CLI_TELEMETRY_OPTOUT: 1
+  RYUJINX_BASE_VERSION: "1.3"
  RYUJINX_TARGET_RELEASE_CHANNEL_NAME: "canary"
+  RYUJINX_TARGET_RELEASE_CHANNEL_OWNER: "Ryubing"
+  RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO: "Ryujinx"
+  RYUJINX_TARGET_RELEASE_CHANNEL_REPO: "Canary-Releases"
  RELEASE: 1

 jobs:
+  tag:
+    name: Create tag
+    runs-on: ubuntu-24.04
+    steps:
+      - name: Get version info
+        id: version_info
+        run: |
+          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
+          echo "prev_build_version=${{ env.RYUJINX_BASE_VERSION }}.$((${{ github.run_number }} - 1))" >> $GITHUB_OUTPUT
+        shell: bash
+        
+      - name: Install GitLabCli
+        run: |
+          mkdir -p $HOME/.bin
+          gh release download -R GreemDev/GLI -O gli -p 'GitLabCli-linux_x64'
+          chmod +x gli
+          mv gli $HOME/.bin/
+          echo "$HOME/.bin" >> $GITHUB_PATH
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          
+      - name: Create GitLab tag
+        run: gli --access-token=${{ secrets.GITLAB_TOKEN }} --project=ryubing/ryujinx --command=CreateTag "Canary-${{ steps.version_info.outputs.build_version }}|master"
+
+      - name: Create release
+        uses: ncipollo/release-action@v1
+        with:
+          name: "Canary ${{ steps.version_info.outputs.build_version }}"
+          tag: ${{ steps.version_info.outputs.build_version }}
+          body: |            
+            # Canary builds:
+            
+            These builds are experimental and may sometimes not work, use [regular builds](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/latest) instead if that sounds like something you don't want to deal with.
+            
+            | Platform | Artifact |
+            |--|--|
+            | Windows 64-bit | [Canary Windows Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-win_x64.zip) |
+            | Windows ARM 64-bit | [Canary Windows ARM Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-win_arm64.zip) |
+            | Linux 64-bit | [Canary Linux Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz) |
+            | Linux ARM 64-bit | [Canary Linux ARM Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-linux_arm64.tar.gz) |
+            | macOS | [Canary macOS Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-macos_universal.app.tar.gz) |
+            
+            **[Full Changelog](https://git.ryujinx.app/ryubing/ryujinx/-/compare/Canary-${{ steps.version_info.outputs.prev_build_version }}...Canary-${{ steps.version_info.outputs.build_version }})**
+          omitBodyDuringUpdate: true
+          owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
+          repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
+          token: ${{ secrets.RELEASE_TOKEN }}
+
  release:
    name: Release for ${{ matrix.platform.name }}
    runs-on: ${{ matrix.platform.os }}
    strategy:
      matrix:
        platform:
-          - { name: win-x64,     os: ubuntu-latest, zip_os_name: win_x64     }
-          #- { name: win-arm64,   os: ubuntu-latest, zip_os_name: win_arm64   }
+          - { name: win-x64,     os: windows-latest, zip_os_name: win_x64     }
+          - { name: win-arm64,   os: windows-latest, zip_os_name: win_arm64   }
          - { name: linux-x64,   os: ubuntu-latest,  zip_os_name: linux_x64   }
          - { name: linux-arm64, os: ubuntu-latest,  zip_os_name: linux_arm64 }
    steps:
@@ -43,27 +95,12 @@ jobs:
      - name: Overwrite csc problem matcher
        run: echo "::add-matcher::.github/csc.json"

-      - name: Install 7zip
-        run: |
-          sudo apt install -y 7zip
-
-      - name: Install gli
-        run: |
-          mkdir -p $HOME/.bin
-          gh release download -R GreemDev/GLI -O gli -p 'gli-linux-x64'
-          chmod +x gli
-          mv gli $HOME/.bin/
-          echo "$HOME/.bin" >> $GITHUB_PATH
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-
      - name: Get version info
        id: version_info
        run: |
-          echo "build_version=$(gli get-next-version -c Canary -R)" >> $GITHUB_OUTPUT
-          echo "prev_build_version=$(gli get-current-version -c Canary -R)" >> $GITHUB_OUTPUT
+          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
+          echo "prev_build_version=${{ env.RYUJINX_BASE_VERSION }}.$((${{ github.run_number }} - 1))" >> $GITHUB_OUTPUT
          echo "git_short_hash=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
-          echo "commit_message=$(git log -1 --pretty=%B)" >> $GITHUB_OUTPUT
        shell: bash

      - name: Configure for release
@@ -71,8 +108,11 @@ jobs:
          sed -r --in-place 's/\%\%RYUJINX_BUILD_VERSION\%\%/${{ steps.version_info.outputs.build_version }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_BUILD_GIT_HASH\%\%/${{ steps.version_info.outputs.git_short_hash }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_NAME\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_NAME }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_OWNER\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/Config\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place '/^Name=Ryujinx$/s/Name=Ryujinx/Name=Ryujinx-Canary/' distribution/linux/Ryujinx.desktop
+          sed -r --in-place '/^Name=Ryujinx$/s/Name=Ryujinx/Name=Ryujinx-Canary/' distribution/linux/Ryujinx.desktop          
        shell: bash

      - name: Create output dir
@@ -83,32 +123,26 @@ jobs:
          dotnet publish -c Release -r "${{ matrix.platform.name }}" -o ./publish -p:Version="${{ steps.version_info.outputs.build_version }}" -p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" -p:DebugType=embedded src/Ryujinx --self-contained

      - name: Packing Windows builds
-        if: contains(matrix.platform.name, 'win')
+        if: matrix.platform.os == 'windows-latest'
        run: |
          pushd publish
          rm libarmeilleure-jitsupport.dylib
          7z a ../release_output/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.zip ../publish
          popd
-
-          gli upload-generic-package -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/canary -n Ryubing-Canary -v ${{ steps.version_info.outputs.build_version }} -p release_output/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.zip
        shell: bash
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

      - name: Packing Linux builds
-        if: contains(matrix.platform.name, 'linux')
+        if: matrix.platform.os == 'ubuntu-latest'
        run: |
          pushd publish
          rm libarmeilleure-jitsupport.dylib
          chmod +x Ryujinx.sh Ryujinx
          tar -czvf ../release_output/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.tar.gz ../publish
          popd
-
-          gli upload-generic-package -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/canary -n Ryubing-Canary -v ${{ steps.version_info.outputs.build_version }} -p release_output/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.tar.gz
        shell: bash
-
+      
      - name: Build AppImage (Linux)
-        if: contains(matrix.platform.name, 'linux')
+        if: matrix.platform.os == 'ubuntu-latest'
        run: |
          BUILD_VERSION="${{ steps.version_info.outputs.build_version }}"
          PLATFORM_NAME="${{ matrix.platform.name }}"
@@ -135,14 +169,41 @@ jobs:
            exit 1
          fi

+          export UFLAG="gh-releases-zsync|${{ github.repository_owner }}|Canary-Releases|latest|*-$ARCH_NAME.AppImage.zsync"
          BUILDDIR=publish OUTDIR=publish_appimage distribution/linux/appimage/build-appimage.sh

          pushd publish_appimage
          mv Ryujinx.AppImage ../release_output/ryujinx-canary-$BUILD_VERSION-$ARCH_NAME.AppImage
-          popd
-          
-          gli upload-generic-package -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/canary -n Ryubing-Canary -v ${{ steps.version_info.outputs.build_version }} -p release_output/ryujinx-canary-$BUILD_VERSION-$ARCH_NAME.AppImage
-        shell: bash
+          mv Ryujinx.AppImage.zsync ../release_output/ryujinx-canary-$BUILD_VERSION-$ARCH_NAME.AppImage.zsync
+          popd          
+        shell: bash 
+
+      - name: Pushing new release
+        uses: ncipollo/release-action@v1
+        with:
+          name: ${{ steps.version_info.outputs.build_version }}
+          artifacts: "release_output/*.tar.gz,release_output/*.zip,release_output/*AppImage*"
+          tag: ${{ steps.version_info.outputs.build_version }}
+          body: |
+            # Canary builds:
+            
+            These builds are experimental and may sometimes not work, use [regular builds](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/latest) instead if that sounds like something you don't want to deal with.
+            
+            | Platform | Artifact |
+            |--|--|
+            | Windows 64-bit | [Canary Windows Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-win_x64.zip) |
+            | Windows ARM 64-bit | [Canary Windows ARM Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-win_arm64.zip) |
+            | Linux 64-bit | [Canary Linux Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz) |
+            | Linux ARM 64-bit | [Canary Linux ARM Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-linux_arm64.tar.gz) |
+            | macOS | [Canary macOS Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-macos_universal.app.tar.gz) |
+            
+            **[Full Changelog](https://git.ryujinx.app/ryubing/ryujinx/-/compare/Canary-${{ steps.version_info.outputs.prev_build_version }}...Canary-${{ steps.version_info.outputs.build_version }})**
+          omitBodyDuringUpdate: true
+          allowUpdates: true
+          replacesArtifacts: true
+          owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
+          repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
+          token: ${{ secrets.RELEASE_TOKEN }}

  macos_release:
    name: Release MacOS universal
@@ -159,16 +220,6 @@ jobs:
          wget https://apt.llvm.org/llvm.sh
          chmod +x llvm.sh
          sudo ./llvm.sh 17
-          
-      - name: Install gli
-        run: |
-          mkdir -p $HOME/.bin
-          gh release download -R GreemDev/GLI -O gli -p 'gli-linux-x64'
-          chmod +x gli
-          mv gli $HOME/.bin/
-          echo "$HOME/.bin" >> $GITHUB_PATH
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

      - name: Install rcodesign
        run: |
@@ -184,10 +235,9 @@ jobs:
      - name: Get version info
        id: version_info
        run: |
-          echo "build_version=$(gli get-next-version -c Canary -R)" >> $GITHUB_OUTPUT
-          echo "prev_build_version=$(gli get-current-version -c Canary -R)" >> $GITHUB_OUTPUT
+          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
+          echo "prev_build_version=${{ env.RYUJINX_BASE_VERSION }}.$((${{ github.run_number }} - 1))" >> $GITHUB_OUTPUT
          echo "git_short_hash=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
-        shell: bash

      - name: Configure for release
        run: |
@@ -196,58 +246,24 @@ jobs:
          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_NAME\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_NAME }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_OWNER\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/Config\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
        shell: bash

      - name: Publish macOS Ryujinx
        run: |
          ./distribution/macos/create_macos_build_ava.sh . publish_tmp_ava publish_ava ./distribution/macos/entitlements.xml "${{ steps.version_info.outputs.build_version }}" "${{ steps.version_info.outputs.git_short_hash }}" Release 1
-          gli upload-generic-package -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/canary -n Ryubing-Canary -v ${{ steps.version_info.outputs.build_version }} -p publish_ava/ryujinx-canary-${{ steps.version_info.outputs.build_version }}-macos_universal.app.tar.gz

-  create_gitlab_release:
-    name: Create GitLab Release
-    runs-on: ubuntu-24.04
-    needs: 
-      - macos_release
-      - release
-    steps:
-      - uses: actions/checkout@v4
-        
-      - name: Install gli
-        run: |
-          mkdir -p $HOME/.bin
-          gh release download -R GreemDev/GLI -O gli -p 'gli-linux-x64'
-          chmod +x gli
-          mv gli $HOME/.bin/
-          echo "$HOME/.bin" >> $GITHUB_PATH
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-      
-      - name: Get version info
-        id: version_info
-        run: |
-          echo "build_version=$(gli get-next-version -c Canary -R)" >> $GITHUB_OUTPUT
-          echo "prev_build_version=$(gli get-current-version -c Canary -R)" >> $GITHUB_OUTPUT
-          echo "git_short_hash=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
-          echo "commit_message=$(git log -1 --pretty=%B)" >> $GITHUB_OUTPUT
-        shell: bash
-          
-      - name: Create tag
-        run: |
-          gli create-tag -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/ryujinx -n Canary-${{ steps.version_info.outputs.build_version }} -r ${{ steps.version_info.outputs.git_short_hash }} -c "${{ steps.version_info.outputs.commit_message }}"
-          
-      - name: Create release
-        run: |
-          gli create-release-from-generic-package-files -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/canary -n Ryubing-Canary -v ${{ steps.version_info.outputs.build_version }} -r main -t "Canary ${{ steps.version_info.outputs.build_version }}" -b "**Full Changelog:** [${{ steps.version_info.outputs.prev_build_version }}...${{ steps.version_info.outputs.build_version }}](https://git.ryujinx.app/ryubing/ryujinx/-/compare/Canary-${{ steps.version_info.outputs.prev_build_version }}...Canary-${{ steps.version_info.outputs.build_version }})"
-
-      - name: Send notification webhook
-        run: |
-          gli send-update-message -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/canary -t ${{ steps.version_info.outputs.build_version }} -c FF4500 -w ${{ secrets.CANARY_DISCORD_WEBHOOK }} -i https://avatars.githubusercontent.com/u/192939710?s=200&v=4
-
-      - name: Notify update server of new builds
-        run: |
-          gli refresh-version-cache -T ${{ secrets.UPDATE_SERVER_ADMIN_TOKEN }} -c Canary
-          
-      - name: Advance to the next version
-        run: |
-          gli increment-version -T ${{ secrets.UPDATE_SERVER_ADMIN_TOKEN }} -c Canary
+      - name: Pushing new release
+        uses: ncipollo/release-action@v1
+        with:
+          name: "Canary ${{ steps.version_info.outputs.build_version }}"
+          artifacts: "publish_ava/*.tar.gz"
+          tag: ${{ steps.version_info.outputs.build_version }}
+          body: ""
+          omitBodyDuringUpdate: true
+          allowUpdates: true
+          replacesArtifacts: true
+          owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
+          repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
+          token: ${{ secrets.RELEASE_TOKEN }}
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -1,30 +1,75 @@
-name: Stable CI
+name: Release job

 on:
  workflow_dispatch:
-    inputs:
-      is_bugfix_release:
-        description: "Bug fix release: If checked, this will increment the third number for only Stable, and leave the Major version alone for both Stable and Canary."
-        required: true
-        type: boolean
+    inputs: {}

 concurrency: release

 env:
  POWERSHELL_TELEMETRY_OPTOUT: 1
  DOTNET_CLI_TELEMETRY_OPTOUT: 1
+  RYUJINX_BASE_VERSION: "1.3"
  RYUJINX_TARGET_RELEASE_CHANNEL_NAME: "release"
+  RYUJINX_TARGET_RELEASE_CHANNEL_OWNER: "Ryubing"
+  RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO: "Ryujinx"
+  RYUJINX_TARGET_RELEASE_CHANNEL_REPO: "Stable-Releases"
  RELEASE: 1

 jobs:
+  tag:
+    name: Create tag
+    runs-on: ubuntu-24.04
+    steps:
+      - name: Get version info
+        id: version_info
+        run: |
+          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
+          echo "prev_build_version=${{ env.RYUJINX_BASE_VERSION }}.$((${{ github.run_number }} - 1))" >> $GITHUB_OUTPUT
+        shell: bash
+        
+      - name: Install GitLabCli
+        run: |
+          mkdir -p $HOME/.bin
+          gh release download -R GreemDev/GLI -O gli -p 'GitLabCli-linux_x64'
+          chmod +x gli
+          mv gli $HOME/.bin/
+          echo "$HOME/.bin" >> $GITHUB_PATH
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+      - name: Create GitLab tag
+        run: gli --access-token=${{ secrets.GITLAB_TOKEN }} --project=ryubing/ryujinx --command=CreateTag "${{ steps.version_info.outputs.build_version }}|master"
+
+      - name: Create release
+        uses: ncipollo/release-action@v1
+        with:
+          name: ${{ steps.version_info.outputs.build_version }}
+          tag: ${{ steps.version_info.outputs.build_version }}
+          body: |
+            # Stable builds:
+            | Platform | Artifact |
+            |--|--|
+            | Windows 64-bit | [Stable Windows Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-win_x64.zip) |
+            | Windows ARM 64-bit | [Stable Windows ARM Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-win_arm64.zip) |
+            | Linux 64-bit | [Stable Linux Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz) |
+            | Linux ARM 64-bit | [Stable Linux ARM Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-linux_arm64.tar.gz) |
+            | macOS | [Stable macOS Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-macos_universal.app.tar.gz) |
+            
+            **[Full Changelog](https://git.ryujinx.app/ryubing/ryujinx/-/compare/${{ steps.version_info.outputs.prev_build_version }}...${{ steps.version_info.outputs.build_version }})**
+          omitBodyDuringUpdate: true
+          owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
+          repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
+          token: ${{ secrets.RELEASE_TOKEN }}
+
  release:
    name: Release for ${{ matrix.platform.name }}
    runs-on: ${{ matrix.platform.os }}
    strategy:
      matrix:
        platform:
-          - { name: win-x64,     os: ubuntu-latest, zip_os_name: win_x64     }
-          #- { name: win-arm64,   os: ubuntu-latest, zip_os_name: win_arm64   }
+          - { name: win-x64,     os: windows-latest, zip_os_name: win_x64     }
+          - { name: win-arm64,   os: windows-latest, zip_os_name: win_arm64   }
          - { name: linux-x64,   os: ubuntu-latest,  zip_os_name: linux_x64   }
          - { name: linux-arm64, os: ubuntu-latest,  zip_os_name: linux_arm64 }
    steps:
@@ -36,30 +81,12 @@ jobs:

      - name: Overwrite csc problem matcher
        run: echo "::add-matcher::.github/csc.json"
-        
-      - name: Install 7zip
-        run: |
-          sudo apt install -y 7zip
-          
-      - name: Install gli
-        run: |
-          mkdir -p $HOME/.bin
-          gh release download -R GreemDev/GLI -O gli -p 'gli-linux-x64'
-          chmod +x gli
-          mv gli $HOME/.bin/
-          echo "$HOME/.bin" >> $GITHUB_PATH
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

      - name: Get version info
        id: version_info
        run: |
-          if [ '${{ inputs.is_bugfix_release }}' == 'false' ]; then
-            echo "build_version=$(gli get-next-version -m -c Stable -R)" >> $GITHUB_OUTPUT
-          else
-            echo "build_version=$(gli get-next-version -c Stable -R)" >> $GITHUB_OUTPUT
-          fi
-          echo "prev_build_version=$(gli get-current-version -c Stable -R)" >> $GITHUB_OUTPUT
+          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
+          echo "prev_build_version=${{ env.RYUJINX_BASE_VERSION }}.$((${{ github.run_number }} - 1))" >> $GITHUB_OUTPUT
          echo "git_short_hash=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
        shell: bash

@@ -68,6 +95,9 @@ jobs:
          sed -r --in-place 's/\%\%RYUJINX_BUILD_VERSION\%\%/${{ steps.version_info.outputs.build_version }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_BUILD_GIT_HASH\%\%/${{ steps.version_info.outputs.git_short_hash }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_NAME\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_NAME }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_OWNER\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/Config\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
        shell: bash

@@ -79,34 +109,26 @@ jobs:
          dotnet publish -c Release -r "${{ matrix.platform.name }}" -o ./publish -p:Version="${{ steps.version_info.outputs.build_version }}" -p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" -p:DebugType=embedded src/Ryujinx --self-contained

      - name: Packing Windows builds
-        if: contains(matrix.platform.name, 'win')
+        if: matrix.platform.os == 'windows-latest'
        run: |
          pushd publish
          rm libarmeilleure-jitsupport.dylib
          7z a ../release_output/ryujinx-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.zip ../publish
          popd
-
-          gli upload-generic-package -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/ryujinx -n Ryubing -v ${{ steps.version_info.outputs.build_version }} -p release_output/ryujinx-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.zip
        shell: bash
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

      - name: Packing Linux builds
-        if: contains(matrix.platform.name, 'linux')
+        if: matrix.platform.os == 'ubuntu-latest'
        run: |
          pushd publish
          rm libarmeilleure-jitsupport.dylib
          chmod +x Ryujinx.sh Ryujinx
          tar -czvf ../release_output/ryujinx-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.tar.gz ../publish
          popd
-
-          gli upload-generic-package -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/ryujinx -n Ryubing -v ${{ steps.version_info.outputs.build_version }} -p release_output/ryujinx-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.tar.gz
        shell: bash
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-
+      
      - name: Build AppImage (Linux)
-        if: contains(matrix.platform.name, 'linux')
+        if: matrix.platform.os == 'ubuntu-latest'
        run: |
          BUILD_VERSION="${{ steps.version_info.outputs.build_version }}"
          PLATFORM_NAME="${{ matrix.platform.name }}"
@@ -133,15 +155,39 @@ jobs:
            exit 1
          fi

+          export UFLAG="gh-releases-zsync|${{ github.repository_owner }}|${{ github.event.repository.name }}|latest|*-$ARCH_NAME.AppImage.zsync"
          BUILDDIR=publish OUTDIR=publish_appimage distribution/linux/appimage/build-appimage.sh

          pushd publish_appimage
          mv Ryujinx.AppImage ../release_output/ryujinx-$BUILD_VERSION-$ARCH_NAME.AppImage
+          mv Ryujinx.AppImage.zsync ../release_output/ryujinx-$BUILD_VERSION-$ARCH_NAME.AppImage.zsync
          popd
-
-          gli upload-generic-package -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/ryujinx -n Ryubing -v ${{ steps.version_info.outputs.build_version }} -p release_output/ryujinx-$BUILD_VERSION-$ARCH_NAME.AppImage
        shell: bash

+      - name: Pushing new release
+        uses: ncipollo/release-action@v1
+        with:
+          name: ${{ steps.version_info.outputs.build_version }}
+          artifacts: "release_output/*.tar.gz,release_output/*.zip,release_output/*AppImage*"
+          tag: ${{ steps.version_info.outputs.build_version }}
+          body: |
+            # Stable builds:
+            | Platform | Artifact |
+            |--|--|
+            | Windows 64-bit | [Stable Windows Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-win_x64.zip) |
+            | Windows ARM 64-bit | [Stable Windows ARM Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-win_arm64.zip) |
+            | Linux 64-bit | [Stable Linux Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz) |
+            | Linux ARM 64-bit | [Stable Linux ARM Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-linux_arm64.tar.gz) |
+            | macOS | [Stable macOS Artifact](https://github.com/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/releases/download/${{ steps.version_info.outputs.build_version }}/ryujinx-${{ steps.version_info.outputs.build_version }}-macos_universal.app.tar.gz) |
+            
+            **[Full Changelog](https://git.ryujinx.app/ryubing/ryujinx/-/compare/${{ steps.version_info.outputs.prev_build_version }}...${{ steps.version_info.outputs.build_version }})**
+          omitBodyDuringUpdate: true
+          allowUpdates: true
+          replacesArtifacts: true
+          owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
+          repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
+          token: ${{ secrets.RELEASE_TOKEN }}
+
  macos_release:
    name: Release MacOS universal
    runs-on: ubuntu-24.04
@@ -157,16 +203,6 @@ jobs:
          wget https://apt.llvm.org/llvm.sh
          chmod +x llvm.sh
          sudo ./llvm.sh 17
-          
-      - name: Install gli
-        run: |
-          mkdir -p $HOME/.bin
-          gh release download -R GreemDev/GLI -O gli -p 'gli-linux-x64'
-          chmod +x gli
-          mv gli $HOME/.bin/
-          echo "$HOME/.bin" >> $GITHUB_PATH
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

      - name: Install rcodesign
        run: |
@@ -182,77 +218,35 @@ jobs:
      - name: Get version info
        id: version_info
        run: |
-          if [ '${{ inputs.is_bugfix_release }}' == 'false' ]; then
-            echo "build_version=$(gli get-next-version -m -c Stable -R)" >> $GITHUB_OUTPUT
-          else
-            echo "build_version=$(gli get-next-version -c Stable -R)" >> $GITHUB_OUTPUT
-          fi
-          echo "prev_build_version=$(gli get-current-version -c Stable -R)" >> $GITHUB_OUTPUT
+          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
+          echo "prev_build_version=${{ env.RYUJINX_BASE_VERSION }}.$((${{ github.run_number }} - 1))" >> $GITHUB_OUTPUT
          echo "git_short_hash=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
-        shell: bash

      - name: Configure for release
        run: |
          sed -r --in-place 's/\%\%RYUJINX_BUILD_VERSION\%\%/${{ steps.version_info.outputs.build_version }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_BUILD_GIT_HASH\%\%/${{ steps.version_info.outputs.git_short_hash }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_NAME\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_NAME }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_OWNER\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_SOURCE_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
          sed -r --in-place 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/Config\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
        shell: bash

      - name: Publish macOS Ryujinx
        run: |
          ./distribution/macos/create_macos_build_ava.sh . publish_tmp_ava publish ./distribution/macos/entitlements.xml "${{ steps.version_info.outputs.build_version }}" "${{ steps.version_info.outputs.git_short_hash }}" Release 0
-          
-          gli upload-generic-package -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/ryujinx -n Ryubing -v ${{ steps.version_info.outputs.build_version }} -p publish/ryujinx-${{ steps.version_info.outputs.build_version }}-macos_universal.app.tar.gz
-          
-  create_gitlab_release:
-    name: Create GitLab Release
-    runs-on: ubuntu-24.04
-    needs:
-      - macos_release
-      - release
-    steps:
-      - uses: actions/checkout@v4
-        
-      - name: Install gli
-        run: |
-          mkdir -p $HOME/.bin
-          gh release download -R GreemDev/GLI -O gli -p 'gli-linux-x64'
-          chmod +x gli
-          mv gli $HOME/.bin/
-          echo "$HOME/.bin" >> $GITHUB_PATH
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

-      - name: Get version info
-        id: version_info
-        run: |
-          if [ '${{ inputs.is_bugfix_release }}' == 'false' ]; then
-            echo "build_version=$(gli get-next-version -m -c Stable -R)" >> $GITHUB_OUTPUT
-          else
-            echo "build_version=$(gli get-next-version -c Stable -R)" >> $GITHUB_OUTPUT
-          fi
-          echo "prev_build_version=$(gli get-current-version -c Stable -R)" >> $GITHUB_OUTPUT
-          echo "git_short_hash=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
-          echo "commit_message=$(git log -1 --pretty=%B)" >> $GITHUB_OUTPUT
-        shell: bash
-
-      - name: Create release
-        run: |
-          gli create-release-from-generic-package-files -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/ryujinx -n Ryubing -v ${{ steps.version_info.outputs.build_version }} -r ${{ steps.version_info.outputs.git_short_hash }} -t "${{ steps.version_info.outputs.build_version }}" -b "msd:${{ steps.version_info.outputs.build_version }}"
-
-      - name: Send notification webhook
-        run: |
-          gli send-update-message -T ${{ secrets.GITLAB_TOKEN }} -P ryubing/ryujinx -t ${{ steps.version_info.outputs.build_version }} -c 32cd32 -w ${{ secrets.STABLE_DISCORD_WEBHOOK }} -i https://avatars.githubusercontent.com/u/192939710?s=200&v=4
-
-      - name: Notify update server of new builds
-        run: |
-          gli refresh-version-cache -T ${{ secrets.UPDATE_SERVER_ADMIN_TOKEN }} -c Stable
-
-      - name: Advance to the next version
-        run: |
-          if [ '${{ inputs.is_bugfix_release }}' == 'false' ]; then
-            gli advance-version -T ${{ secrets.UPDATE_SERVER_ADMIN_TOKEN }}
-          else
-            gli increment-version -T ${{ secrets.UPDATE_SERVER_ADMIN_TOKEN }} -c Stable
-          fi
+      - name: Pushing new release
+        uses: ncipollo/release-action@v1
+        with:
+          name: ${{ steps.version_info.outputs.build_version }}
+          artifacts: "publish/*.tar.gz"
+          tag: ${{ steps.version_info.outputs.build_version }}
+          body: ""
+          omitBodyDuringUpdate: true
+          allowUpdates: true
+          replacesArtifacts: true
+          owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
+          repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
+          token: ${{ secrets.RELEASE_TOKEN }}
--- a/.gitignore
+++ b/.gitignore
@@ -18,8 +18,6 @@ build/
 [Oo]bj/
 AppDir/
 publish_appimage/
-publish_ava/
-publish_tmp_ava/

 # Enable "build/" folder in the NuGet Packages folder since NuGet packages use it for MSBuild targets
 !packages/*/build/
@@ -100,7 +98,6 @@ DocProject/Help/html

 # Click-Once directory
 publish/
-RyubingMaintainerTools/

 # Publish Web Output
 *.Publish.xml
@@ -181,7 +178,3 @@ PublishProfiles/

 # Ignore MacOS Attribute Files
 ._*
-
-# Ignore distribution build files
-distribution/macos/temp/
-distribution/macos/output/
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -2,17 +2,18 @@

 All updates to this Ryujinx branch will be documented in this file.

-## [1.3.2](<https://git.ryujinx.app/ryubing/ryujinx/-/releases/1.3.2>) - 2025-06-09

-## [1.3.1](<https://git.ryujinx.app/ryubing/ryujinx/-/releases/1.3.1>) - 2025-04-23
-
-## [1.2.86](<https://github.com/Ryubing/Stable-Releases/releases/tag/1.2.86>) - 2025-03-13
+## [1.2.86](<https://git.ryujinx.app/ryubing/ryujinx/-/releases/1.2.86>) - 2025-03-13
+A list of notable changes can be found on the release linked in the version number above.

 ## [1.2.82](<https://web.archive.org/web/20250312010534/https://github.com/Ryubing/Ryujinx/releases/tag/1.2.82>) - 2025-02-16
+A list of notable changes can be found on the release linked in the version number above.

 ## [1.2.80-81](<https://web.archive.org/web/20250302064257/https://github.com/Ryubing/Ryujinx/releases/tag/1.2.81>) - 2025-01-22
+A list of notable changes can be found on the release linked in the version number above.

 ## [1.2.78](<https://web.archive.org/web/20250301174537/https://github.com/Ryubing/Ryujinx/releases/tag/1.2.78>) - 2024-12-19
+A list of notable changes can be found on the release linked in the version number above.

 ## [1.2.73-1.2.76](<https://web.archive.org/web/20250209202612/https://github.com/Ryubing/Ryujinx/releases/tag/1.2.76>) - 2024-11-19
 A list of notable changes can be found on the release linked in the version number above.
@@ -21,8 +22,8 @@ Additionally, 1.2.74 & 75 were fixes for uploading Windows build artifacts.

 1.2.76 fixes a rare crash on startup.

-## [1.2.72](<https://git.ryujinx.app/ryubing/ryujinx/-/tags/1.2.72>) - 2024-11-03
-PRs [#163](<https://web.archive.org/web/20241123015123/https://github.com/GreemDev/Ryujinx/pull/163>), [#164](<https://web.archive.org/web/20250307192526/https://github.com/Ryubing/Ryujinx/pull/164>), [#139](<https://web.archive.org/web/20250306123457/https://github.com/Ryubing/Ryujinx/pull/139>)
+## [1.2.72](<https://github.com/GreemDev/Ryujinx/releases/tag/1.2.72>) - 2024-11-03
+PRs [#163](<https://github.com/GreemDev/Ryujinx/pull/163>), [#164](<https://github.com/GreemDev/Ryujinx/pull/164>), [#139](<https://github.com/GreemDev/Ryujinx/pull/139>)
 ### HLE:
 - Add DebugMouse HID device.
   - Fixes "Clock Tower Rewind" crashing while loading.
@@ -32,7 +33,7 @@ PRs [#163](<https://web.archive.org/web/20241123015123/https://github.com/GreemD
 ### misc:
 - Update macOS distribution .icns.

-## [1.2.69](<https://git.ryujinx.app/ryubing/ryujinx/-/tags/1.2.69>) - 2024-11-01
+## [1.2.69](<https://github.com/GreemDev/Ryujinx/releases/tag/1.2.69>) - 2024-11-01
 ### Infra:
  - Compile the native libraries into the Ryujinx executable.
  - Remove `libarmeilleure-jitsupport.dylib` from Windows & Linux releases (dylibs are macOS-only)
@@ -42,8 +43,8 @@ PRs [#163](<https://web.archive.org/web/20241123015123/https://github.com/GreemD
  - Replace "" with `string.Empty`.
  - Code cleanups & simplifications.

-## [1.2.67](<https://git.ryujinx.app/ryubing/ryujinx/-/tags/1.2.67>) - 2024-11-01
-PRs [#36](<https://web.archive.org/web/20250306215917/https://github.com/Ryubing/Ryujinx/pull/36>), [#135](<https://web.archive.org/web/20241122135125/https://github.com/GreemDev/Ryujinx/pull/135>)
+## [1.2.67](<https://github.com/GreemDev/Ryujinx/releases/tag/1.2.67>) - 2024-11-01
+PRs [#36](<https://github.com/GreemDev/Ryujinx/pull/36>), [#135](<https://github.com/GreemDev/Ryujinx/pull/135>)

 ### GUI:
  - Set UseFloatingWatermark to false when watermark is empty
@@ -54,8 +55,8 @@ PRs [#36](<https://web.archive.org/web/20250306215917/https://github.com/Ryubing
  - Fix homebrew loading.


-## [1.2.64](https://git.ryujinx.app/ryubing/ryujinx/-/tags/1.2.64) - 2024-10-30
-PRs [#92](https://web.archive.org/web/20241118052724/https://github.com/GreemDev/Ryujinx/pull/92), ~~[#96](https://github.com/GreemDev/Ryujinx/pull/96)~~, ~~[#97](https://github.com/GreemDev/Ryujinx/pull/97)~~,  [#101](https://web.archive.org/web/20250306223605/https://github.com/Ryubing/Ryujinx/pull/101), ~~[#103](https://github.com/GreemDev/Ryujinx/pull/103)~~
+## [1.2.64](https://github.com/GreemDev/Ryujinx/releases/tag/1.2.64) - 2024-10-30
+PRs [#92](https://github.com/GreemDev/Ryujinx/pull/92), [#96](https://github.com/GreemDev/Ryujinx/pull/96), [#97](https://github.com/GreemDev/Ryujinx/pull/97),  [#101](https://github.com/GreemDev/Ryujinx/pull/101), [#103](https://github.com/GreemDev/Ryujinx/pull/103)
 ### GUI:
 - Option to show classic-style title bar. Requires restart of emulator to take effect.
  - This is only relevant on Windows. Other Operating Systems default to this being on and not being changeable, because the custom (current) title bar only works on Windows in the first place.
@@ -71,14 +72,14 @@ PRs [#92](https://web.archive.org/web/20241118052724/https://github.com/GreemDev

 ## 1.2.59 - 2024-10-27

-PRs ~~[#88](https://github.com/GreemDev/Ryujinx/pull/88), [#87](https://github.com/GreemDev/Ryujinx/pull/87)~~
+PRs [#88](https://github.com/GreemDev/Ryujinx/pull/88), [#87](https://github.com/GreemDev/Ryujinx/pull/87)
 ### i18n:
 - fr_FR:
  - Add missing translations for new features & fix a couple wrong ones.
  - Fix Ignore Missing Services / Ignore Applet tooltip.

 ## 1.2.57 - 2024-10-27
-PRs ~~[#60](https://github.com/GreemDev/Ryujinx/pull/60)~~, [#42](https://web.archive.org/web/20241126203614/https://github.com/GreemDev/Ryujinx/pull/42)
+PRs [#60](https://github.com/GreemDev/Ryujinx/pull/60), [#42](https://github.com/GreemDev/Ryujinx/pull/42)
 ### GUI:
 - Automatically remove invalid DLC & updates as part of autoload.
 - Added Thai translation for Ignore Applet hover tooltip.
@@ -104,7 +105,7 @@ PRs ~~[#60](https://github.com/GreemDev/Ryujinx/pull/60)~~, [#42](https://web.ar
 - Code cleanup.

 ## 1.2.44 - 2024-10-25
-PR [#59](https://web.archive.org/web/20241125060420/https://github.com/GreemDev/Ryujinx/pull/59)
+PR [#59](https://github.com/GreemDev/Ryujinx/pull/59)
 ### GUI:
 - Add descriptions for "ignoring applet" translated into other languages.

@@ -117,9 +118,9 @@ NOTE: The translation isn't referenced in the code yet, it will be in the next u
 ## 1.2.42 - 2024-10-24
 Sources:

-Init function: [archive of github.com/MutantAura/Ryujinx/commit/9cef4ceba40d66492ff775af793ff70e6e7551a9](https://web.archive.org/web/20241122193401/https://github.com/MutantAura/Ryujinx/commit/9cef4ceba40d66492ff775af793ff70e6e7551a9)
+Init function: https://github.com/MutantAura/Ryujinx/commit/9cef4ceba40d66492ff775af793ff70e6e7551a9

-Shader counter: ~~https://github.com/MutantAura/Ryujinx/commit/67b873645fd593e83d042a77bf7ab12e5ec97357~~ Original commit has been lost
+Shader counter: https://github.com/MutantAura/Ryujinx/commit/67b873645fd593e83d042a77bf7ab12e5ec97357

 Thanks MutantAura :D
 ### GUI:
@@ -127,14 +128,14 @@ Thanks MutantAura :D
 - Remove graphics backend / GPU name event logic in favor of a single init function.

 ## 1.2.41 - 2024-10-24
-PR ~~[#54](https://github.com/GreemDev/Ryujinx/pull/54)~~
+PR [#54](https://github.com/GreemDev/Ryujinx/pull/54)

 Thanks Whitescatz!
 ### i18n:
 - th_TH (Thai): Added missing translations, reduce transliterated words, fix grammar.

 ## 1.2.40 - 2024-10-23
-PR ~~[#40](https://github.com/GreemDev/Ryujinx/pull/40)~~
+PR [#40](https://github.com/GreemDev/Ryujinx/pull/40)

 Thanks Вова С!
 ### GUI:
@@ -148,30 +149,30 @@ Thanks Вова С!
  - Should prevent crashing on config loads in some circumstances.

 ## 1.2.38 - 2024-10-23
-PR [#51](https://web.archive.org/web/20241127022413/https://github.com/GreemDev/Ryujinx/pull/51)
+PR [#51](https://github.com/GreemDev/Ryujinx/pull/51)
 ### i18n:
 - zh_CH (Simplified Chinese): Add some missing translations.

 ## 1.2.37 - 2024-10-23
-PR [#37](https://web.archive.org/web/20241123010103/https://github.com/GreemDev/Ryujinx/pull/37)
+PR [#37](https://github.com/GreemDev/Ryujinx/pull/37)

 Thanks Last Breath!
 ### GUI: 
 - Set the default controller to the Pro Controller.

 ## 1.2.36 - 2024-10-21
-PR ~~[#30](https://github.com/GreemDev/Ryujinx/pull/30)~~
+PR [#30](https://github.com/GreemDev/Ryujinx/pull/30)
 ### GUI:
 - Fix repeated dialog popup notifying you of new updates when there aren't any, while having a bundled update inside an XCI and an external update file.

 ## 1.2.35 - 2024-10-21
-PR [#32](https://web.archive.org/web/20241127010942/https://github.com/GreemDev/Ryujinx/pull/32)
+PR [#32](https://github.com/GreemDev/Ryujinx/pull/32)
 ### GUI:
 - Replace "expand DRAM" option with a DRAM size dropdown.
  - Allows for using mods which require a ridiculous amount of memory to allocate from.

 ## 1.2.34 - 2024-10-21
-PR [#29](https://web.archive.org/web/20241125093029/https://github.com/GreemDev/Ryujinx/pull/29)
+PR [#29](https://github.com/GreemDev/Ryujinx/pull/29)
 ### GUI:
 - Fix duplicate controller names when 2 controllers of the same type are connected.
 ### INPUT:
@@ -248,7 +249,7 @@ Added Low-power PPTC mode strings to the translation files.
 ## 1.2.1-1.2.19 - 2024-10-08 - 2024-10-11
 ### GUI/INFRA/MISC:
 - Remove GTK UI.
- Autoload DLC/Updates from dir ([#12](https://web.archive.org/web/20241127004005/https://github.com/GreemDev/Ryujinx/pull/12)).
+- Autoload DLC/Updates from dir ([#12](https://github.com/GreemDev/Ryujinx/pull/12)).
 - Changed executable icon to rainbow logo.
 - Extract Data > Logo now also extracts the square thumbnail you see for the game in the UI. 
- The "use random UUID hack" checkbox in the Amiibo screen now remembers its last state when you reopen the window in a given session.
+- The "use random UUID hack" checkbox in the Amiibo screen now remembers its last state when you reopen the window in a given session.
--- a/COMPILING.md
+++ b/COMPILING.md
@@ -5,12 +5,12 @@ If you wish to build the emulator yourself, follow these steps:

 ### Step 1

-Install the [.NET 10.0 (or higher) SDK](https://dotnet.microsoft.com/en-us/download/dotnet/10.0).
+Install the [.NET 9.0 (or higher) SDK](https://dotnet.microsoft.com/download/dotnet/9.0).
 Make sure your SDK version is higher or equal to the required version specified in [global.json](global.json).

 ### Step 2

-Either use `git clone https://git.ryujinx.app/ryubing/ryujinx.git` on the command line to clone the repository or use Code --> Download zip button to get the files.
+Either use `git clone https://github.com/Ryubing/Ryujinx` on the command line to clone the repository or use Code --> Download zip button to get the files.

 ### Step 3

--- a/Directory.Build.props
+++ b/Directory.Build.props
@@ -1,6 +1,6 @@
 <Project>
  <PropertyGroup>
-    <TargetFramework>net10.0</TargetFramework>
-    <LangVersion>preview</LangVersion>
+    <TargetFramework>net9.0</TargetFramework>
+    <LangVersion>latest</LangVersion>
  </PropertyGroup>
 </Project>
--- a/Directory.Packages.props
+++ b/Directory.Packages.props
@@ -3,27 +3,27 @@
    <ManagePackageVersionsCentrally>true</ManagePackageVersionsCentrally>
  </PropertyGroup>
  <ItemGroup>
-    <PackageVersion Include="Avalonia" Version="11.3.6" />
-    <PackageVersion Include="Avalonia.Controls.DataGrid" Version="11.3.6" />
-    <PackageVersion Include="Avalonia.Desktop" Version="11.3.6" />
-    <PackageVersion Include="Avalonia.Diagnostics" Version="11.3.6" />
-    <PackageVersion Include="Avalonia.Markup.Xaml.Loader" Version="11.3.6" />
-    <PackageVersion Include="Svg.Controls.Avalonia" Version="11.3.6.2" />
-    <PackageVersion Include="Svg.Controls.Skia.Avalonia" Version="11.3.6.2" />
+    <PackageVersion Include="Avalonia" Version="11.0.13" />
+    <PackageVersion Include="Avalonia.Controls.DataGrid" Version="11.0.13" />
+    <PackageVersion Include="Avalonia.Desktop" Version="11.0.13" />
+    <PackageVersion Include="Avalonia.Diagnostics" Version="11.0.13" />
+    <PackageVersion Include="Avalonia.Markup.Xaml.Loader" Version="11.0.13" />
+    <PackageVersion Include="Avalonia.Svg" Version="11.0.0.19" />
+    <PackageVersion Include="Avalonia.Svg.Skia" Version="11.0.0.19" />
    <PackageVersion Include="Microsoft.Build.Framework" Version="17.11.4" />
    <PackageVersion Include="Microsoft.Build.Utilities.Core" Version="17.12.6" />
    <PackageVersion Include="Newtonsoft.Json" Version="13.0.3" />
-    <PackageVersion Include="Projektanker.Icons.Avalonia" Version="9.6.2" />
-    <PackageVersion Include="Projektanker.Icons.Avalonia.FontAwesome" Version="9.6.2" />
-    <PackageVersion Include="Projektanker.Icons.Avalonia.MaterialDesign" Version="9.6.2" />
-    <PackageVersion Include="ppy.SDL3-CS" Version="2025.920.0" />
+    <PackageVersion Include="Projektanker.Icons.Avalonia" Version="9.4.0" />
+    <PackageVersion Include="Projektanker.Icons.Avalonia.FontAwesome" Version="9.4.0"/>
+    <PackageVersion Include="Projektanker.Icons.Avalonia.MaterialDesign" Version="9.4.0"/>
    <PackageVersion Include="CommandLineParser" Version="2.9.1" />
-    <PackageVersion Include="CommunityToolkit.Mvvm" Version="8.4.0" />
+    <PackageVersion Include="CommunityToolkit.Mvvm" Version="8.4.0"/>
    <PackageVersion Include="Concentus" Version="2.2.2" />
-    <PackageVersion Include="DiscordRichPresence" Version="1.6.1.70" />
-    <PackageVersion Include="DynamicData" Version="9.4.1" />
-    <PackageVersion Include="FluentAvaloniaUI.NoAnim" Version="2.4.0-build3" />
+    <PackageVersion Include="DiscordRichPresence" Version="1.2.1.24" />
+    <PackageVersion Include="DynamicData" Version="9.0.4" />
+    <PackageVersion Include="FluentAvaloniaUI" Version="2.0.5" />
    <PackageVersion Include="Humanizer" Version="2.14.1" />
+    <PackageVersion Include="LibHac" Version="0.19.0" />
    <PackageVersion Include="Microsoft.CodeAnalysis.Analyzers" Version="3.3.4" />
    <PackageVersion Include="Microsoft.CodeAnalysis.CSharp" Version="4.9.2" />
    <PackageVersion Include="Microsoft.IdentityModel.JsonWebTokens" Version="8.3.0" />
@@ -41,12 +41,10 @@
    <PackageVersion Include="Ryujinx.Audio.OpenAL.Dependencies" Version="1.21.0.1" />
    <PackageVersion Include="Ryujinx.Graphics.Nvdec.Dependencies.AllArch" Version="6.1.2-build3" />
    <PackageVersion Include="Ryujinx.Graphics.Vulkan.Dependencies.MoltenVK" Version="1.2.0" />
-    <PackageVersion Include="Ryujinx.LibHac" Version="0.21.0-alpha.126" />
-    <PackageVersion Include="Ryujinx.UpdateClient" Version="1.0.44" />
-    <PackageVersion Include="Ryujinx.Systems.Update.Common" Version="1.0.44" />
-    <PackageVersion Include="Gommon" Version="2.8.0.2" />
+    <PackageVersion Include="Ryujinx.SDL2-CS" Version="2.30.0-build32" />
+    <PackageVersion Include="Gommon" Version="2.7.1.1" />
    <PackageVersion Include="securifybv.ShellLink" Version="0.1.0" />
-    <PackageVersion Include="Sep" Version="0.11.1" />
+    <PackageVersion Include="Sep" Version="0.6.0" />
    <PackageVersion Include="shaderc.net" Version="0.1.0" />
    <PackageVersion Include="SharpZipLib" Version="1.4.2" />
    <PackageVersion Include="Silk.NET.Vulkan" Version="2.22.0" />
--- a/README.md
+++ b/README.md
@@ -7,8 +7,8 @@
          
 # Ryujinx

-[![Latest release](https://img.shields.io/gitlab/v/release/ryubing%2Fryujinx?gitlab_url=https%3A%2F%2Fgit.ryujinx.app&label=stable&color=32cd32)](https://update.ryujinx.app/latest/stable)
-[![Latest canary release](https://img.shields.io/gitlab/v/release/ryubing%2Fcanary?gitlab_url=https%3A%2F%2Fgit.ryujinx.app&label=canary&color=FF4500)](https://update.ryujinx.app/latest/canary)
+[![Latest release](https://img.shields.io/github/v/release/Ryubing/Stable-Releases?label=stable)](https://github.com/Ryubing/Stable-Releases/releases/latest)
+[![Latest canary release](https://img.shields.io/github/v/release/Ryubing/Canary-Releases?label=canary)](https://github.com/Ryubing/Canary-Releases/releases/latest)
 <br>
 <a href="https://discord.gg/PEuzjrFXUA">
 <img src="https://img.shields.io/discord/1294443224030511104?color=5865F2&label=Ryubing&logo=discord&logoColor=white" alt="Discord">
@@ -31,7 +31,7 @@
  <br>
  This is not a Ryujinx revival project. This is not a Phoenix project.
  <br>
-  Guides and documentation can be found on the <a href="https://git.ryujinx.app/groups/ryubing/-/wikis/home">Wiki tab</a>.
+  Guides and documentation can be found on the <a href="https://git.ryujinx.app/ryubing/ryujinx/-/wikis/home">Wiki tab</a>.
 </p>

 <p align="center">
@@ -49,13 +49,13 @@ Stable builds are made every so often, based on the `master` branch, that then g
 These stable builds exist so that the end user can get a more **enjoyable and stable experience**.
 They are released every month or so, to ensure consistent updates, while not being an annoying amount of individual updates to download over the course of that month.

-You can find the stable releases [here](https://git.ryujinx.app/ryubing/ryujinx/-/releases).
+You can find the latest stable release [here](https://github.com/Ryubing/Stable-Releases/releases/latest).

 Canary builds are compiled automatically for each commit on the `master` branch.
 While we strive to ensure optimal stability and performance prior to pushing an update, these builds **may be unstable or completely broken**.
 These canary builds are only recommended for experienced users.

-You can find the canary releases [here](https://git.ryujinx.app/ryubing/canary/-/releases).
+You can find the latest canary release [here](https://github.com/Ryubing/Canary-Releases/releases/latest).

 ## Documentation

@@ -66,7 +66,7 @@ If you are planning to contribute or just want to learn more about this project
 - **Audio**

  Audio output is entirely supported, audio input (microphone) isn't supported.
-  We use C# wrappers for [OpenAL](https://openal-soft.org/), and [SDL3](https://www.libsdl.org/) & [libsoundio](http://libsound.io/) as fallbacks.
+  We use C# wrappers for [OpenAL](https://openal-soft.org/), and [SDL2](https://www.libsdl.org/) & [libsoundio](http://libsound.io/) as fallbacks.

 - **CPU**

@@ -111,7 +111,7 @@ See [LICENSE.txt](LICENSE.txt) and [THIRDPARTY.md](distribution/legal/THIRDPARTY

 ## Credits

- [LibHac](https://git.ryujinx.app/ryubing/libhac) is used for our file-system.
+- [LibHac](https://github.com/Thealexbarney/LibHac) is used for our file-system.
 - [AmiiboAPI](https://www.amiiboapi.com) is used in our Amiibo emulation.
 - [ldn_mitm](https://github.com/spacemeowx2/ldn_mitm) is used for one of our available multiplayer modes.
- [ShellLink](https://github.com/securifybv/ShellLink) is used for Windows shortcut generation.
+- [ShellLink](https://github.com/securifybv/ShellLink) is used for Windows shortcut generation.
--- a/Ryujinx.sln
+++ b/Ryujinx.sln
@@ -45,15 +45,17 @@ Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Graphics.Vic", "src
 EndProject
 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Graphics.Video", "src\Ryujinx.Graphics.Video\Ryujinx.Graphics.Video.csproj", "{FD4A2C14-8E3D-4957-ABBE-3C38897B3E2D}"
 EndProject
-Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.SDL3", "src\Ryujinx.Audio.Backends.SDL3\Ryujinx.Audio.Backends.SDL3.csproj", "{988E6191-82E1-4E13-9DDB-CB9FA2FDAF29}"
-EndProject
 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.OpenAL", "src\Ryujinx.Audio.Backends.OpenAL\Ryujinx.Audio.Backends.OpenAL.csproj", "{0BE11899-DF2D-4BDE-B9EE-2489E8D35E7D}"
 EndProject
 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.SoundIo", "src\Ryujinx.Audio.Backends.SoundIo\Ryujinx.Audio.Backends.SoundIo.csproj", "{716364DE-B988-41A6-BAB4-327964266ECC}"
 EndProject
 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Input", "src\Ryujinx.Input\Ryujinx.Input.csproj", "{C16F112F-38C3-40BC-9F5F-4791112063D6}"
 EndProject
-Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Input.SDL3", "src\Ryujinx.Input.SDL3\Ryujinx.Input.SDL3.csproj", "{D728444C-3D1F-4A0E-B4C9-5C9375D47EA3}"
+Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Input.SDL2", "src\Ryujinx.Input.SDL2\Ryujinx.Input.SDL2.csproj", "{DFAB6F2D-B9BF-4AFF-B22B-7684A328EBA3}"
+EndProject
+Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.SDL2.Common", "src\Ryujinx.SDL2.Common\Ryujinx.SDL2.Common.csproj", "{2D5D3A1D-5730-4648-B0AB-06C53CB910C0}"
+EndProject
+Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Audio.Backends.SDL2", "src\Ryujinx.Audio.Backends.SDL2\Ryujinx.Audio.Backends.SDL2.csproj", "{D99A395A-8569-4DB0-B336-900647890052}"
 EndProject
 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Graphics.Nvdec.FFmpeg", "src\Ryujinx.Graphics.Nvdec.FFmpeg\Ryujinx.Graphics.Nvdec.FFmpeg.csproj", "{BEE1C184-C9A4-410B-8DFC-FB74D5C93AEB}"
 EndProject
@@ -75,486 +77,178 @@ Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.Horizon.Kernel.Gene
 EndProject
 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.HLE.Generators", "src\Ryujinx.HLE.Generators\Ryujinx.HLE.Generators.csproj", "{B575BCDE-2FD8-4A5D-8756-31CDD7FE81F0}"
 EndProject
-Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "Ryujinx.BuildValidationTasks", "src\Ryujinx.BuildValidationTasks\Ryujinx.BuildValidationTasks.csproj", "{4A89A234-4F19-497D-A576-DDE8CDFC5B22}"
-EndProject
-Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Ryujinx.SDL3.Common", "src\Ryujinx.SDL3.Common\Ryujinx.SDL3.Common.csproj", "{F6F9826A-BC58-4D78-A700-F358A66B2B06}"
-EndProject
 Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Solution Items", "Solution Items", "{36F870C1-3E5F-485F-B426-F0645AF78751}"
 	ProjectSection(SolutionItems) = preProject
 		.editorconfig = .editorconfig
 		.github\workflows\build.yml = .github\workflows\build.yml
 		.github\workflows\canary.yml = .github\workflows\canary.yml
 		Directory.Packages.props = Directory.Packages.props
-		Directory.Build.props = Directory.Build.props
 		.github\workflows\release.yml = .github\workflows\release.yml
-		nuget.config = nuget.config
 	EndProjectSection
 EndProject
+Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "Ryujinx.BuildValidationTasks", "src\Ryujinx.BuildValidationTasks\Ryujinx.BuildValidationTasks.csproj", "{4A89A234-4F19-497D-A576-DDE8CDFC5B22}"
+EndProject
 Global
 	GlobalSection(SolutionConfigurationPlatforms) = preSolution
 		Debug|Any CPU = Debug|Any CPU
-		Debug|x64 = Debug|x64
-		Debug|x86 = Debug|x86
 		Release|Any CPU = Release|Any CPU
-		Release|x64 = Release|x64
-		Release|x86 = Release|x86
 	EndGlobalSection
 	GlobalSection(ProjectConfigurationPlatforms) = postSolution
 		{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|Any CPU.Build.0 = Debug|Any CPU
-		{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|x64.ActiveCfg = Debug|Any CPU
-		{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|x64.Build.0 = Debug|Any CPU
-		{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|x86.ActiveCfg = Debug|Any CPU
-		{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Debug|x86.Build.0 = Debug|Any CPU
 		{EBB55AEA-C7D7-4DEB-BF96-FA1789E225E9}.Release|Any CPU.ActiveCfg = Release|Any CPU
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 	EndGlobalSection
 	GlobalSection(SolutionProperties) = preSolution
 		HideSolutionNode = FALSE
--- a/assets/locales.json
+++ b/assets/locales.json
--- a/distribution/linux/Ryujinx.sh
+++ b/distribution/linux/Ryujinx.sh
@@ -2,8 +2,8 @@

 SCRIPT_DIR=$(dirname "$(realpath "$0")")

-if [ -f "$SCRIPT_DIR/Ryujinx.Headless.SDL3" ]; then
-    RYUJINX_BIN="Ryujinx.Headless.SDL3"
+if [ -f "$SCRIPT_DIR/Ryujinx.Headless.SDL2" ]; then
+    RYUJINX_BIN="Ryujinx.Headless.SDL2"
 fi

 if [ -f "$SCRIPT_DIR/Ryujinx" ]; then
--- a/distribution/linux/appimage/build-appimage.sh
+++ b/distribution/linux/appimage/build-appimage.sh
@@ -6,6 +6,7 @@ cd "$ROOTDIR"

 BUILDDIR=${BUILDDIR:-publish}
 OUTDIR=${OUTDIR:-publish_appimage}
+UFLAG=${UFLAG:-"gh-releases-zsync|Ryubing|ryujinx|latest|*-x64.AppImage.zsync"}

 rm -rf AppDir
 mkdir -p AppDir/usr/bin
@@ -22,5 +23,11 @@ chmod +x AppDir/AppRun AppDir/usr/bin/Ryujinx*

 mkdir -p "$OUTDIR"

-appimagetool -n --comp zstd --mksquashfs-opt -Xcompression-level --mksquashfs-opt 21 \
+appimagetool --comp zstd --mksquashfs-opt -Xcompression-level --mksquashfs-opt 21 \
+    -u "$UFLAG" \
    AppDir "$OUTDIR"/Ryujinx.AppImage
+
+# Move zsync file needed for delta updates
+if [ "$RELEASE" = "1" ]; then
+    mv ./*.AppImage.zsync "$OUTDIR"
+fi
--- a/distribution/macos/Assets.car
+++ b/distribution/macos/Assets.car
--- a/distribution/macos/Info.plist
+++ b/distribution/macos/Info.plist
@@ -10,8 +10,6 @@
    <string>Ryujinx</string>
    <key>CFBundleIconFile</key>
    <string>Ryujinx.icns</string>
-    <key>CFBundleIconName</key>
-    <string>Ryujinx</string>
 	<key>CFBundleDocumentTypes</key>
 	<array>
 		<dict>
@@ -36,23 +34,23 @@
    <key>CFBundleInfoDictionaryVersion</key>
    <string>6.0</string>
    <key>CFBundleLongVersionString</key>
-    <string>%%RYUJINX_BUILD_VERSION%%-%%RYUJINX_BUILD_GIT_HASH%%</string>
+    <string>%%RYUJINX_BUILD_VERSION%%-%%RYUJINX_BUILD_GIT_HASH%%"</string>
    <key>CFBundleName</key>
    <string>Ryujinx</string>
    <key>CFBundlePackageType</key>
    <string>APPL</string>
    <key>CFBundleShortVersionString</key>
-    <string>1.3</string>
+    <string>1.2</string>
    <key>CFBundleSignature</key>
    <string>????</string>
    <key>CFBundleVersion</key>
-    <string>%%RYUJINX_BUILD_VERSION%%</string>
+    <string>1.2.0</string>
    <key>NSHighResolutionCapable</key>
    <true/>
    <key>CSResourcesFileMapped</key>
    <true/>
    <key>NSHumanReadableCopyright</key>
-    <string>Copyright © 2018 - 2024 Ryujinx Team and Contributors. Copyright © 2024 - 2025 Ryubing and Contributors.</string>
+    <string>Copyright © 2018 - 2023 Ryujinx Team and Contributors.</string>
    <key>LSApplicationCategoryType</key>
    <string>public.app-category.games</string>
    <key>LSMinimumSystemVersion</key>
--- a/distribution/macos/bundle_fix_up.py
+++ b/distribution/macos/bundle_fix_up.py
@@ -562,29 +562,26 @@ search_path = [


 for path in content_directory.rglob("**/*.dylib"):
-    if not path.name.startswith("._"):
-        current_search_path = [path.parent]
-        current_search_path.extend(search_path)
+    current_search_path = [path.parent]
+    current_search_path.extend(search_path)

-        print(f"Fixing path '{path}' using search path of '{current_search_path}' for context of '{content_directory}'.")
-        fixup_dylib(
-            path,
-            get_path_related_to_target_exec(content_directory, path),
-            current_search_path,
-            content_directory,
-        )
+    fixup_dylib(
+        path,
+        get_path_related_to_target_exec(content_directory, path),
+        current_search_path,
+        content_directory,
+    )

 for path in content_directory.rglob("**/*.so"):
-    if not path.name.startswith("._"):
-        current_search_path = [path.parent]
-        current_search_path.extend(search_path)
+    current_search_path = [path.parent]
+    current_search_path.extend(search_path)

-        fixup_dylib(
-            path,
-            get_path_related_to_target_exec(content_directory, path),
-            current_search_path,
-            content_directory,
-        )
+    fixup_dylib(
+        path,
+        get_path_related_to_target_exec(content_directory, path),
+        current_search_path,
+        content_directory,
+    )


 with open(executable_path, "rb") as input:
--- a/distribution/macos/create_app_bundle.sh
+++ b/distribution/macos/create_app_bundle.sh
@@ -25,38 +25,26 @@ cp "$PUBLISH_DIRECTORY"/*.dylib "$APP_BUNDLE_DIRECTORY/Contents/Frameworks"
 cp Info.plist "$APP_BUNDLE_DIRECTORY/Contents"
 cp Ryujinx.icns "$APP_BUNDLE_DIRECTORY/Contents/Resources/Ryujinx.icns"
 cp updater.sh "$APP_BUNDLE_DIRECTORY/Contents/Resources/updater.sh"
-cp Assets.car "$APP_BUNDLE_DIRECTORY/Contents/Resources/Assets.car"
 cp -r "$PUBLISH_DIRECTORY/THIRDPARTY.md" "$APP_BUNDLE_DIRECTORY/Contents/Resources"

 echo -n "APPL????" > "$APP_BUNDLE_DIRECTORY/Contents/PkgInfo"

 # Fixup libraries and executable
-echo "Running bundle fix up python script"
 python3 bundle_fix_up.py "$APP_BUNDLE_DIRECTORY" MacOS/Ryujinx

 # Now sign it
-echo "Starting signing process"
 if ! [ -x "$(command -v codesign)" ];
 then
    if ! [ -x "$(command -v rcodesign)" ];
    then
-        echo "Cannot find rcodesign on your system, please install rcodesign and ensure it is in your search path."
+        echo "Cannot find rcodesign on your system, please install rcodesign."
        exit 1
    fi

-    echo "Using rcodesign for ad-hoc signing"
-
-    echo "Resigning all frameworks dylib files as ad-hoc"
-    find "$APP_BUNDLE_DIRECTORY/Contents/Frameworks" -type f -name "*.dylib" -exec rcodesign sign {} \;
-
-    echo "Signing app bundle as ad-hoc"
+    # cargo install apple-codesign
+    echo "Usign rcodesign for ad-hoc signing"
    rcodesign sign --entitlements-xml-path "$ENTITLEMENTS_FILE_PATH" "$APP_BUNDLE_DIRECTORY"
 else
-    echo "Using codesign for ad-hoc signing"
-
-    echo "Resigning all frameworks dylib files as ad-hoc"
-    find "$APP_BUNDLE_DIRECTORY/Contents/Frameworks" -type f -name "*.dylib" -exec codesign --force --sign - {} \;
-
-    echo "Signing app bundle as ad-hoc"
+    echo "Usign codesign for ad-hoc signing"
    codesign --entitlements "$ENTITLEMENTS_FILE_PATH" -f -s - "$APP_BUNDLE_DIRECTORY"
 fi
--- a/distribution/macos/create_macos_build_ava.sh
+++ b/distribution/macos/create_macos_build_ava.sh
@@ -20,18 +20,6 @@ SOURCE_REVISION_ID=$6
 CONFIGURATION=$7
 CANARY=$8

-if [[ "$(uname)" == "Darwin" ]]; then
-    echo "Clearing xattr on all dot undercsore files"
-    find "$BASE_DIR" -type f -name "._*" -exec sh -c '
-    for f; do
-        dir=$(dirname "$f")
-        base=$(basename "$f")
-        orig="$dir/${base#._}"
-        [ -f "$orig" ] && xattr -c "$orig" || true
-    done
-    ' sh {} +
-fi
-
 if [ "$CANARY" == "1" ]; then
  RELEASE_TAR_FILE_NAME=ryujinx-canary-$VERSION-macos_universal.app.tar
 elif [ "$VERSION" == "1.1.0" ]; then
--- a/distribution/macos/create_macos_build_headless.sh
+++ b/distribution/macos/create_macos_build_headless.sh
@@ -0,0 +1,112 @@
+#!/bin/bash
+
+set -e
+
+if [ "$#" -lt 8 ]; then
+    echo "usage <BASE_DIR> <TEMP_DIRECTORY> <OUTPUT_DIRECTORY> <ENTITLEMENTS_FILE_PATH> <VERSION> <SOURCE_REVISION_ID> <CONFIGURATION> <CANARY>"
+    exit 1
+fi
+
+mkdir -p "$1"
+mkdir -p "$2"
+mkdir -p "$3"
+
+BASE_DIR=$(readlink -f "$1")
+TEMP_DIRECTORY=$(readlink -f "$2")
+OUTPUT_DIRECTORY=$(readlink -f "$3")
+ENTITLEMENTS_FILE_PATH=$(readlink -f "$4")
+VERSION=$5
+SOURCE_REVISION_ID=$6
+CONFIGURATION=$7
+CANARY=$8
+
+if [ "$CANARY" == "1" ]; then
+  RELEASE_TAR_FILE_NAME=nogui-ryujinx-canary-$VERSION-macos_universal.tar
+elif [ "$VERSION" == "1.1.0" ]; then
+  RELEASE_TAR_FILE_NAME=nogui-ryujinx-$CONFIGURATION-$VERSION+$SOURCE_REVISION_ID-macos_universal.tar
+else
+  RELEASE_TAR_FILE_NAME=nogui-ryujinx-$VERSION-macos_universal.tar
+fi
+
+ARM64_OUTPUT="$TEMP_DIRECTORY/publish_arm64"
+X64_OUTPUT="$TEMP_DIRECTORY/publish_x64"
+UNIVERSAL_OUTPUT="$OUTPUT_DIRECTORY/publish"
+EXECUTABLE_SUB_PATH=Ryujinx.Headless.SDL2
+
+rm -rf "$TEMP_DIRECTORY"
+mkdir -p "$TEMP_DIRECTORY"
+
+DOTNET_COMMON_ARGS=(-p:DebugType=embedded -p:Version="$VERSION" -p:SourceRevisionId="$SOURCE_REVISION_ID" --self-contained true $EXTRA_ARGS)
+
+dotnet restore
+dotnet build -c "$CONFIGURATION" src/Ryujinx.Headless.SDL2
+dotnet publish -c "$CONFIGURATION" -r osx-arm64 -o "$TEMP_DIRECTORY/publish_arm64" "${DOTNET_COMMON_ARGS[@]}" src/Ryujinx.Headless.SDL2
+dotnet publish -c "$CONFIGURATION" -r osx-x64 -o "$TEMP_DIRECTORY/publish_x64" "${DOTNET_COMMON_ARGS[@]}" src/Ryujinx.Headless.SDL2
+
+# Get rid of the support library for ARMeilleure for x64 (that's only for arm64)
+rm -rf "$TEMP_DIRECTORY/publish_x64/libarmeilleure-jitsupport.dylib"
+
+# Get rid of libsoundio from arm64 builds as we don't have a arm64 variant
+# TODO: remove this once done
+rm -rf "$TEMP_DIRECTORY/publish_arm64/libsoundio.dylib"
+
+rm -rf "$OUTPUT_DIRECTORY"
+mkdir -p "$OUTPUT_DIRECTORY"
+
+# Let's copy one of the two different outputs and remove the executable
+cp -R "$ARM64_OUTPUT/" "$UNIVERSAL_OUTPUT"
+rm "$UNIVERSAL_OUTPUT/$EXECUTABLE_SUB_PATH"
+
+# Make its libraries universal
+python3 "$BASE_DIR/distribution/macos/construct_universal_dylib.py" "$ARM64_OUTPUT" "$X64_OUTPUT" "$UNIVERSAL_OUTPUT" "**/*.dylib"
+
+if ! [ -x "$(command -v lipo)" ];
+then
+    if ! [ -x "$(command -v llvm-lipo-17)" ];
+    then
+        LIPO=llvm-lipo
+    else
+        LIPO=llvm-lipo-17
+    fi
+else
+    LIPO=lipo
+fi
+
+# Make the executable universal
+$LIPO "$ARM64_OUTPUT/$EXECUTABLE_SUB_PATH" "$X64_OUTPUT/$EXECUTABLE_SUB_PATH" -output "$UNIVERSAL_OUTPUT/$EXECUTABLE_SUB_PATH" -create
+
+# Now sign it
+if ! [ -x "$(command -v codesign)" ];
+then
+    if ! [ -x "$(command -v rcodesign)" ];
+    then
+        echo "Cannot find rcodesign on your system, please install rcodesign."
+        exit 1
+    fi
+
+    # NOTE: Currently require https://github.com/indygreg/apple-platform-rs/pull/44 to work on other OSes.
+    # cargo install --git "https://github.com/marysaka/apple-platform-rs" --branch "fix/adhoc-app-bundle" apple-codesign --bin "rcodesign"
+    echo "Using rcodesign for ad-hoc signing"
+    for FILE in "$UNIVERSAL_OUTPUT"/*; do
+        if [[ $(file "$FILE") == *"Mach-O"* ]]; then
+            rcodesign sign --entitlements-xml-path "$ENTITLEMENTS_FILE_PATH" "$FILE"
+        fi
+    done  
+else
+    echo "Using codesign for ad-hoc signing"
+    for FILE in "$UNIVERSAL_OUTPUT"/*; do
+        if [[ $(file "$FILE") == *"Mach-O"* ]]; then
+            codesign --entitlements "$ENTITLEMENTS_FILE_PATH" -f -s - "$FILE"
+        fi
+    done    
+fi
+
+echo "Creating archive"
+pushd "$OUTPUT_DIRECTORY"
+tar --exclude "publish/Ryujinx.Headless.SDL2" -cvf "$RELEASE_TAR_FILE_NAME" publish 1> /dev/null
+python3 "$BASE_DIR/distribution/misc/add_tar_exec.py" "$RELEASE_TAR_FILE_NAME" "publish/Ryujinx.Headless.SDL2" "publish/Ryujinx.Headless.SDL2"
+gzip -9 < "$RELEASE_TAR_FILE_NAME" > "$RELEASE_TAR_FILE_NAME.gz"
+rm "$RELEASE_TAR_FILE_NAME"
+popd
+
+echo "Done"
--- a/docs/README.md
+++ b/docs/README.md
@@ -8,7 +8,7 @@ Intro to Ryujinx
 Ryujinx is an open-source Nintendo Switch emulator, created by gdkchan, written in C#. 
 * The CPU emulator, ARMeilleure, emulates an ARMv8 CPU and currently has support for most 64-bit ARMv8 and some of the ARMv7 (and older) instructions.
 * The GPU emulator emulates the Switch's Maxwell GPU using either the OpenGL (version 4.5 minimum), Vulkan, or Metal (via MoltenVK) APIs through a custom build of OpenTK or Silk.NET respectively.
-* Audio output is entirely supported via C# wrappers for SDL3, with OpenAL & libsoundio as fallbacks.
+* Audio output is entirely supported via C# wrappers for SDL2, with OpenAL & libsoundio as fallbacks.

 Getting Started
 ===============
--- a/docs/compatibility.csv
+++ b/docs/compatibility.csv
@@ -188,8 +188,6 @@
 01003DD00BFEE000,"Airheart - Tales of broken Wings",,playable,2021-02-26 15:20:27
 01007F100DE52000,"Akane",nvdec,playable,2022-07-21 00:12:18
 01009A800F0C8000,"Akash: Path of the Five",gpu;nvdec,ingame,2020-12-14 22:33:12
-01009E8012976000,"AKIBA'S TRIP: Hellbound & Debriefed",,playable,2025-07-30 23:22:47
-0100D74019A0E000,"AKIBA'S TRIP: Undead & Undressed Director's Cut",,playable,2025-07-31 13:58:42
 010053100B0EA000,"Akihabara - Feel the Rhythm Remixed",,playable,2021-02-22 14:39:35
 0100D4C00EE0C000,"Akuarium",slow,playable,2020-12-12 23:43:36
 010026E00FEBE000,"Akuto: Showdown",,playable,2020-08-04 19:43:27
@@ -603,7 +601,6 @@
 010060200A4BE000,"Brawlout",ldn-untested;online,playable,2021-06-04 17:35:35
 0100C1B00E1CA000,"Brawlout Demo",demo,playable,2021-02-13 22:46:53
 010022C016DC8000,"Breakout: Recharged",slow,ingame,2022-11-06 15:32:57
-010048A021C40000,"Breakout Beyond",,playable,2025-04-26 19:11:35
 01000AA013A5E000,"Breathedge",UE4;nvdec,playable,2021-05-06 15:44:28
 01003D50100F4000,"Breathing Fear",,playable,2020-07-14 15:12:29
 010026800BB06000,"Brick Breaker",nvdec;online,playable,2020-12-15 18:26:23
@@ -978,7 +975,7 @@
 0100416004C00000,"DOOM",gpu;slow;nvdec;online-broken,ingame,2024-09-23 15:40:07
 010018900DD00000,"DOOM (1993)",nvdec;online-broken,menus,2022-09-06 13:32:19
 01008CB01E52E000,"DOOM + DOOM II",opengl;ldn-untested;LAN,playable,2024-09-12 07:06:01
-010029D00E740000,"DOOM 3",crash;slow,menus,2024-08-03 05:25:47
+010029D00E740000,"DOOM 3",crash,menus,2024-08-03 05:25:47
 01005D700E742000,"DOOM 64",nvdec;vulkan,playable,2020-10-13 23:47:28
 0100D4F00DD02000,"DOOM II (Classic)",nvdec;online,playable,2021-06-03 20:10:01
 0100B1A00D8CE000,"DOOM® Eternal",gpu;slow;nvdec;online-broken,ingame,2024-08-28 15:57:17
@@ -1097,7 +1094,6 @@
 0100F9600E746000,"ESP Ra.De. Psi",audio;slow,ingame,2024-03-07 15:05:08
 010073000FE18000,"Esports powerful pro yakyuu 2020",gpu;crash;Needs More Attention,ingame,2024-04-29 05:34:14
 01004F9012FD8000,"Estranged: The Departure",nvdec;UE4,playable,2022-10-24 10:37:58
-010018F01E0A0000,"Eternights",,playable,2025-07-30 12:10:24
 0100CB900B498000,"Eternum Ex",,playable,2021-01-13 20:28:32
 010092501EB2C000,"Europa (Demo)",gpu;crash;UE4,ingame,2024-04-23 10:47:12
 01007BE0160D6000,"EVE ghost enemies",gpu,ingame,2023-01-14 03:13:30
@@ -1128,7 +1124,6 @@
 0100034012606000,"Family Mysteries: Poisonous Promises",audio;crash,menus,2021-11-26 12:35:06
 010017C012726000,"Fantasy Friends",,playable,2022-10-17 19:42:39
 0100767008502000,"FANTASY HERO ～unsigned legacy～",,playable,2022-07-26 12:28:52
-0100755017EE0000,"FANTASY LIFE i: The Girl Who Steals Time",gpu;crash;vulkan-backend-bug,ingame,2025-06-08 20:41:00
 0100944003820000,"Fantasy Strike",online,playable,2021-02-27 01:59:18
 01000E2012F6E000,"Fantasy Tavern Sextet -Vol.1 New World Days-",gpu;crash;Needs Update,ingame,2022-12-05 16:48:00
 01005C10136CA000,"Fantasy Tavern Sextet -Vol.2 Adventurer's Days-",gpu;slow;crash,ingame,2021-11-06 02:57:29
@@ -1175,7 +1170,6 @@
 0100EB100AB42000,"FINAL FANTASY XII THE ZODIAC AGE",opengl;vulkan-backend-bug,playable,2024-08-11 07:01:54
 010068F00AA78000,"FINAL FANTASY XV POCKET EDITION HD",,playable,2021-01-05 17:52:08
 0100CE4010AAC000,"FINAL FANTASY® CRYSTAL CHRONICLES™ Remastered Edition",,playable,2023-04-02 23:39:12
-010038B015560000,FINAL FANTASY TACTICS - The Ivalice Chronicles,gpu,boots,2024-09-30 02:59:00
 01001BA00AE4E000,"Final Light, The Prison",,playable,2020-07-31 21:48:44
 0100FF100FB68000,"Finding Teddy 2 : Definitive Edition",gpu,ingame,2024-04-19 16:51:33
 0100F4E013AAE000,"Fire & Water",,playable,2020-12-15 15:43:20
@@ -1244,8 +1238,6 @@
 010003F00BD48000,"Friday the 13th: Killer Puzzle",,playable,2021-01-28 01:33:38
 010092A00C4B6000,"Friday the 13th: The Game Ultimate Slasher Edition",nvdec;online-broken;UE4,playable,2022-09-06 17:33:27
 0100F200178F4000,"FRONT MISSION 1st: Remake",,playable,2023-06-09 07:44:24
-0100C4E018A24000,"FRONT MISSION 2: Remake",,playable,2025-07-30 12:11:23
-01007E6019872000,"FRONT MISSION 3: Remake",,playable,2025-07-30 12:12:02
 0100861012474000,"Frontline Zed",,playable,2020-10-03 12:55:59
 0100B5300B49A000,"Frost",,playable,2022-07-27 12:00:36
 010038A007AA4000,"FruitFall Crush",,playable,2020-10-20 11:33:33
@@ -1441,7 +1433,6 @@
 0100C2700E338000,"Heroland",,playable,2020-08-05 15:35:39
 01007AC00E012000,"HexaGravity",,playable,2021-05-28 13:47:48
 01004E800F03C000,"Hidden",slow,ingame,2022-10-05 10:56:53
-0100C1101EE5A000,"High on Life",,menus,2025-08-26 19:11:00
 0100F6A00A684000,"Higurashi no Naku Koro ni Hō",audio,ingame,2021-09-18 14:40:28
 0100F8D0129F4000,"Himehibi 1 gakki - Princess Days",crash,nothing,2021-11-03 08:34:19
 0100F3D008436000,"Hiragana Pixel Party",,playable,2021-01-14 08:36:50
@@ -1451,7 +1442,6 @@
 0100F7300ED2C000,"Hoggy2",,playable,2022-10-10 13:53:35
 0100F7E00C70E000,"Hogwarts Legacy",UE4;slow,ingame,2024-09-03 19:53:58
 0100633007D48000,"Hollow Knight",nvdec,playable,2023-01-16 15:44:56
-010013C00E930000,"Hollow Knight: Silksong",,playable,2025-09-04 17:23:22
 0100F2100061E800,"Hollow0",UE4;gpu,ingame,2021-03-03 23:42:56
 0100342009E16000,"Holy Potatoes! What The Hell?!",,playable,2020-07-03 10:48:56
 010071B00C904000,"HoPiKo",,playable,2021-01-13 20:12:38
@@ -1526,7 +1516,6 @@
 010095C016C14000,"Iridium",,playable,2022-08-05 23:19:53
 0100AD300B786000,"Iris School of Wizardry -Vinculum Hearts-",,playable,2022-12-05 13:11:15
 0100945012168000,"Iris.Fall",nvdec,playable,2022-10-18 13:40:22
-010059801B736000,"IronFall: Invasion",,playable,2025-07-30 11:42:30 
 01005270118D6000,"Iron Wings",slow,ingame,2022-08-07 08:32:57
 01004DB003E6A000,"IRONCAST",,playable,2021-01-13 13:54:29
 0100E5700CD56000,"Irony Curtain: From Matryoshka with Love",,playable,2021-06-04 20:12:37
@@ -1890,7 +1879,7 @@
 010097800EA20000,"Monster Energy Supercross - The Official Videogame 3",UE4;audout;nvdec;online,playable,2021-06-14 12:37:54
 0100E9900ED74000,"Monster Farm",32-bit;nvdec,playable,2021-05-05 19:29:13
 0100770008DD8000,"Monster Hunter Generations Ultimate™",32-bit;online-broken;ldn-works,playable,2024-03-18 14:35:36
-0100B04011742000,"MONSTER HUNTER RISE",gpu;slow;crash;nvdec;online-broken;Needs Update;ldn-works,ingame,2024-08-24 11:04:59
+0100B04011742000,"Monster Hunter Rise",gpu;slow;crash;nvdec;online-broken;Needs Update;ldn-works,ingame,2024-08-24 11:04:59
 010093A01305C000,"Monster Hunter Rise Demo",online-broken;ldn-works;demo,playable,2022-10-18 23:04:17
 0100E21011446000,"Monster Hunter Stories 2: Wings of Ruin",services,ingame,2022-07-10 19:27:30
 010042501329E000,"MONSTER HUNTER STORIES 2: WINGS OF RUIN Trial Version",demo,playable,2022-11-13 22:20:26
@@ -2039,7 +2028,6 @@
 0100628004BCE000,"Nights of Azure 2: Bride of the New Moon",crash;nvdec;regression,menus,2022-11-24 16:00:39
 010042300C4F6000,"Nightshade／百花百狼",nvdec,playable,2020-05-10 19:43:31
 0100AA0008736000,"Nihilumbra",,playable,2020-05-10 16:00:12
-01009FA01FF6C000,"Nikoderiko: The Magical World",gpu,ingame,2025-04-26 19:13:31
 0100D03003F0E000,"Nine Parchments",ldn-untested,playable,2022-08-07 12:32:08
 0100E2F014F46000,"NINJA GAIDEN Σ",nvdec,playable,2022-11-13 16:27:02
 0100696014F4A000,"NINJA GAIDEN Σ2",nvdec,playable,2024-07-31 21:53:48
@@ -2266,16 +2254,13 @@
 010086F0064CE000,"Poi: Explorer Edition",nvdec,playable,2021-01-21 19:32:00
 0100EB6012FD2000,"Poison Control",,playable,2021-05-16 14:01:54
 010072400E04A000,"Pokémon Café ReMix",,playable,2021-08-17 20:00:04
-010008c01e742000,"Pokémon Friends",crash;services,menus,2025-07-24 13:32:00
 01003D200BAA2000,"Pokémon Mystery Dungeon™: Rescue Team DX",mac-bug,playable,2024-01-21 00:16:32
 01008DB008C2C000,"Pokémon Shield + Pokémon Shield Expansion Pass",deadlock;crash;online-broken;ldn-works;LAN,ingame,2024-08-12 07:20:22
 0100ABF008968000,"Pokémon Sword + Pokémon Sword Expansion Pass",deadlock;crash;online-broken;ldn-works;LAN,ingame,2024-08-26 15:40:37
 01009AD008C4C000,"Pokémon: Let's Go, Pikachu! demo",slow;demo,playable,2023-11-26 11:23:20
 0100000011D90000,"Pokémon™ Brilliant Diamond",gpu;ldn-works,ingame,2024-08-28 13:26:35
-010018E011D92000,"Pokémon™ Shining Pearl",gpu;ldn-works,ingame,2024-08-28 13:26:35
 010015F008C54000,"Pokémon™ HOME",Needs Update;crash;services,menus,2020-12-06 06:01:51
 01001F5010DFA000,"Pokémon™ Legends: Arceus",gpu;Needs Update;ldn-works,ingame,2024-09-19 10:02:02
-0100F43008C44000,"Pokémon™ Legends: Z-A",gpu;crash;ldn-works,ingame,2025-11-16 00:30:00
 01005D100807A000,"Pokémon™ Quest",,playable,2022-02-22 16:12:32
 0100A3D008C5C000,"Pokémon™ Scarlet",gpu;nvdec;ldn-works;amd-vendor-bug,ingame,2023-12-14 13:18:29
 01008F6008C5E000,"Pokémon™ Violet",gpu;nvdec;ldn-works;amd-vendor-bug;mac-bug,ingame,2024-07-30 02:51:48
@@ -2317,7 +2302,6 @@
 010077B00BDD8000,"Professional Farmer: Nintendo Switch™ Edition",slow,playable,2020-12-16 13:38:19
 010018300C83A000,"Professor Lupo and his Horrible Pets",,playable,2020-06-12 00:08:45
 0100D1F0132F6000,"Professor Lupo: Ocean",,playable,2021-04-14 16:33:33
-0100C3A017834000,"Prodeus",,playable,2025-07-30 12:07:52
 0100BBD00976C000,"Project Highrise: Architect's Edition",,playable,2022-08-10 17:19:12
 0100ACE00DAB6000,"Project Nimbus: Complete Edition",nvdec;UE4;vulkan-backend-bug,playable,2022-08-10 17:35:43
 01002980140F6000,"Project TRIANGLE STRATEGY™ Debut Demo",UE4;demo,playable,2022-10-24 21:40:27
@@ -2449,7 +2433,6 @@
 0100E9C010EA8000,"Rise of Insanity",,playable,2020-08-30 15:42:14
 01006BA00E652000,"Rise: Race The Future",,playable,2021-02-27 13:29:06
 010020C012F48000,"Rising Hell",,playable,2022-10-31 13:54:02
-0100D1801A0F4000,"Risk of Rain Returns",,playable,2025-06-28 04:24:04
 010076D00E4BA000,"Risk of Rain 2",online-broken,playable,2024-03-04 17:01:05
 0100E8300A67A000,"RISK® Global Domination",nvdec;online-broken,playable,2022-08-01 18:53:28
 010042500FABA000,"Ritual: Crown of Horns",,playable,2021-01-26 16:01:47
@@ -2583,7 +2566,6 @@
 0100C610154CA000,"Shadowrun: Hong Kong - Extended Edition",gpu;Needs Update,ingame,2022-10-04 20:53:09
 010000000EEF0000,"Shadows 2: Perfidia",,playable,2020-08-07 12:43:46
 0100AD700CBBE000,"Shadows of Adam",,playable,2021-01-11 13:35:58
-010037A01F96C000,"Shadows of the Damned: Hella Remastered",,playable,2025-09-05 11:34:32
 01002A800C064000,"Shadowverse Champions Battle",,playable,2022-10-02 22:59:29
 01003B90136DA000,"Shadowverse: Champion's Battle",crash,nothing,2023-03-06 00:31:50
 0100820013612000,"Shady Part of Me",,playable,2022-10-20 11:31:55
@@ -2710,8 +2692,6 @@
 01008F701C074000,"SONIC SUPERSTARS",gpu;nvdec,ingame,2023-10-28 17:48:07
 010088801C150000,"Sonic Superstars Digital Art Book with Mini Digital Soundtrack",,playable,2024-08-20 13:26:56
 01005EA01C0FC000,"SONIC X SHADOW GENERATIONS",crash,ingame,2025-01-07 04:20:45
-010064B0242BE000,"Sonic Racing: CrossWorlds - Demo",gpu;vulkan-backend-bug;demo,ingame,2024-09-25 11:27:53
-01006E001823C000,"Sonic Racing: CrossWorlds",gpu;vulkan-backend-bug;ldn-broken,ingame,2024-09-30 17:23:00
 010064F00C212000,"Soul Axiom Rebooted",nvdec;slow,ingame,2020-09-04 12:41:01
 0100F2100F0B2000,"Soul Searching",,playable,2020-07-09 18:39:07
 01008F2005154000,"South Park™: The Fractured but Whole™ - Standard Edition",slow;online-broken;vulkan-backend-bug;gpu,ingame,2025-01-21 17:35:10
@@ -2763,7 +2743,6 @@
 01005D701264A000,"SpyHack",,playable,2021-04-15 10:53:51
 010077B00E046000,"Spyro™ Reignited Trilogy",nvdec;UE4,playable,2022-09-11 18:38:33
 0100085012A0E000,"Squeakers",,playable,2020-12-13 12:13:05
-0100E1D01EB2E000,"Squeakross: Home Squeak Home",,playable,2025-06-16 02:02:00
 010009300D31C000,"Squidgies Takeover",,playable,2020-07-20 22:28:08
 0100FCD0102EC000,"Squidlit",,playable,2020-08-06 12:38:32
 0100EBF00E702000,"STAR OCEAN First Departure R",nvdec,playable,2021-07-05 19:29:16
@@ -2783,7 +2762,7 @@
 0100E6B0115FC000,"Star99",online,menus,2021-11-26 14:18:51
 01002100137BA000,"Stardash",,playable,2021-01-21 16:31:19
 0100E65002BB8000,"Stardew Valley",online-broken;ldn-untested,playable,2024-02-14 03:11:19
-01002CC003FE6000,"Starlink: Battle for Atlas™ Digital Edition",,playable,2025-07-30 12:09:37
+01002CC003FE6000,"Starlink: Battle for Atlas™ Digital Edition",services-horizon;crash;Needs Update,nothing,2024-05-05 17:25:11
 010098E010FDA000,"Starlit Adventures Golden Stars",,playable,2020-11-21 12:14:43
 01001BB00AC26000,"STARSHIP AVENGER Operation: Take Back Earth",,playable,2021-01-12 15:52:55
 010000700A572000,"State of Anarchy: Master of Mayhem",nvdec,playable,2021-01-12 19:00:05
@@ -2869,13 +2848,11 @@
 0100BC0018138000,"Super Mario RPG™",gpu;audio;nvdec,ingame,2024-06-19 17:43:42
 ,"Super Mario World",homebrew,boots,2024-06-13 01:40:31
 010049900F546000,"Super Mario™ 3D All-Stars",services-horizon;slow;vulkan;amd-vendor-bug,ingame,2024-05-07 02:38:16
-010099C022B96000,"Super Mario Galaxy",slow;vulkan;amd-vendor-bug;vulkan-vendor-bug,ingame,2025-10-01 15:30:00
-0100FD8022DAA000,"Super Mario Galaxy 2",slow;vulkan;amd-vendor-bug;vulkan-vendor-bug;deadlock,ingame,2025-10-04 18:50:00
 010028600EBDA000,"Super Mario™ 3D World + Bowser’s Fury",ldn-works,playable,2024-07-31 10:45:37
 01004F8006A78000,"Super Meat Boy",services,playable,2020-04-02 23:10:07
 01009C200D60E000,"Super Meat Boy Forever",gpu,boots,2021-04-26 14:25:39
 0100BDD00EC5C000,"Super Mega Space Blaster Special Turbo",online,playable,2020-08-06 12:13:25
-010031F019294000,"Super Monkey Ball Banana Rumble",ldn-broken,playable,2025-10-01 18:03:00
+010031F019294000,"Super Monkey Ball Banana Rumble",,playable,2024-06-28 10:39:18
 0100B2A00E1E0000,"Super Monkey Ball: Banana Blitz HD",online-broken,playable,2022-09-16 13:16:25
 01006D000D2A0000,"Super Mutant Alien Assault",,playable,2020-06-07 23:32:45
 01004D600AC14000,"Super Neptunia RPG",nvdec,playable,2022-08-17 16:38:52
@@ -2941,7 +2918,6 @@
 0100B76011DAA000,"Taxi Chaos",slow;online-broken;UE4,playable,2022-10-25 19:13:00
 0100F43011E5A000,"Tcheco in the Castle of Lucio",,playable,2020-06-27 13:35:43
 010092B0091D0000,"Team Sonic Racing",online-broken;ldn-works,playable,2024-02-05 15:05:27
-010084B00B36E000,"Team Sonic Racing",online-broken;ldn-works,playable,2024-02-05 15:05:27
 0100FE701475A000,"Teenage Mutant Ninja Turtles: Shredder's Revenge",deadlock;crash,boots,2024-09-28 09:31:39
 01005CF01E784000,"Teenage Mutant Ninja Turtles: Splintered Fate",,playable,2024-08-03 13:50:42
 0100FDB0154E4000,"Teenage Mutant Ninja Turtles: The Cowabunga Collection",,playable,2024-01-22 19:39:04
@@ -2987,7 +2963,6 @@
 0100EBA01548E000,"The Cruel King and the Great Hero",gpu;services,ingame,2022-12-02 07:02:08
 010051800E922000,"The Dark Crystal: Age of Resistance Tactics",,playable,2020-08-11 13:43:41
 01003DE00918E000,"The Darkside Detective",,playable,2020-06-03 22:16:18
-010032B015D66000,"The DioField Chronicle",,playable,2025-09-05 11:35:50
 01000A10041EA000,"The Elder Scrolls V: Skyrim",gpu;crash,ingame,2024-07-14 03:21:31
 01004A9006B84000,"The End Is Nigh",,playable,2020-06-01 11:26:45
 0100CA100489C000,"The Escapists 2",nvdec,playable,2020-09-24 12:31:31
@@ -2995,7 +2970,6 @@
 0100C2E0129A6000,"The Executioner",nvdec,playable,2021-01-23 00:31:28
 01006050114D4000,"The Experiment: Escape Room",gpu,ingame,2022-09-30 13:20:35
 0100B5900DFB2000,"The Eyes of Ara",,playable,2022-09-16 14:44:06
-0100BA5013E52000,"The Falconeer: Warrior Edition",,playable,2025-07-30 12:04:50
 01002DD00AF9E000,"The Fall",gpu,ingame,2020-05-31 23:31:16
 01003E5002320000,"The Fall Part 2: Unbound",,playable,2021-11-06 02:18:08
 0100CDC00789E000,"The Final Station",nvdec,playable,2022-08-22 15:54:39
@@ -3039,7 +3013,6 @@
 01009B101044C000,"The Legend of Heroes: Trails of Cold Steel III Demo",demo;nvdec,playable,2021-04-23 01:07:32
 0100D3C010DE8000,"The Legend of Heroes: Trails of Cold Steel IV",nvdec,playable,2021-04-23 14:01:05
 01005E5013862000,"THE LEGEND OF HEROES: ZERO NO KISEKI KAI [英雄傳說 零之軌跡：改]",crash,nothing,2021-09-30 14:41:07
-01009C901ACEE000,"The Legend of Nayuta: Boundless Trails",,ingame,2025-06-12 15:47
 01008CF01BAAC000,"The Legend of Zelda Echoes of Wisdom",nvdec;ASTC;intel-vendor-bug,playable,2024-10-01 14:11:01
 0100509005AF2000,"The Legend of Zelda: Breath of the Wild Demo",demo,ingame,2022-12-24 05:02:58
 01007EF00011E000,"The Legend of Zelda™: Breath of the Wild",gpu;amd-vendor-bug;mac-bug,ingame,2024-09-23 19:35:46
@@ -3218,7 +3191,6 @@
 010000400F582000,"TT Isle of Man Ride on the Edge 2",gpu;nvdec;online-broken,ingame,2022-09-30 22:13:05
 0100752011628000,"TTV2",,playable,2020-11-27 13:21:36
 0100AFE00452E000,"Tumblestone",,playable,2021-01-07 17:49:20
-0100D1A01D7BA000,"Turbo Overkill",,playable,2025-07-30 12:08:57
 010085500D5F6000,"Turok",gpu,ingame,2021-06-04 13:16:24
 0100CDC00D8D6000,"Turok 2: Seeds of Evil",gpu;vulkan,ingame,2022-09-12 17:50:05
 010004B0130C8000,"Turrican Flashback",audout,playable,2021-08-30 10:07:56
@@ -3228,7 +3200,6 @@
 010038400C2FE000,"TY the Tasmanian Tiger™ HD",32-bit;crash;nvdec,menus,2020-12-17 21:15:00
 010073A00C4B2000,"Tyd wag vir Niemand",,playable,2021-03-02 13:39:53
 0100D5B00D6DA000,"Type:Rider",,playable,2021-01-06 13:12:55
-01008AF01AD22000,"The Patrick Star Game",,playable,2025-10-01 17:55:30
 010040D01222C000,"UBERMOSH: SANTICIDE",,playable,2020-11-27 15:05:01
 0100992010BF8000,"Ubongo",,playable,2021-02-04 21:15:01
 010079000B56C000,"UglyDolls: An Imperfect Adventure",nvdec;UE4,playable,2022-08-25 14:42:16
@@ -3243,8 +3214,6 @@
 0100592005164000,"UNBOX: Newbie's Adventure",UE4,playable,2022-08-29 13:12:56
 01002D900C5E4000,"Uncanny Valley",nvdec,playable,2021-06-04 13:28:45
 010076F011F54000,"Undead & Beyond",nvdec,playable,2022-10-04 09:11:18
-01009B700D0B8000,"Undead Horde",,playable,2025-07-30 12:05:05
-0100FC301A878000,"Undead Horde 2: Necropolis",,playable,2025-07-30 12:06:07
 01008F3013E4E000,"Under Leaves",,playable,2021-05-22 18:13:58
 010080B00AD66000,"Undertale",,playable,2022-08-31 17:31:46
 01008F80049C6000,"Unepic",,playable,2024-01-15 17:03:00
@@ -3475,6 +3444,3 @@
 0100F4401940A000,"超探偵事件簿 レインコード  (Master Detective Archives: Rain Code)",crash,ingame,2024-02-12 20:58:31
 010064801A01C000,"超次元ゲイム ネプテューヌ GameMaker R:Evolution",crash,nothing,2023-10-30 22:37:40
 0100F3400332C000,"ゼノブレイド2",deadlock;amd-vendor-bug,ingame,2024-03-28 14:31:41
-010075000ECBE000,"超级马力欧 奥德赛",nvdec;intel-vendor-bug;mac-bug,playable,2024-08-25 01:32:34
-010075100E8EC000,"马力欧卡丁车8 豪华版",32-bit;ldn-works;LAN;amd-vendor-bug,playable,2024-09-19 11:55:17
-0100E8C00F506000,"新 超级马力欧兄弟U 豪华版",32-bit,playable,2023-10-08 02:06:37
--- a/global.json
+++ b/global.json
@@ -1,6 +1,6 @@
 {
  "sdk": {
-    "version": "10.0.100",
+    "version": "9.0.100",
    "rollForward": "latestFeature"
  }
 }
--- a/nuget.config
+++ b/nuget.config
@@ -1,25 +1,7 @@
 <?xml version="1.0" encoding="utf-8"?>
-
 <configuration>
-    <packageSources>
-        <clear />
-        <add key="nuget.org" value="https://api.nuget.org/v3/index.json" />
-        <!-- Only needed when using pre-release versions of Ryujinx.LibHac. -->
-        <add key="LibHacAlpha" value="https://git.ryujinx.app/api/v4/projects/17/packages/nuget/index.json" />
-        <add key="Ryujinx.UpdateClient" value="https://git.ryujinx.app/api/v4/projects/71/packages/nuget/index.json" />
-    </packageSources>
-    <packageSourceMapping>
-        <!-- key value for <packageSource> should match key values from <packageSources> element -->
-        <!-- These are defined and .NET still yells about multiple package sources with no mappings. Not sure what to do, this is in the docs lol -->
-        <packageSource key="nuget.org">
-            <package pattern="*" />
-        </packageSource>
-        <packageSource key="Ryujinx.UpdateClient">
-            <package pattern="Ryujinx.UpdateClient" />
-            <package pattern="Ryujinx.Systems.Update.Common" />
-        </packageSource>
-        <packageSource key="LibHacAlpha">
-            <package pattern="Ryujinx.LibHac" />
-        </packageSource>
-    </packageSourceMapping>
+  <packageSources>
+    <clear />
+    <add key="nuget.org" value="https://api.nuget.org/v3/index.json" />
+  </packageSources>
 </configuration>
--- a/src/ARMeilleure/ARMeilleure.csproj
+++ b/src/ARMeilleure/ARMeilleure.csproj
@@ -3,10 +3,10 @@
  <PropertyGroup>
    <AllowUnsafeBlocks>true</AllowUnsafeBlocks>
    <DefaultItemExcludes>$(DefaultItemExcludes);._*</DefaultItemExcludes>
-    <GeneratePackageOnBuild>true</GeneratePackageOnBuild>
  </PropertyGroup>

  <ItemGroup>
+    <ProjectReference Include="..\Ryujinx.Common\Ryujinx.Common.csproj" />
    <ProjectReference Include="..\Ryujinx.Memory\Ryujinx.Memory.csproj" />
  </ItemGroup>

--- a/src/ARMeilleure/CodeGen/Arm64/Arm64Optimizer.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/Arm64Optimizer.cs
@@ -254,7 +254,7 @@ namespace ARMeilleure.CodeGen.Arm64

        private static bool IsMemoryLoadOrStore(Instruction inst)
        {
-            return inst is Instruction.Load or Instruction.Store;
+            return inst == Instruction.Load || inst == Instruction.Store;
        }

        private static bool ConstTooLong(Operand constOp, OperandType accessType)
--- a/src/ARMeilleure/CodeGen/Arm64/ArmCondition.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/ArmCondition.cs
@@ -25,9 +25,9 @@ namespace ARMeilleure.CodeGen.Arm64

    static class ComparisonArm64Extensions
    {
-        extension(Comparison comparison)
+        public static ArmCondition ToArmCondition(this Comparison comp)
        {
-            public ArmCondition Arm => comparison switch
+            return comp switch
            {
 #pragma warning disable IDE0055 // Disable formatting
                Comparison.Equal            => ArmCondition.Eq,
@@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.Arm64
                Comparison.LessUI           => ArmCondition.LtUn,
 #pragma warning restore IDE0055

-                _ => throw new ArgumentException(null, nameof(comparison))
+                _ => throw new ArgumentException(null, nameof(comp)),
            };
        }
    }
--- a/src/ARMeilleure/CodeGen/Arm64/Assembler.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/Assembler.cs
@@ -181,10 +181,10 @@ namespace ARMeilleure.CodeGen.Arm64

        public void Fmov(Operand rd, Operand rn, bool topHalf)
        {
-            Debug.Assert(rd.Type.IsInteger != rn.Type.IsInteger);
+            Debug.Assert(rd.Type.IsInteger() != rn.Type.IsInteger());
            Debug.Assert(rd.Type == OperandType.I64 || rn.Type == OperandType.I64 || !topHalf);

-            uint opcode = rd.Type.IsInteger ? 0b110u : 0b111u;
+            uint opcode = rd.Type.IsInteger() ? 0b110u : 0b111u;

            uint rmode = topHalf ? 1u << 19 : 0u;
            uint ftype = rd.Type == OperandType.FP64 || rn.Type == OperandType.FP64 ? 1u << 22 : 0u;
@@ -411,7 +411,7 @@ namespace ARMeilleure.CodeGen.Arm64

        public void Mov(Operand rd, Operand rn)
        {
-            if (rd.Type.IsInteger)
+            if (rd.Type.IsInteger())
            {
                Orr(rd, Factory.Register(ZrRegister, RegisterType.Integer, rd.Type), rn);
            }
@@ -774,7 +774,6 @@ namespace ARMeilleure.CodeGen.Arm64
                    instI |= 1 << 22; // sh flag
                    imm >>= 12;
                }
-
                WriteInstructionAuto(instI | (EncodeUImm12(imm, 0) << 10), rd, rn);
            }
            else
@@ -973,7 +972,7 @@ namespace ARMeilleure.CodeGen.Arm64
            uint instruction;
            int scale;

-            if (type.IsInteger)
+            if (type.IsInteger())
            {
                instruction = intInst;

@@ -1009,7 +1008,7 @@ namespace ARMeilleure.CodeGen.Arm64
        {
            uint instruction;

-            if (type.IsInteger)
+            if (type.IsInteger())
            {
                instruction = intInst;

--- a/src/ARMeilleure/CodeGen/Arm64/CodeGenCommon.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/CodeGenCommon.cs
@@ -52,7 +52,7 @@ namespace ARMeilleure.CodeGen.Arm64
            // Any value AND all ones will be equal itself, so it's effectively a no-op.
            // Any value OR all ones will be equal all ones, so one can just use MOV.
            // Any value XOR all ones will be equal its inverse, so one can just use MVN.
-            if (value is 0 or ulong.MaxValue)
+            if (value == 0 || value == ulong.MaxValue)
            {
                immN = 0;
                immS = 0;
--- a/src/ARMeilleure/CodeGen/Arm64/CodeGenContext.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/CodeGenContext.cs
@@ -1,7 +1,6 @@
 using ARMeilleure.CodeGen.Linking;
 using ARMeilleure.CodeGen.RegisterAllocators;
 using ARMeilleure.IntermediateRepresentation;
-using Microsoft.IO;
 using Ryujinx.Common.Memory;
 using System;
 using System.Collections.Generic;
@@ -15,7 +14,7 @@ namespace ARMeilleure.CodeGen.Arm64
        private const int CbnzInstLength = 4;
        private const int LdrLitInstLength = 4;

-        private readonly RecyclableMemoryStream _stream;
+        private readonly Stream _stream;

        public int StreamOffset => (int)_stream.Length;

--- a/src/ARMeilleure/CodeGen/Arm64/CodeGenerator.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/CodeGenerator.cs
@@ -189,8 +189,8 @@ namespace ARMeilleure.CodeGen.Arm64
                    // The only blocks which can have 0 successors are exit blocks.
                    Operation last = block.Operations.Last;

-                    Debug.Assert(last.Instruction is Instruction.Tailcall or
-                                 Instruction.Return);
+                    Debug.Assert(last.Instruction == Instruction.Tailcall ||
+                                 last.Instruction == Instruction.Return);
                }
                else
                {
@@ -250,7 +250,7 @@ namespace ARMeilleure.CodeGen.Arm64

            // ValidateBinOp(dest, src1, src2);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Add(dest, src1, src2);
            }
@@ -268,7 +268,7 @@ namespace ARMeilleure.CodeGen.Arm64

            ValidateBinOp(dest, src1, src2);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.And(dest, src1, src2);
        }
@@ -281,7 +281,7 @@ namespace ARMeilleure.CodeGen.Arm64

            ValidateBinOp(dest, src1, src2);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Eor(dest, src1, src2);
            }
@@ -298,7 +298,7 @@ namespace ARMeilleure.CodeGen.Arm64

            ValidateUnOp(dest, source);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Mvn(dest, source);
        }
@@ -311,7 +311,7 @@ namespace ARMeilleure.CodeGen.Arm64

            ValidateBinOp(dest, src1, src2);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Orr(dest, src1, src2);
        }
@@ -322,7 +322,7 @@ namespace ARMeilleure.CodeGen.Arm64

            Debug.Assert(comp.Kind == OperandKind.Constant);

-            ArmCondition cond = ((Comparison)comp.AsInt32()).Arm;
+            ArmCondition cond = ((Comparison)comp.AsInt32()).ToArmCondition();

            GenerateCompareCommon(context, operation);

@@ -336,7 +336,7 @@ namespace ARMeilleure.CodeGen.Arm64

            ValidateUnOp(dest, source);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Rev(dest, source);
        }
@@ -354,7 +354,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Debug.Assert(dest.Type == OperandType.I32);
            Debug.Assert(comp.Kind == OperandKind.Constant);

-            ArmCondition cond = ((Comparison)comp.AsInt32()).Arm;
+            ArmCondition cond = ((Comparison)comp.AsInt32()).ToArmCondition();

            GenerateCompareCommon(context, operation);

@@ -428,7 +428,7 @@ namespace ARMeilleure.CodeGen.Arm64

            EnsureSameType(src1, src2);

-            Debug.Assert(src1.Type.IsInteger);
+            Debug.Assert(src1.Type.IsInteger());

            context.Assembler.Cmp(src1, src2);
        }
@@ -442,7 +442,7 @@ namespace ARMeilleure.CodeGen.Arm64

            EnsureSameType(dest, src2, src3);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());
            Debug.Assert(src1.Type == OperandType.I32);

            context.Assembler.Cmp(src1, Const(src1.Type, 0));
@@ -464,11 +464,11 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64);
+            Debug.Assert(dest.Type == OperandType.FP32 || dest.Type == OperandType.FP64);
            Debug.Assert(dest.Type != source.Type);
            Debug.Assert(source.Type != OperandType.V128);

-            if (source.Type.IsInteger)
+            if (source.Type.IsInteger())
            {
                context.Assembler.ScvtfScalar(dest, source);
            }
@@ -483,9 +483,9 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64);
+            Debug.Assert(dest.Type == OperandType.FP32 || dest.Type == OperandType.FP64);
            Debug.Assert(dest.Type != source.Type);
-            Debug.Assert(source.Type.IsInteger);
+            Debug.Assert(source.Type.IsInteger());

            context.Assembler.UcvtfScalar(dest, source);
        }
@@ -497,7 +497,7 @@ namespace ARMeilleure.CodeGen.Arm64

            EnsureSameType(dest, source);

-            Debug.Assert(dest.Type.IsInteger || source.Kind != OperandKind.Constant);
+            Debug.Assert(dest.Type.IsInteger() || source.Kind != OperandKind.Constant);

            // Moves to the same register are useless.
            if (dest.Kind == source.Kind && dest.Value == source.Value)
@@ -529,7 +529,7 @@ namespace ARMeilleure.CodeGen.Arm64

            EnsureSameType(dest, source);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Clz(dest, source);
        }
@@ -542,7 +542,7 @@ namespace ARMeilleure.CodeGen.Arm64

            ValidateBinOp(dest, dividend, divisor);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Sdiv(dest, dividend, divisor);
            }
@@ -576,7 +576,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand value = operation.Destination;
            Operand address = operation.GetSource(0);

-            Debug.Assert(value.Type.IsInteger);
+            Debug.Assert(value.Type.IsInteger());

            context.Assembler.LdrhRiUn(value, address, 0);
        }
@@ -586,7 +586,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand value = operation.Destination;
            Operand address = operation.GetSource(0);

-            Debug.Assert(value.Type.IsInteger);
+            Debug.Assert(value.Type.IsInteger());

            context.Assembler.LdrbRiUn(value, address, 0);
        }
@@ -604,7 +604,7 @@ namespace ARMeilleure.CodeGen.Arm64

            EnsureSameType(dest, src1, src2);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Mul(dest, src1, src2);
            }
@@ -647,7 +647,7 @@ namespace ARMeilleure.CodeGen.Arm64

            ValidateUnOp(dest, source);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Neg(dest, source);
            }
@@ -732,7 +732,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Sxth(dest, source);
        }
@@ -742,7 +742,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Sxtw(dest, source);
        }
@@ -752,7 +752,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Sxtb(dest, source);
        }
@@ -823,7 +823,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand value = operation.GetSource(1);
            Operand address = operation.GetSource(0);

-            Debug.Assert(value.Type.IsInteger);
+            Debug.Assert(value.Type.IsInteger());

            context.Assembler.StrhRiUn(value, address, 0);
        }
@@ -833,7 +833,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand value = operation.GetSource(1);
            Operand address = operation.GetSource(0);

-            Debug.Assert(value.Type.IsInteger);
+            Debug.Assert(value.Type.IsInteger());

            context.Assembler.StrbRiUn(value, address, 0);
        }
@@ -858,7 +858,7 @@ namespace ARMeilleure.CodeGen.Arm64

            // ValidateBinOp(dest, src1, src2);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Sub(dest, src1, src2);
            }
@@ -882,7 +882,7 @@ namespace ARMeilleure.CodeGen.Arm64

            if (dest != default)
            {
-                Debug.Assert(!dest.Type.IsInteger && source.Type.IsInteger);
+                Debug.Assert(!dest.Type.IsInteger() && source.Type.IsInteger());

                OperandType destType = source.Type == OperandType.I64 ? OperandType.FP64 : OperandType.FP32;

@@ -901,9 +901,9 @@ namespace ARMeilleure.CodeGen.Arm64

            byte index = src2.AsByte();

-            Debug.Assert(index < OperandType.V128.ByteSize / dest.Type.ByteSize);
+            Debug.Assert(index < OperandType.V128.GetSizeInBytes() / dest.Type.GetSizeInBytes());

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Umov(dest, src1, index, dest.Type == OperandType.I64 ? 3 : 2);
            }
@@ -959,7 +959,7 @@ namespace ARMeilleure.CodeGen.Arm64

            byte index = src3.AsByte();

-            if (src2.Type.IsInteger)
+            if (src2.Type.IsInteger())
            {
                context.Assembler.Ins(dest, src2, index, src2.Type == OperandType.I64 ? 3 : 2);
            }
@@ -1007,7 +1007,7 @@ namespace ARMeilleure.CodeGen.Arm64
        {
            Operand dest = operation.Destination;

-            Debug.Assert(!dest.Type.IsInteger);
+            Debug.Assert(!dest.Type.IsInteger());

            context.Assembler.CmeqVector(dest, dest, dest, 2);
        }
@@ -1016,7 +1016,7 @@ namespace ARMeilleure.CodeGen.Arm64
        {
            Operand dest = operation.Destination;

-            Debug.Assert(!dest.Type.IsInteger);
+            Debug.Assert(!dest.Type.IsInteger());

            context.Assembler.EorVector(dest, dest, dest);
        }
@@ -1046,7 +1046,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Uxth(dest, source);
        }
@@ -1056,7 +1056,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            // We can eliminate the move if source is already 32-bit and the registers are the same.
            if (dest.Value == source.Value && source.Type == OperandType.I32)
@@ -1072,7 +1072,7 @@ namespace ARMeilleure.CodeGen.Arm64
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Uxtb(dest, source);
        }
@@ -1169,7 +1169,7 @@ namespace ARMeilleure.CodeGen.Arm64
                    context.Assembler.StrRiPre(Register(reg, type), Register(SpRegister), -calleeSaveRegionSize);
                }

-                offset += type.ByteSize;
+                offset += type.GetSizeInBytes();
            }

            while (mask != 0)
@@ -1195,7 +1195,7 @@ namespace ARMeilleure.CodeGen.Arm64
                    context.Assembler.StpRiPre(Register(reg, type), Register(reg2, type), Register(SpRegister), -calleeSaveRegionSize);
                }

-                offset += type.ByteSize * 2;
+                offset += type.GetSizeInBytes() * 2;
            }
        }

@@ -1273,7 +1273,7 @@ namespace ARMeilleure.CodeGen.Arm64

                    mask &= ~(1 << reg2);

-                    offset -= type.ByteSize * 2;
+                    offset -= type.GetSizeInBytes() * 2;

                    if (offset != 0)
                    {
@@ -1286,7 +1286,7 @@ namespace ARMeilleure.CodeGen.Arm64
                }
                else
                {
-                    offset -= type.ByteSize;
+                    offset -= type.GetSizeInBytes();

                    if (offset != 0)
                    {
@@ -1435,12 +1435,12 @@ namespace ARMeilleure.CodeGen.Arm64

            OperandType valueType = GetMemOpValueType(currentOp);

-            if (valueType != GetMemOpValueType(nextOp) || op1Offset + valueType.ByteSize != op2Offset)
+            if (valueType != GetMemOpValueType(nextOp) || op1Offset + valueType.GetSizeInBytes() != op2Offset)
            {
                return false;
            }

-            if (!CodeGenCommon.ConstFitsOnSImm7(op1Offset, valueType.ByteSizeLog2))
+            if (!CodeGenCommon.ConstFitsOnSImm7(op1Offset, valueType.GetSizeInBytesLog2()))
            {
                return false;
            }
@@ -1463,7 +1463,7 @@ namespace ARMeilleure.CodeGen.Arm64

        private static bool IsLoadOrStore(Operation operation)
        {
-            return operation.Instruction is Instruction.Load or Instruction.Store;
+            return operation.Instruction == Instruction.Load || operation.Instruction == Instruction.Store;
        }

        private static OperandType GetMemOpValueType(Operation operation)
@@ -1499,7 +1499,6 @@ namespace ARMeilleure.CodeGen.Arm64
                    return false;
                }
            }
-
            if (memOp.Index != default)
            {
                return false;
@@ -1549,12 +1548,12 @@ namespace ARMeilleure.CodeGen.Arm64
            // EnsureSameReg (dest, src1);
            EnsureSameType(dest, src1);

-            Debug.Assert(dest.Type.IsInteger && src2.Type == OperandType.I32);
+            Debug.Assert(dest.Type.IsInteger() && src2.Type == OperandType.I32);
        }

        private static void EnsureSameReg(Operand op1, Operand op2)
        {
-            Debug.Assert(op1.Kind is OperandKind.Register or OperandKind.Memory);
+            Debug.Assert(op1.Kind == OperandKind.Register || op1.Kind == OperandKind.Memory);
            Debug.Assert(op1.Kind == op2.Kind);
            Debug.Assert(op1.Value == op2.Value);
        }
--- a/src/ARMeilleure/CodeGen/Arm64/CodeGeneratorIntrinsic.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/CodeGeneratorIntrinsic.cs
@@ -462,7 +462,7 @@ namespace ARMeilleure.CodeGen.Arm64
        {
            instruction |= (sz << 22);

-            if (rd.Type.IsInteger)
+            if (rd.Type.IsInteger())
            {
                context.Assembler.WriteInstructionAuto(instruction, rd, rn);
            }
@@ -490,7 +490,7 @@ namespace ARMeilleure.CodeGen.Arm64
            instruction |= (sz << 22);
            instruction |= (64 - fBits) << 10;

-            if (rd.Type.IsInteger)
+            if (rd.Type.IsInteger())
            {
                Debug.Assert(rd.Type != OperandType.I32 || fBits <= 32);

@@ -509,6 +509,7 @@ namespace ARMeilleure.CodeGen.Arm64

                context.Assembler.WriteInstruction(instruction, rd, rn);
            }
+
        }

        private static void GenerateScalarTernary(
--- a/src/ARMeilleure/CodeGen/Arm64/HardwareCapabilities.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/HardwareCapabilities.cs
@@ -137,7 +137,6 @@ namespace ARMeilleure.CodeGen.Arm64
            {
                return val != 0;
            }
-
            return false;
        }

--- a/src/ARMeilleure/CodeGen/Arm64/PreAllocator.cs
+++ b/src/ARMeilleure/CodeGen/Arm64/PreAllocator.cs
@@ -112,7 +112,7 @@ namespace ARMeilleure.CodeGen.Arm64

            if (src1.Kind == OperandKind.Constant)
            {
-                if (!src1.Type.IsInteger)
+                if (!src1.Type.IsInteger())
                {
                    // Handle non-integer types (FP32, FP64 and V128).
                    // For instructions without an immediate operand, we do the following:
@@ -161,7 +161,7 @@ namespace ARMeilleure.CodeGen.Arm64

            if (src2.Kind == OperandKind.Constant)
            {
-                if (!src2.Type.IsInteger)
+                if (!src2.Type.IsInteger())
                {
                    src2 = AddFloatConstantCopy(constants, nodes, node, src2);

@@ -191,7 +191,7 @@ namespace ARMeilleure.CodeGen.Arm64

                if (src.Kind == OperandKind.Constant)
                {
-                    if (!src.Type.IsInteger)
+                    if (!src.Type.IsInteger())
                    {
                        src = AddFloatConstantCopy(constants, nodes, node, src);

@@ -282,7 +282,7 @@ namespace ARMeilleure.CodeGen.Arm64

                bool passOnReg;

-                if (source.Type.IsInteger)
+                if (source.Type.IsInteger())
                {
                    passOnReg = intCount < intMax;
                }
@@ -309,7 +309,7 @@ namespace ARMeilleure.CodeGen.Arm64

                if (passOnReg)
                {
-                    Operand argReg = source.Type.IsInteger
+                    Operand argReg = source.Type.IsInteger()
                        ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
                        : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);

@@ -327,7 +327,7 @@ namespace ARMeilleure.CodeGen.Arm64

                    InsertConstantRegCopies(constants, nodes, nodes.AddBefore(node, spillOp));

-                    stackOffset += source.Type.ByteSize;
+                    stackOffset += source.Type.GetSizeInBytes();
                }
            }

@@ -345,7 +345,7 @@ namespace ARMeilleure.CodeGen.Arm64
                }
                else
                {
-                    Operand retReg = dest.Type.IsInteger
+                    Operand retReg = dest.Type.IsInteger()
                        ? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type)
                        : Xmm(CallingConvention.GetVecReturnRegister(), dest.Type);

@@ -385,7 +385,7 @@ namespace ARMeilleure.CodeGen.Arm64

                bool passOnReg;

-                if (source.Type.IsInteger)
+                if (source.Type.IsInteger())
                {
                    passOnReg = intCount + 1 < intMax;
                }
@@ -408,7 +408,7 @@ namespace ARMeilleure.CodeGen.Arm64

                if (passOnReg)
                {
-                    Operand argReg = source.Type.IsInteger
+                    Operand argReg = source.Type.IsInteger()
                        ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
                        : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);

@@ -521,7 +521,7 @@ namespace ARMeilleure.CodeGen.Arm64
            }
            else
            {
-                Operand retReg = source.Type.IsInteger
+                Operand retReg = source.Type.IsInteger()
                    ? Gpr(CallingConvention.GetIntReturnRegister(), source.Type)
                    : Xmm(CallingConvention.GetVecReturnRegister(), source.Type);

@@ -551,7 +551,7 @@ namespace ARMeilleure.CodeGen.Arm64
            {
                OperandType argType = cctx.FuncArgTypes[cIndex];

-                if (argType.IsInteger)
+                if (argType.IsInteger())
                {
                    intCount++;
                }
@@ -567,7 +567,7 @@ namespace ARMeilleure.CodeGen.Arm64

            bool passOnReg;

-            if (source.Type.IsInteger)
+            if (source.Type.IsInteger())
            {
                passOnReg = intCount < CallingConvention.GetArgumentsOnRegsCount();
            }
@@ -606,7 +606,7 @@ namespace ARMeilleure.CodeGen.Arm64
                    {
                        Operand pArg = Local(dest.Type);

-                        Operand argReg = dest.Type.IsInteger
+                        Operand argReg = dest.Type.IsInteger()
                            ? Gpr(CallingConvention.GetIntArgumentRegister(intCount), dest.Type)
                            : Xmm(CallingConvention.GetVecArgumentRegister(vecCount), dest.Type);

@@ -736,19 +736,19 @@ namespace ARMeilleure.CodeGen.Arm64
        {
            IntrinsicInfo info = IntrinsicTable.GetInfo(intrinsic & ~(Intrinsic.Arm64VTypeMask | Intrinsic.Arm64VSizeMask));

-            return info.Type is IntrinsicType.ScalarBinaryRd or
-                   IntrinsicType.ScalarTernaryFPRdByElem or
-                   IntrinsicType.ScalarTernaryShlRd or
-                   IntrinsicType.ScalarTernaryShrRd or
-                   IntrinsicType.Vector128BinaryRd or
-                   IntrinsicType.VectorBinaryRd or
-                   IntrinsicType.VectorInsertByElem or
-                   IntrinsicType.VectorTernaryRd or
-                   IntrinsicType.VectorTernaryRdBitwise or
-                   IntrinsicType.VectorTernaryFPRdByElem or
-                   IntrinsicType.VectorTernaryRdByElem or
-                   IntrinsicType.VectorTernaryShlRd or
-                   IntrinsicType.VectorTernaryShrRd;
+            return info.Type == IntrinsicType.ScalarBinaryRd ||
+                   info.Type == IntrinsicType.ScalarTernaryFPRdByElem ||
+                   info.Type == IntrinsicType.ScalarTernaryShlRd ||
+                   info.Type == IntrinsicType.ScalarTernaryShrRd ||
+                   info.Type == IntrinsicType.Vector128BinaryRd ||
+                   info.Type == IntrinsicType.VectorBinaryRd ||
+                   info.Type == IntrinsicType.VectorInsertByElem ||
+                   info.Type == IntrinsicType.VectorTernaryRd ||
+                   info.Type == IntrinsicType.VectorTernaryRdBitwise ||
+                   info.Type == IntrinsicType.VectorTernaryFPRdByElem ||
+                   info.Type == IntrinsicType.VectorTernaryRdByElem ||
+                   info.Type == IntrinsicType.VectorTernaryShlRd ||
+                   info.Type == IntrinsicType.VectorTernaryShrRd;
        }

        private static bool HasConstSrc1(Operation node, ulong value)
@@ -849,7 +849,7 @@ namespace ARMeilleure.CodeGen.Arm64

                        Comparison compType = (Comparison)comp.AsInt32();

-                        return compType is Comparison.Equal or Comparison.NotEqual;
+                        return compType == Comparison.Equal || compType == Comparison.NotEqual;
                    }
            }

@@ -871,9 +871,9 @@ namespace ARMeilleure.CodeGen.Arm64
                IntrinsicInfo info = IntrinsicTable.GetInfo(intrinsic & ~(Intrinsic.Arm64VTypeMask | Intrinsic.Arm64VSizeMask));

                // Those have integer inputs that don't support consts.
-                return info.Type is not IntrinsicType.ScalarFPConvGpr and
-                       not IntrinsicType.ScalarFPConvFixedGpr and
-                       not IntrinsicType.SetRegister;
+                return info.Type != IntrinsicType.ScalarFPConvGpr &&
+                       info.Type != IntrinsicType.ScalarFPConvFixedGpr &&
+                       info.Type != IntrinsicType.SetRegister;
            }

            return false;
--- a/src/ARMeilleure/CodeGen/Optimizations/BlockPlacement.cs
+++ b/src/ARMeilleure/CodeGen/Optimizations/BlockPlacement.cs
@@ -51,7 +51,7 @@ namespace ARMeilleure.CodeGen.Optimizations
                    if (trueSucc == block.ListNext)
                    {
                        Comparison comp = (Comparison)branchOp.GetSource(2).AsInt32();
-                        Comparison compInv = comp.Inverse;
+                        Comparison compInv = comp.Invert();

                        branchOp.SetSource(2, Const((int)compInv));

--- a/src/ARMeilleure/CodeGen/Optimizations/ConstantFolding.cs
+++ b/src/ARMeilleure/CodeGen/Optimizations/ConstantFolding.cs
@@ -37,7 +37,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => x + y);
                    }
-
                    break;

                case Instruction.BitwiseAnd:
@@ -49,7 +48,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => x & y);
                    }
-
                    break;

                case Instruction.BitwiseExclusiveOr:
@@ -61,7 +59,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => x ^ y);
                    }
-
                    break;

                case Instruction.BitwiseNot:
@@ -73,7 +70,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => ~x);
                    }
-
                    break;

                case Instruction.BitwiseOr:
@@ -85,7 +81,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => x | y);
                    }
-
                    break;

                case Instruction.ConvertI64ToI32:
@@ -93,7 +88,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI32(operation, (x) => x);
                    }
-
                    break;

                case Instruction.Compare:
@@ -135,7 +129,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                                break;
                        }
                    }
-
                    break;

                case Instruction.Copy:
@@ -147,7 +140,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => x);
                    }
-
                    break;

                case Instruction.Divide:
@@ -159,7 +151,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => y != 0 ? x / y : 0);
                    }
-
                    break;

                case Instruction.DivideUI:
@@ -171,7 +162,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => y != 0 ? (long)((ulong)x / (ulong)y) : 0);
                    }
-
                    break;

                case Instruction.Multiply:
@@ -183,7 +173,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => x * y);
                    }
-
                    break;

                case Instruction.Negate:
@@ -195,7 +184,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => -x);
                    }
-
                    break;

                case Instruction.ShiftLeft:
@@ -207,7 +195,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => x << (int)y);
                    }
-
                    break;

                case Instruction.ShiftRightSI:
@@ -219,7 +206,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => x >> (int)y);
                    }
-
                    break;

                case Instruction.ShiftRightUI:
@@ -231,7 +217,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => (long)((ulong)x >> (int)y));
                    }
-
                    break;

                case Instruction.SignExtend16:
@@ -243,7 +228,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => (short)x);
                    }
-
                    break;

                case Instruction.SignExtend32:
@@ -255,7 +239,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => (int)x);
                    }
-
                    break;

                case Instruction.SignExtend8:
@@ -267,7 +250,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => (sbyte)x);
                    }
-
                    break;

                case Instruction.ZeroExtend16:
@@ -279,7 +261,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => (ushort)x);
                    }
-
                    break;

                case Instruction.ZeroExtend32:
@@ -291,7 +272,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => (uint)x);
                    }
-
                    break;

                case Instruction.ZeroExtend8:
@@ -303,7 +283,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateUnaryI64(operation, (x) => (byte)x);
                    }
-
                    break;

                case Instruction.Subtract:
@@ -315,7 +294,6 @@ namespace ARMeilleure.CodeGen.Optimizations
                    {
                        EvaluateBinaryI64(operation, (x, y) => x - y);
                    }
-
                    break;
            }
        }
--- a/src/ARMeilleure/CodeGen/Optimizations/Optimizer.cs
+++ b/src/ARMeilleure/CodeGen/Optimizations/Optimizer.cs
@@ -161,7 +161,7 @@ namespace ARMeilleure.CodeGen.Optimizations
                    }
                    else if (otherCompType == Comparison.Equal)
                    {
-                        propCompType = compType.Inverse;
+                        propCompType = compType.Invert();
                    }
                    else
                    {
@@ -227,11 +227,11 @@ namespace ARMeilleure.CodeGen.Optimizations

        private static bool HasSideEffects(Operation node)
        {
-            return node.Instruction is Instruction.Call
-                or Instruction.Tailcall
-                or Instruction.CompareAndSwap
-                or Instruction.CompareAndSwap16
-                or Instruction.CompareAndSwap8;
+            return node.Instruction == Instruction.Call
+                || node.Instruction == Instruction.Tailcall
+                || node.Instruction == Instruction.CompareAndSwap
+                || node.Instruction == Instruction.CompareAndSwap16
+                || node.Instruction == Instruction.CompareAndSwap8;
        }

        private static bool IsPropagableCompare(Operation operation)
--- a/src/ARMeilleure/CodeGen/Optimizations/Simplification.cs
+++ b/src/ARMeilleure/CodeGen/Optimizations/Simplification.cs
@@ -105,7 +105,7 @@ namespace ARMeilleure.CodeGen.Optimizations
            Operand x = operation.GetSource(0);
            Operand y = operation.GetSource(1);

-            if (x == y && x.Type.IsInteger)
+            if (x == y && x.Type.IsInteger())
            {
                operation.TurnIntoCopy(Const(x.Type, 0));
            }
@@ -161,7 +161,7 @@ namespace ARMeilleure.CodeGen.Optimizations

        private static bool IsConstEqual(Operand operand, ulong comparand)
        {
-            if (operand.Kind != OperandKind.Constant || !operand.Type.IsInteger)
+            if (operand.Kind != OperandKind.Constant || !operand.Type.IsInteger())
            {
                return false;
            }
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs
@@ -98,7 +98,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                    {
                        OperandType type = types[copyDest];

-                        type = type.IsInteger ? OperandType.I64 : OperandType.V128;
+                        type = type.IsInteger() ? OperandType.I64 : OperandType.V128;

                        EmitXorSwap(sequence, GetRegister(copyDest, type), GetRegister(copySource, type));

--- a/src/ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs
@@ -178,7 +178,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                        }
                        else if (dest.Kind == OperandKind.Register)
                        {
-                            if (dest.Type.IsInteger)
+                            if (dest.Type.IsInteger())
                            {
                                intFixedRegisters |= 1 << dest.GetRegister().Index;
                            }
@@ -236,7 +236,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                            {
                                Register reg = info.Register.GetRegister();

-                                if (local.Type.IsInteger)
+                                if (local.Type.IsInteger())
                                {
                                    intLocalFreeRegisters |= 1 << reg.Index;
                                }
@@ -254,7 +254,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators

                            if (temp == default || info.Sequence != sequence)
                            {
-                                temp = local.Type.IsInteger
+                                temp = local.Type.IsInteger()
                                    ? GetSpillTemp(local, intSpillTempRegisters, ref intLocalUse)
                                    : GetSpillTemp(local, vecSpillTempRegisters, ref vecLocalUse);

@@ -335,7 +335,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators

                        if (info.UsesAllocated == 0)
                        {
-                            int mask = dest.Type.IsInteger
+                            int mask = dest.Type.IsInteger()
                                ? intLocalFreeRegisters
                                : vecLocalFreeRegisters;

@@ -343,9 +343,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                            {
                                int selectedReg = BitOperations.TrailingZeroCount(mask);

-                                info.Register = Register(selectedReg, info.Type.Register, info.Type);
+                                info.Register = Register(selectedReg, info.Type.ToRegisterType(), info.Type);

-                                if (dest.Type.IsInteger)
+                                if (dest.Type.IsInteger())
                                {
                                    intLocalFreeRegisters &= ~(1 << selectedReg);
                                    intUsedRegisters |= 1 << selectedReg;
@@ -359,7 +359,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                            else
                            {
                                info.Register = default;
-                                info.SpillOffset = Const(stackAlloc.Allocate(dest.Type.ByteSize));
+                                info.SpillOffset = Const(stackAlloc.Allocate(dest.Type.GetSizeInBytes()));
                            }
                        }

@@ -377,7 +377,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators

                            if (temp == default || info.Sequence != sequence)
                            {
-                                temp = dest.Type.IsInteger
+                                temp = dest.Type.IsInteger()
                                    ? GetSpillTemp(dest, intSpillTempRegisters, ref intLocalAsg)
                                    : GetSpillTemp(dest, vecSpillTempRegisters, ref vecLocalAsg);

@@ -443,7 +443,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators

            useMask |= 1 << selectedReg;

-            return Register(selectedReg, local.Type.Register, local.Type);
+            return Register(selectedReg, local.Type.ToRegisterType(), local.Type);
        }

        private static int UsesCount(Operand local)
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs
@@ -208,7 +208,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators

        private bool TryAllocateRegWithoutSpill(AllocationContext context, LiveInterval current, int cIndex, int registersCount)
        {
-            RegisterType regType = current.Local.Type.Register;
+            RegisterType regType = current.Local.Type.ToRegisterType();

            Span<int> freePositions = stackalloc int[registersCount];

@@ -318,7 +318,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators

        private void AllocateRegWithSpill(AllocationContext context, LiveInterval current, int cIndex, int registersCount)
        {
-            RegisterType regType = current.Local.Type.Register;
+            RegisterType regType = current.Local.Type.ToRegisterType();

            Span<int> usePositions = stackalloc int[registersCount];
            Span<int> blockedPositions = stackalloc int[registersCount];
@@ -847,7 +847,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                            // If this is a copy (or copy-like operation), set the copy source interval as well.
                            // This is used for register preferencing later on, which allows the copy to be eliminated
                            // in some cases.
-                            if (node.Instruction is Instruction.Copy or Instruction.ZeroExtend32)
+                            if (node.Instruction == Instruction.Copy || node.Instruction == Instruction.ZeroExtend32)
                            {
                                Operand source = node.GetSource(0);

@@ -1120,8 +1120,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators

        private static bool IsLocalOrRegister(OperandKind kind)
        {
-            return kind is OperandKind.LocalVariable or
-                   OperandKind.Register;
+            return kind == OperandKind.LocalVariable ||
+                   kind == OperandKind.Register;
        }
    }
 }
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/StackAllocator.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/StackAllocator.cs
@@ -10,7 +10,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators

        public int Allocate(OperandType type)
        {
-            return Allocate(type.ByteSize);
+            return Allocate(type.GetSizeInBytes());
        }

        public int Allocate(int sizeInBytes)
--- a/src/ARMeilleure/CodeGen/X86/Assembler.cs
+++ b/src/ARMeilleure/CodeGen/X86/Assembler.cs
@@ -385,7 +385,7 @@ namespace ARMeilleure.CodeGen.X86
        {
            ref readonly InstructionInfo info = ref _instTable[(int)X86Instruction.Movd];

-            if (source.Type.IsInteger || source.Kind == OperandKind.Memory)
+            if (source.Type.IsInteger() || source.Kind == OperandKind.Memory)
            {
                WriteOpCode(dest, default, source, OperandType.None, info.Flags, info.OpRRM, rrm: true);
            }
@@ -416,11 +416,11 @@ namespace ARMeilleure.CodeGen.X86

            InstructionFlags flags = info.Flags | InstructionFlags.RexW;

-            if (source.Type.IsInteger || source.Kind == OperandKind.Memory)
+            if (source.Type.IsInteger() || source.Kind == OperandKind.Memory)
            {
                WriteOpCode(dest, default, source, OperandType.None, flags, info.OpRRM, rrm: true);
            }
-            else if (dest.Type.IsInteger || dest.Kind == OperandKind.Memory)
+            else if (dest.Type.IsInteger() || dest.Kind == OperandKind.Memory)
            {
                WriteOpCode(dest, default, source, OperandType.None, flags, info.OpRMR);
            }
@@ -1107,17 +1107,17 @@ namespace ARMeilleure.CodeGen.X86
            }
            else
            {
-                if ((flags & InstructionFlags.Prefix66) != 0)
+                if (flags.HasFlag(InstructionFlags.Prefix66))
                {
                    WriteByte(0x66);
                }

-                if ((flags & InstructionFlags.PrefixF2) != 0f)
+                if (flags.HasFlag(InstructionFlags.PrefixF2))
                {
                    WriteByte(0xf2);
                }

-                if ((flags & InstructionFlags.PrefixF3) != 0f)
+                if (flags.HasFlag(InstructionFlags.PrefixF3))
                {
                    WriteByte(0xf3);
                }
@@ -1478,7 +1478,7 @@ namespace ARMeilleure.CodeGen.X86

        private static bool Is64Bits(OperandType type)
        {
-            return type is OperandType.I64 or OperandType.FP64;
+            return type == OperandType.I64 || type == OperandType.FP64;
        }

        private static bool IsImm8(ulong immediate, OperandType type)
--- a/src/ARMeilleure/CodeGen/X86/AssemblerTable.cs
+++ b/src/ARMeilleure/CodeGen/X86/AssemblerTable.cs
@@ -1,4 +1,5 @@
 using System;
+using System.Diagnostics.CodeAnalysis;

 namespace ARMeilleure.CodeGen.X86
 {
@@ -12,6 +13,7 @@ namespace ARMeilleure.CodeGen.X86
        private const int BadOp = 0;

        [Flags]
+        [SuppressMessage("Design", "CA1069: Enums values should not be duplicated")]
        private enum InstructionFlags
        {
            None = 0,
--- a/src/ARMeilleure/CodeGen/X86/CodeGenContext.cs
+++ b/src/ARMeilleure/CodeGen/X86/CodeGenContext.cs
@@ -1,14 +1,14 @@
 using ARMeilleure.CodeGen.RegisterAllocators;
 using ARMeilleure.IntermediateRepresentation;
-using Microsoft.IO;
 using Ryujinx.Common.Memory;
+using System.IO;
 using System.Numerics;

 namespace ARMeilleure.CodeGen.X86
 {
    class CodeGenContext
    {
-        private readonly RecyclableMemoryStream _stream;
+        private readonly Stream _stream;
        private readonly Operand[] _blockLabels;

        public int StreamOffset => (int)_stream.Length;
--- a/src/ARMeilleure/CodeGen/X86/CodeGenerator.cs
+++ b/src/ARMeilleure/CodeGen/X86/CodeGenerator.cs
@@ -175,8 +175,8 @@ namespace ARMeilleure.CodeGen.X86
                    // The only blocks which can have 0 successors are exit blocks.
                    Operation last = block.Operations.Last;

-                    Debug.Assert(last.Instruction is Instruction.Tailcall or
-                                 Instruction.Return);
+                    Debug.Assert(last.Instruction == Instruction.Tailcall ||
+                                 last.Instruction == Instruction.Return);
                }
                else
                {
@@ -289,7 +289,7 @@ namespace ARMeilleure.CodeGen.X86

                            EnsureSameType(dest, source);

-                            Debug.Assert(dest.Type.IsInteger);
+                            Debug.Assert(dest.Type.IsInteger());

                            context.Assembler.Popcnt(dest, source, dest.Type);

@@ -303,7 +303,7 @@ namespace ARMeilleure.CodeGen.X86

                            EnsureSameType(dest, source);

-                            Debug.Assert(!dest.Type.IsInteger);
+                            Debug.Assert(!dest.Type.IsInteger());

                            context.Assembler.WriteInstruction(info.Inst, dest, source);

@@ -315,7 +315,7 @@ namespace ARMeilleure.CodeGen.X86
                            Operand dest = operation.Destination;
                            Operand source = operation.GetSource(0);

-                            Debug.Assert(dest.Type.IsInteger && !source.Type.IsInteger);
+                            Debug.Assert(dest.Type.IsInteger() && !source.Type.IsInteger());

                            if (operation.Intrinsic == Intrinsic.X86Cvtsi2si)
                            {
@@ -349,8 +349,8 @@ namespace ARMeilleure.CodeGen.X86
                                EnsureSameReg(dest, src1);
                            }

-                            Debug.Assert(!dest.Type.IsInteger);
-                            Debug.Assert(!src2.Type.IsInteger || src2.Kind == OperandKind.Constant);
+                            Debug.Assert(!dest.Type.IsInteger());
+                            Debug.Assert(!src2.Type.IsInteger() || src2.Kind == OperandKind.Constant);

                            context.Assembler.WriteInstruction(info.Inst, dest, src1, src2);

@@ -370,7 +370,7 @@ namespace ARMeilleure.CodeGen.X86
                                EnsureSameReg(dest, src1);
                            }

-                            Debug.Assert(!dest.Type.IsInteger && src2.Type.IsInteger);
+                            Debug.Assert(!dest.Type.IsInteger() && src2.Type.IsInteger());

                            context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src2.Type);

@@ -385,7 +385,7 @@ namespace ARMeilleure.CodeGen.X86

                            EnsureSameReg(dest, src1);

-                            Debug.Assert(dest.Type.IsInteger && src1.Type.IsInteger && src2.Type.IsInteger);
+                            Debug.Assert(dest.Type.IsInteger() && src1.Type.IsInteger() && src2.Type.IsInteger());

                            context.Assembler.WriteInstruction(info.Inst, dest, src2, dest.Type);

@@ -405,7 +405,7 @@ namespace ARMeilleure.CodeGen.X86
                                EnsureSameReg(dest, src1);
                            }

-                            Debug.Assert(!dest.Type.IsInteger && src2.Kind == OperandKind.Constant);
+                            Debug.Assert(!dest.Type.IsInteger() && src2.Kind == OperandKind.Constant);

                            context.Assembler.WriteInstruction(info.Inst, dest, src1, src2.AsByte());

@@ -421,7 +421,7 @@ namespace ARMeilleure.CodeGen.X86

                            EnsureSameType(dest, src1, src2, src3);

-                            Debug.Assert(!dest.Type.IsInteger);
+                            Debug.Assert(!dest.Type.IsInteger());

                            if (info.Inst == X86Instruction.Blendvpd && HardwareCapabilities.SupportsVexEncoding)
                            {
@@ -461,7 +461,7 @@ namespace ARMeilleure.CodeGen.X86
                                EnsureSameReg(dest, src1);
                            }

-                            Debug.Assert(!dest.Type.IsInteger && src3.Kind == OperandKind.Constant);
+                            Debug.Assert(!dest.Type.IsInteger() && src3.Kind == OperandKind.Constant);

                            context.Assembler.WriteInstruction(info.Inst, dest, src1, src2, src3.AsByte());

@@ -478,7 +478,7 @@ namespace ARMeilleure.CodeGen.X86
                            Debug.Assert(HardwareCapabilities.SupportsVexEncoding);

                            Debug.Assert(dest.Kind == OperandKind.Register && src1.Kind == OperandKind.Register && src2.Kind == OperandKind.Register);
-                            Debug.Assert(src3.Kind is OperandKind.Register or OperandKind.Memory);
+                            Debug.Assert(src3.Kind == OperandKind.Register || src3.Kind == OperandKind.Memory);

                            EnsureSameType(dest, src1, src2, src3);
                            Debug.Assert(dest.Type == OperandType.V128);
@@ -512,7 +512,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand src1 = operation.GetSource(0);
            Operand src2 = operation.GetSource(1);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                // If Destination and Source 1 Operands are the same, perform a standard add as there are no benefits to using LEA.
                if (dest.Kind == src1.Kind && dest.Value == src1.Value)
@@ -567,7 +567,7 @@ namespace ARMeilleure.CodeGen.X86

            ValidateBinOp(dest, src1, src2);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            // Note: GenerateCompareCommon makes the assumption that BitwiseAnd will emit only a single `and`
            // instruction.
@@ -582,7 +582,7 @@ namespace ARMeilleure.CodeGen.X86

            ValidateBinOp(dest, src1, src2);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Xor(dest, src2, dest.Type);
            }
@@ -599,7 +599,7 @@ namespace ARMeilleure.CodeGen.X86

            ValidateUnOp(dest, source);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Not(dest);
        }
@@ -612,7 +612,7 @@ namespace ARMeilleure.CodeGen.X86

            ValidateBinOp(dest, src1, src2);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Or(dest, src2, dest.Type);
        }
@@ -623,7 +623,7 @@ namespace ARMeilleure.CodeGen.X86

            Debug.Assert(comp.Kind == OperandKind.Constant);

-            X86Condition cond = ((Comparison)comp.AsInt32()).X86;
+            X86Condition cond = ((Comparison)comp.AsInt32()).ToX86Condition();

            GenerateCompareCommon(context, operation);

@@ -637,7 +637,7 @@ namespace ARMeilleure.CodeGen.X86

            ValidateUnOp(dest, source);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Bswap(dest);
        }
@@ -661,7 +661,7 @@ namespace ARMeilleure.CodeGen.X86
            Debug.Assert(dest.Type == OperandType.I32);
            Debug.Assert(comp.Kind == OperandKind.Constant);

-            X86Condition cond = ((Comparison)comp.AsInt32()).X86;
+            X86Condition cond = ((Comparison)comp.AsInt32()).ToX86Condition();

            GenerateCompareCommon(context, operation);

@@ -676,7 +676,7 @@ namespace ARMeilleure.CodeGen.X86

            EnsureSameType(src1, src2);

-            Debug.Assert(src1.Type.IsInteger);
+            Debug.Assert(src1.Type.IsInteger());

            if (src2.Kind == OperandKind.Constant && src2.Value == 0)
            {
@@ -766,7 +766,7 @@ namespace ARMeilleure.CodeGen.X86
            EnsureSameReg(dest, src3);
            EnsureSameType(dest, src2, src3);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());
            Debug.Assert(src1.Type == OperandType.I32);

            context.Assembler.Test(src1, src1, src1.Type);
@@ -788,13 +788,13 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64);
+            Debug.Assert(dest.Type == OperandType.FP32 || dest.Type == OperandType.FP64);

            if (dest.Type == OperandType.FP32)
            {
-                Debug.Assert(source.Type.IsInteger || source.Type == OperandType.FP64);
+                Debug.Assert(source.Type.IsInteger() || source.Type == OperandType.FP64);

-                if (source.Type.IsInteger)
+                if (source.Type.IsInteger())
                {
                    context.Assembler.Xorps(dest, dest, dest);
                    context.Assembler.Cvtsi2ss(dest, dest, source, source.Type);
@@ -808,9 +808,9 @@ namespace ARMeilleure.CodeGen.X86
            }
            else /* if (dest.Type == OperandType.FP64) */
            {
-                Debug.Assert(source.Type.IsInteger || source.Type == OperandType.FP32);
+                Debug.Assert(source.Type.IsInteger() || source.Type == OperandType.FP32);

-                if (source.Type.IsInteger)
+                if (source.Type.IsInteger())
                {
                    context.Assembler.Xorps(dest, dest, dest);
                    context.Assembler.Cvtsi2sd(dest, dest, source, source.Type);
@@ -831,7 +831,7 @@ namespace ARMeilleure.CodeGen.X86

            EnsureSameType(dest, source);

-            Debug.Assert(dest.Type.IsInteger || source.Kind != OperandKind.Constant);
+            Debug.Assert(dest.Type.IsInteger() || source.Kind != OperandKind.Constant);

            // Moves to the same register are useless.
            if (dest.Kind == source.Kind && dest.Value == source.Value)
@@ -845,7 +845,7 @@ namespace ARMeilleure.CodeGen.X86
                // Assemble "mov reg, 0" as "xor reg, reg" as the later is more efficient.
                context.Assembler.Xor(dest, dest, OperandType.I32);
            }
-            else if (dest.Type.IsInteger)
+            else if (dest.Type.IsInteger())
            {
                context.Assembler.Mov(dest, source, dest.Type);
            }
@@ -862,7 +862,7 @@ namespace ARMeilleure.CodeGen.X86

            EnsureSameType(dest, source);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Bsr(dest, source, dest.Type);

@@ -894,12 +894,12 @@ namespace ARMeilleure.CodeGen.X86
            Operand dividend = operation.GetSource(0);
            Operand divisor = operation.GetSource(1);

-            if (!dest.Type.IsInteger)
+            if (!dest.Type.IsInteger())
            {
                ValidateBinOp(dest, dividend, divisor);
            }

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                divisor = operation.GetSource(2);

@@ -932,7 +932,7 @@ namespace ARMeilleure.CodeGen.X86

            Operand rdx = Register(X86Register.Rdx);

-            Debug.Assert(divisor.Type.IsInteger);
+            Debug.Assert(divisor.Type.IsInteger());

            context.Assembler.Xor(rdx, rdx, OperandType.I32);
            context.Assembler.Div(divisor);
@@ -967,7 +967,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand value = operation.Destination;
            Operand address = Memory(operation.GetSource(0), value.Type);

-            Debug.Assert(value.Type.IsInteger);
+            Debug.Assert(value.Type.IsInteger());

            context.Assembler.Movzx16(value, address, value.Type);
        }
@@ -977,7 +977,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand value = operation.Destination;
            Operand address = Memory(operation.GetSource(0), value.Type);

-            Debug.Assert(value.Type.IsInteger);
+            Debug.Assert(value.Type.IsInteger());

            context.Assembler.Movzx8(value, address, value.Type);
        }
@@ -1000,7 +1000,7 @@ namespace ARMeilleure.CodeGen.X86

            EnsureSameType(dest, src1, src2);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                if (src2.Kind == OperandKind.Constant)
                {
@@ -1046,7 +1046,7 @@ namespace ARMeilleure.CodeGen.X86

            ValidateUnOp(dest, source);

-            Debug.Assert(dest.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger());

            context.Assembler.Neg(dest);
        }
@@ -1107,7 +1107,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Movsx16(dest, source, dest.Type);
        }
@@ -1117,7 +1117,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Movsx32(dest, source, dest.Type);
        }
@@ -1127,7 +1127,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Movsx8(dest, source, dest.Type);
        }
@@ -1187,7 +1187,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand value = operation.GetSource(1);
            Operand address = Memory(operation.GetSource(0), value.Type);

-            Debug.Assert(value.Type.IsInteger);
+            Debug.Assert(value.Type.IsInteger());

            context.Assembler.Mov16(address, value);
        }
@@ -1197,7 +1197,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand value = operation.GetSource(1);
            Operand address = Memory(operation.GetSource(0), value.Type);

-            Debug.Assert(value.Type.IsInteger);
+            Debug.Assert(value.Type.IsInteger());

            context.Assembler.Mov8(address, value);
        }
@@ -1210,7 +1210,7 @@ namespace ARMeilleure.CodeGen.X86

            ValidateBinOp(dest, src1, src2);

-            if (dest.Type.IsInteger)
+            if (dest.Type.IsInteger())
            {
                context.Assembler.Sub(dest, src2, dest.Type);
            }
@@ -1236,7 +1236,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(!dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(!dest.Type.IsInteger() && source.Type.IsInteger());

            if (source.Type == OperandType.I32)
            {
@@ -1259,7 +1259,7 @@ namespace ARMeilleure.CodeGen.X86

            byte index = src2.AsByte();

-            Debug.Assert(index < OperandType.V128.ByteSize / dest.Type.ByteSize);
+            Debug.Assert(index < OperandType.V128.GetSizeInBytes() / dest.Type.GetSizeInBytes());

            if (dest.Type == OperandType.I32)
            {
@@ -1541,7 +1541,7 @@ namespace ARMeilleure.CodeGen.X86
        {
            Operand dest = operation.Destination;

-            Debug.Assert(!dest.Type.IsInteger);
+            Debug.Assert(!dest.Type.IsInteger());

            context.Assembler.Pcmpeqw(dest, dest, dest);
        }
@@ -1550,7 +1550,7 @@ namespace ARMeilleure.CodeGen.X86
        {
            Operand dest = operation.Destination;

-            Debug.Assert(!dest.Type.IsInteger);
+            Debug.Assert(!dest.Type.IsInteger());

            context.Assembler.Xorps(dest, dest, dest);
        }
@@ -1580,7 +1580,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Movzx16(dest, source, OperandType.I32);
        }
@@ -1590,7 +1590,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            // We can eliminate the move if source is already 32-bit and the registers are the same.
            if (dest.Value == source.Value && source.Type == OperandType.I32)
@@ -1606,7 +1606,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = operation.Destination;
            Operand source = operation.GetSource(0);

-            Debug.Assert(dest.Type.IsInteger && source.Type.IsInteger);
+            Debug.Assert(dest.Type.IsInteger() && source.Type.IsInteger());

            context.Assembler.Movzx8(dest, source, OperandType.I32);
        }
@@ -1713,17 +1713,17 @@ namespace ARMeilleure.CodeGen.X86
            EnsureSameReg(dest, src1);
            EnsureSameType(dest, src1);

-            Debug.Assert(dest.Type.IsInteger && src2.Type == OperandType.I32);
+            Debug.Assert(dest.Type.IsInteger() && src2.Type == OperandType.I32);
        }

        private static void EnsureSameReg(Operand op1, Operand op2)
        {
-            if (!op1.Type.IsInteger && HardwareCapabilities.SupportsVexEncoding)
+            if (!op1.Type.IsInteger() && HardwareCapabilities.SupportsVexEncoding)
            {
                return;
            }

-            Debug.Assert(op1.Kind is OperandKind.Register or OperandKind.Memory);
+            Debug.Assert(op1.Kind == OperandKind.Register || op1.Kind == OperandKind.Memory);
            Debug.Assert(op1.Kind == op2.Kind);
            Debug.Assert(op1.Value == op2.Value);
        }
--- a/src/ARMeilleure/CodeGen/X86/PreAllocator.cs
+++ b/src/ARMeilleure/CodeGen/X86/PreAllocator.cs
@@ -66,7 +66,6 @@ namespace ARMeilleure.CodeGen.X86
                            {
                                PreAllocatorSystemV.InsertCallCopies(block.Operations, node);
                            }
-
                            break;

                        case Instruction.ConvertToFPUI:
@@ -82,15 +81,13 @@ namespace ARMeilleure.CodeGen.X86
                            {
                                nextNode = PreAllocatorSystemV.InsertLoadArgumentCopy(cctx, ref buffer, block.Operations, preservedArgs, node);
                            }
-
                            break;

                        case Instruction.Negate:
-                            if (!node.GetSource(0).Type.IsInteger)
+                            if (!node.GetSource(0).Type.IsInteger())
                            {
                                GenerateNegate(block.Operations, node);
                            }
-
                            break;

                        case Instruction.Return:
@@ -102,7 +99,6 @@ namespace ARMeilleure.CodeGen.X86
                            {
                                PreAllocatorSystemV.InsertReturnCopy(block.Operations, node);
                            }
-
                            break;

                        case Instruction.Tailcall:
@@ -114,7 +110,6 @@ namespace ARMeilleure.CodeGen.X86
                            {
                                PreAllocatorSystemV.InsertTailcallCopies(block.Operations, node);
                            }
-
                            break;

                        case Instruction.VectorInsert8:
@@ -122,7 +117,6 @@ namespace ARMeilleure.CodeGen.X86
                            {
                                GenerateVectorInsert8(block.Operations, node);
                            }
-
                            break;

                        case Instruction.Extended:
@@ -138,7 +132,6 @@ namespace ARMeilleure.CodeGen.X86

                                node.SetSources([Const(stackOffset)]);
                            }
-
                            break;
                    }
                }
@@ -159,7 +152,7 @@ namespace ARMeilleure.CodeGen.X86

            if (src1.Kind == OperandKind.Constant)
            {
-                if (!src1.Type.IsInteger)
+                if (!src1.Type.IsInteger())
                {
                    // Handle non-integer types (FP32, FP64 and V128).
                    // For instructions without an immediate operand, we do the following:
@@ -208,7 +201,7 @@ namespace ARMeilleure.CodeGen.X86

            if (src2.Kind == OperandKind.Constant)
            {
-                if (!src2.Type.IsInteger)
+                if (!src2.Type.IsInteger())
                {
                    src2 = AddXmmCopy(nodes, node, src2);

@@ -298,7 +291,7 @@ namespace ARMeilleure.CodeGen.X86
                        // - The dividend is always in RDX:RAX.
                        // - The result is always in RAX.
                        // - Additionally it also writes the remainder in RDX.
-                        if (dest.Type.IsInteger)
+                        if (dest.Type.IsInteger())
                        {
                            Operand src1 = node.GetSource(0);

@@ -319,9 +312,9 @@ namespace ARMeilleure.CodeGen.X86

                case Instruction.Extended:
                    {
-                        bool isBlend = node.Intrinsic is Intrinsic.X86Blendvpd or
-                                   Intrinsic.X86Blendvps or
-                                   Intrinsic.X86Pblendvb;
+                        bool isBlend = node.Intrinsic == Intrinsic.X86Blendvpd ||
+                                   node.Intrinsic == Intrinsic.X86Blendvps ||
+                                   node.Intrinsic == Intrinsic.X86Pblendvb;

                        // BLENDVPD, BLENDVPS, PBLENDVB last operand is always implied to be XMM0 when VEX is not supported.
                        // SHA256RNDS2 always has an implied XMM0 as a last operand.
@@ -466,7 +459,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = node.Destination;
            Operand source = node.GetSource(0);

-            Debug.Assert(source.Type.IsInteger, $"Invalid source type \"{source.Type}\".");
+            Debug.Assert(source.Type.IsInteger(), $"Invalid source type \"{source.Type}\".");

            Operation currentNode = node;

@@ -520,8 +513,8 @@ namespace ARMeilleure.CodeGen.X86
            Operand dest = node.Destination;
            Operand source = node.GetSource(0);

-            Debug.Assert(dest.Type is OperandType.FP32 or
-                         OperandType.FP64, $"Invalid destination type \"{dest.Type}\".");
+            Debug.Assert(dest.Type == OperandType.FP32 ||
+                         dest.Type == OperandType.FP64, $"Invalid destination type \"{dest.Type}\".");

            Operation currentNode = node;

@@ -654,10 +647,10 @@ namespace ARMeilleure.CodeGen.X86
            switch (operation.Instruction)
            {
                case Instruction.Add:
-                    return !HardwareCapabilities.SupportsVexEncoding && !operation.Destination.Type.IsInteger;
+                    return !HardwareCapabilities.SupportsVexEncoding && !operation.Destination.Type.IsInteger();
                case Instruction.Multiply:
                case Instruction.Subtract:
-                    return !HardwareCapabilities.SupportsVexEncoding || operation.Destination.Type.IsInteger;
+                    return !HardwareCapabilities.SupportsVexEncoding || operation.Destination.Type.IsInteger();

                case Instruction.BitwiseAnd:
                case Instruction.BitwiseExclusiveOr:
@@ -672,7 +665,7 @@ namespace ARMeilleure.CodeGen.X86
                    return true;

                case Instruction.Divide:
-                    return !HardwareCapabilities.SupportsVexEncoding && !operation.Destination.Type.IsInteger;
+                    return !HardwareCapabilities.SupportsVexEncoding && !operation.Destination.Type.IsInteger();

                case Instruction.VectorInsert:
                case Instruction.VectorInsert16:
@@ -768,7 +761,7 @@ namespace ARMeilleure.CodeGen.X86

                        Comparison compType = (Comparison)comp.AsInt32();

-                        return compType is Comparison.Equal or Comparison.NotEqual;
+                        return compType == Comparison.Equal || compType == Comparison.NotEqual;
                    }
            }

--- a/src/ARMeilleure/CodeGen/X86/PreAllocatorSystemV.cs
+++ b/src/ARMeilleure/CodeGen/X86/PreAllocatorSystemV.cs
@@ -35,7 +35,7 @@ namespace ARMeilleure.CodeGen.X86

                bool passOnReg;

-                if (source.Type.IsInteger)
+                if (source.Type.IsInteger())
                {
                    passOnReg = intCount < intMax;
                }
@@ -62,7 +62,7 @@ namespace ARMeilleure.CodeGen.X86

                if (passOnReg)
                {
-                    Operand argReg = source.Type.IsInteger
+                    Operand argReg = source.Type.IsInteger()
                        ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
                        : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);

@@ -80,7 +80,7 @@ namespace ARMeilleure.CodeGen.X86

                    InsertConstantRegCopies(nodes, nodes.AddBefore(node, spillOp));

-                    stackOffset += source.Type.ByteSize;
+                    stackOffset += source.Type.GetSizeInBytes();
                }
            }

@@ -102,7 +102,7 @@ namespace ARMeilleure.CodeGen.X86
                }
                else
                {
-                    Operand retReg = dest.Type.IsInteger
+                    Operand retReg = dest.Type.IsInteger()
                        ? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type)
                        : Xmm(CallingConvention.GetVecReturnRegister(), dest.Type);

@@ -137,7 +137,7 @@ namespace ARMeilleure.CodeGen.X86

                bool passOnReg;

-                if (source.Type.IsInteger)
+                if (source.Type.IsInteger())
                {
                    passOnReg = intCount + 1 < intMax;
                }
@@ -160,7 +160,7 @@ namespace ARMeilleure.CodeGen.X86

                if (passOnReg)
                {
-                    Operand argReg = source.Type.IsInteger
+                    Operand argReg = source.Type.IsInteger()
                        ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type)
                        : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type);

@@ -210,7 +210,7 @@ namespace ARMeilleure.CodeGen.X86
            {
                OperandType argType = cctx.FuncArgTypes[cIndex];

-                if (argType.IsInteger)
+                if (argType.IsInteger())
                {
                    intCount++;
                }
@@ -226,7 +226,7 @@ namespace ARMeilleure.CodeGen.X86

            bool passOnReg;

-            if (source.Type.IsInteger)
+            if (source.Type.IsInteger())
            {
                passOnReg = intCount < CallingConvention.GetIntArgumentsOnRegsCount();
            }
@@ -265,7 +265,7 @@ namespace ARMeilleure.CodeGen.X86
                    {
                        Operand pArg = Local(dest.Type);

-                        Operand argReg = dest.Type.IsInteger
+                        Operand argReg = dest.Type.IsInteger()
                            ? Gpr(CallingConvention.GetIntArgumentRegister(intCount), dest.Type)
                            : Xmm(CallingConvention.GetVecArgumentRegister(vecCount), dest.Type);

@@ -320,7 +320,7 @@ namespace ARMeilleure.CodeGen.X86
            }
            else
            {
-                Operand retReg = source.Type.IsInteger
+                Operand retReg = source.Type.IsInteger()
                    ? Gpr(CallingConvention.GetIntReturnRegister(), source.Type)
                    : Xmm(CallingConvention.GetVecReturnRegister(), source.Type);

--- a/src/ARMeilleure/CodeGen/X86/PreAllocatorWindows.cs
+++ b/src/ARMeilleure/CodeGen/X86/PreAllocatorWindows.cs
@@ -40,7 +40,7 @@ namespace ARMeilleure.CodeGen.X86

            if (dest != default && dest.Type == OperandType.V128)
            {
-                int stackOffset = AllocateOnStack(dest.Type.ByteSize);
+                int stackOffset = AllocateOnStack(dest.Type.GetSizeInBytes());

                arg0Reg = Gpr(CallingConvention.GetIntArgumentRegister(0), OperandType.I64);

@@ -76,7 +76,7 @@ namespace ARMeilleure.CodeGen.X86
                {
                    Operand stackAddr = Local(OperandType.I64);

-                    int stackOffset = AllocateOnStack(source.Type.ByteSize);
+                    int stackOffset = AllocateOnStack(source.Type.GetSizeInBytes());

                    nodes.AddBefore(node, Operation(Instruction.StackAlloc, stackAddr, Const(stackOffset)));

@@ -96,7 +96,7 @@ namespace ARMeilleure.CodeGen.X86

                int argIndex = index + retArgs;

-                if (source.Type.IsInteger)
+                if (source.Type.IsInteger())
                {
                    argReg = Gpr(CallingConvention.GetIntArgumentRegister(argIndex), source.Type);
                }
@@ -140,7 +140,7 @@ namespace ARMeilleure.CodeGen.X86
                }
                else
                {
-                    Operand retReg = dest.Type.IsInteger
+                    Operand retReg = dest.Type.IsInteger()
                        ? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type)
                        : Xmm(CallingConvention.GetVecReturnRegister(), dest.Type);

@@ -171,7 +171,7 @@ namespace ARMeilleure.CodeGen.X86
            for (int index = 0; index < argsCount; index++)
            {
                Operand source = node.GetSource(1 + index);
-                Operand argReg = source.Type.IsInteger
+                Operand argReg = source.Type.IsInteger()
                    ? Gpr(CallingConvention.GetIntArgumentRegister(index), source.Type)
                    : Xmm(CallingConvention.GetVecArgumentRegister(index), source.Type);

@@ -219,7 +219,7 @@ namespace ARMeilleure.CodeGen.X86
                {
                    Operand argReg, pArg;

-                    if (dest.Type.IsInteger)
+                    if (dest.Type.IsInteger())
                    {
                        argReg = Gpr(CallingConvention.GetIntArgumentRegister(index), dest.Type);
                        pArg = Local(dest.Type);
@@ -283,7 +283,7 @@ namespace ARMeilleure.CodeGen.X86
            Operand source = node.GetSource(0);
            Operand retReg;

-            if (source.Type.IsInteger)
+            if (source.Type.IsInteger())
            {
                retReg = Gpr(CallingConvention.GetIntReturnRegister(), source.Type);
            }
--- a/src/ARMeilleure/CodeGen/X86/X86Condition.cs
+++ b/src/ARMeilleure/CodeGen/X86/X86Condition.cs
@@ -25,9 +25,9 @@ namespace ARMeilleure.CodeGen.X86

    static class ComparisonX86Extensions
    {
-        extension(Comparison comparison)
+        public static X86Condition ToX86Condition(this Comparison comp)
        {
-            public X86Condition X86 => comparison switch
+            return comp switch
            {
 #pragma warning disable IDE0055 // Disable formatting
                Comparison.Equal            => X86Condition.Equal,
@@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.X86
                Comparison.LessUI           => X86Condition.Below,
 #pragma warning restore IDE0055

-                _ => throw new ArgumentException(null, nameof(comparison))
+                _ => throw new ArgumentException(null, nameof(comp)),
            };
        }
    }
--- a/src/ARMeilleure/CodeGen/X86/X86Optimizer.cs
+++ b/src/ARMeilleure/CodeGen/X86/X86Optimizer.cs
@@ -248,12 +248,12 @@ namespace ARMeilleure.CodeGen.X86

        private static bool IsMemoryLoadOrStore(Instruction inst)
        {
-            return inst is Instruction.Load or
-                   Instruction.Load16 or
-                   Instruction.Load8 or
-                   Instruction.Store or
-                   Instruction.Store16 or
-                   Instruction.Store8;
+            return inst == Instruction.Load ||
+                   inst == Instruction.Load16 ||
+                   inst == Instruction.Load8 ||
+                   inst == Instruction.Store ||
+                   inst == Instruction.Store16 ||
+                   inst == Instruction.Store8;
        }
    }
 }
--- a/src/ARMeilleure/CodeGen/X86/X86Register.cs
+++ b/src/ARMeilleure/CodeGen/X86/X86Register.cs
@@ -1,5 +1,8 @@
+using System.Diagnostics.CodeAnalysis;
+
 namespace ARMeilleure.CodeGen.X86
 {
+    [SuppressMessage("Design", "CA1069: Enums values should not be duplicated")]
    enum X86Register
    {
        Invalid = -1,
--- a/src/ARMeilleure/Decoders/Condition.cs
+++ b/src/ARMeilleure/Decoders/Condition.cs
@@ -22,11 +22,11 @@ namespace ARMeilleure.Decoders

    static class ConditionExtensions
    {
-        extension(Condition condition)
+        public static Condition Invert(this Condition cond)
        {
            // Bit 0 of all conditions is basically a negation bit, so
            // inverting this bit has the effect of inverting the condition.
-            public Condition Inverse => (Condition)((int)condition ^ 1);
+            return (Condition)((int)cond ^ 1);
        }
    }
 }
--- a/src/ARMeilleure/Decoders/Decoder.cs
+++ b/src/ARMeilleure/Decoders/Decoder.cs
@@ -254,8 +254,8 @@ namespace ARMeilleure.Decoders
            }

            // Compare and branch instructions are always conditional.
-            if (opCode.Instruction.Name is InstName.Cbz or
-                InstName.Cbnz)
+            if (opCode.Instruction.Name == InstName.Cbz ||
+                opCode.Instruction.Name == InstName.Cbnz)
            {
                return false;
            }
@@ -274,10 +274,9 @@ namespace ARMeilleure.Decoders
            {
                if (opCode is OpCodeT32)
                {
-                    return opCode.Instruction.Name is not InstName.Tst and not InstName.Teq and
-                           not InstName.Cmp and not InstName.Cmn;
+                    return opCode.Instruction.Name != InstName.Tst && opCode.Instruction.Name != InstName.Teq &&
+                           opCode.Instruction.Name != InstName.Cmp && opCode.Instruction.Name != InstName.Cmn;
                }
-
                return true;
            }

@@ -285,7 +284,7 @@ namespace ARMeilleure.Decoders
            // register (Rt == 15 or (mask & (1 << 15)) != 0), and cases where there is
            // a write back to PC (wback == true && Rn == 15), however the later may
            // be "undefined" depending on the CPU, so compilers should not produce that.
-            if (opCode is IOpCode32Mem or IOpCode32MemMult)
+            if (opCode is IOpCode32Mem || opCode is IOpCode32MemMult)
            {
                int rt, rn;

@@ -327,15 +326,15 @@ namespace ARMeilleure.Decoders
            }

            // Explicit branch instructions.
-            return opCode is IOpCode32BImm or
-                   IOpCode32BReg;
+            return opCode is IOpCode32BImm ||
+                   opCode is IOpCode32BReg;
        }

        private static bool IsCall(OpCode opCode)
        {
-            return opCode.Instruction.Name is InstName.Bl or
-                   InstName.Blr or
-                   InstName.Blx;
+            return opCode.Instruction.Name == InstName.Bl ||
+                   opCode.Instruction.Name == InstName.Blr ||
+                   opCode.Instruction.Name == InstName.Blx;
        }

        private static bool IsException(OpCode opCode)
@@ -345,9 +344,9 @@ namespace ARMeilleure.Decoders

        private static bool IsTrap(OpCode opCode)
        {
-            return opCode.Instruction.Name is InstName.Brk or
-                   InstName.Trap or
-                   InstName.Und;
+            return opCode.Instruction.Name == InstName.Brk ||
+                   opCode.Instruction.Name == InstName.Trap ||
+                   opCode.Instruction.Name == InstName.Und;
        }

        public static OpCode DecodeOpCode(IMemoryManager memory, ulong address, ExecutionMode mode)
--- a/src/ARMeilleure/Decoders/DecoderHelper.cs
+++ b/src/ARMeilleure/Decoders/DecoderHelper.cs
@@ -162,7 +162,6 @@ namespace ARMeilleure.Decoders
                    }
                }
            }
-
            return false;
        }
    }
--- a/src/ARMeilleure/Decoders/OpCode32SimdDupGP.cs
+++ b/src/ARMeilleure/Decoders/OpCode32SimdDupGP.cs
@@ -20,7 +20,6 @@ namespace ARMeilleure.Decoders
                Instruction = InstDescriptor.Undefined;
                return;
            }
-
            Q = ((opCode >> 21) & 0x1) != 0;

            RegisterSize = Q ? RegisterSize.Simd128 : RegisterSize.Simd64;
--- a/src/ARMeilleure/Decoders/OpCode32SimdMemPair.cs
+++ b/src/ARMeilleure/Decoders/OpCode32SimdMemPair.cs
@@ -40,7 +40,7 @@ namespace ARMeilleure.Decoders
            Rn = (opCode >> 16) & 0xf;

            WBack = Rm != RegisterAlias.Aarch32Pc;
-            RegisterIndex = Rm is not RegisterAlias.Aarch32Pc and not RegisterAlias.Aarch32Sp;
+            RegisterIndex = Rm != RegisterAlias.Aarch32Pc && Rm != RegisterAlias.Aarch32Sp;

            Regs = _regsMap[(opCode >> 8) & 0xf];

--- a/src/ARMeilleure/Decoders/OpCode32SimdMemSingle.cs
+++ b/src/ARMeilleure/Decoders/OpCode32SimdMemSingle.cs
@@ -45,7 +45,7 @@ namespace ARMeilleure.Decoders
            Rn = (opCode >> 16) & 0xf;

            WBack = Rm != RegisterAlias.Aarch32Pc;
-            RegisterIndex = Rm is not RegisterAlias.Aarch32Pc and not RegisterAlias.Aarch32Sp;
+            RegisterIndex = Rm != RegisterAlias.Aarch32Pc && Rm != RegisterAlias.Aarch32Sp;
        }
    }
 }
--- a/src/ARMeilleure/Decoders/OpCodeMemImm.cs
+++ b/src/ARMeilleure/Decoders/OpCodeMemImm.cs
@@ -28,8 +28,8 @@ namespace ARMeilleure.Decoders
            MemOp type = WBack ? (MemOp)((opCode >> 10) & 3) : MemOp.Unsigned;

            PostIdx = type == MemOp.PostIndexed;
-            Unscaled = type is MemOp.Unscaled or
-                       MemOp.Unprivileged;
+            Unscaled = type == MemOp.Unscaled ||
+                       type == MemOp.Unprivileged;

            // Unscaled and Unprivileged doesn't write back,
            // but they do use the 9-bits Signed Immediate.
--- a/src/ARMeilleure/Decoders/OpCodeTable.cs
+++ b/src/ARMeilleure/Decoders/OpCodeTable.cs
@@ -1381,7 +1381,6 @@ namespace ARMeilleure.Decoders
            {
                thumbEncoding = $"1110{thumbEncoding.AsSpan(4)}";
            }
-
            SetT32(thumbEncoding, name, emitter, makeOpT32);
        }

@@ -1410,7 +1409,6 @@ namespace ARMeilleure.Decoders
            {
                throw new ArgumentException("Invalid ASIMD instruction encoding");
            }
-
            SetT32(thumbEncoding, name, emitter, makeOpT32);
        }

--- a/src/ARMeilleure/Diagnostics/IRDumper.cs
+++ b/src/ARMeilleure/Diagnostics/IRDumper.cs
@@ -9,7 +9,7 @@ namespace ARMeilleure.Diagnostics
 {
    class IRDumper
    {
-        private const char Indentation = ' ';
+        private const string Indentation = " ";

        private int _indentLevel;

@@ -30,11 +30,14 @@ namespace ARMeilleure.Diagnostics

        private void Indent()
        {
-            if (_indentLevel == 0)
-                return;
+            _builder.EnsureCapacity(_builder.Capacity + _indentLevel * Indentation.Length);

-            _builder.EnsureCapacity(_builder.Capacity + _indentLevel);
-            _builder.Append(Indentation, _indentLevel);
+            for (int index = 0; index < _indentLevel; index++)
+            {
+#pragma warning disable CA1834 // Use StringBuilder.Append(char) for single character strings
+                _builder.Append(Indentation);
+#pragma warning restore CA1834
+            }
        }

        private void IncreaseIndentation()
@@ -232,8 +235,8 @@ namespace ARMeilleure.Diagnostics
                    {
                        _builder.Append('.').Append(operation.Intrinsic);
                    }
-                    else if (operation.Instruction is Instruction.BranchIf or
-                             Instruction.Compare)
+                    else if (operation.Instruction == Instruction.BranchIf ||
+                             operation.Instruction == Instruction.Compare)
                    {
                        comparison = true;
                    }
@@ -259,7 +262,6 @@ namespace ARMeilleure.Diagnostics
                            DumpOperand(source);
                        }
                    }
-
                    break;
            }

--- a/src/ARMeilleure/Instructions/InstEmitAlu32.cs
+++ b/src/ARMeilleure/Instructions/InstEmitAlu32.cs
@@ -899,7 +899,6 @@ namespace ARMeilleure.Instructions
                    {
                        n = context.ShiftLeft(n, Const(shift));
                    }
-
                    break;
                case ShiftType.Asr:
                    if (shift == 32)
@@ -910,7 +909,6 @@ namespace ARMeilleure.Instructions
                    {
                        n = context.ShiftRightSI(n, Const(shift));
                    }
-
                    break;
            }

--- a/src/ARMeilleure/Instructions/InstEmitAluHelper.cs
+++ b/src/ARMeilleure/Instructions/InstEmitAluHelper.cs
@@ -266,7 +266,7 @@ namespace ARMeilleure.Instructions
            }
        }

-        private static InvalidOperationException InvalidOpCodeType(OpCode opCode)
+        private static Exception InvalidOpCodeType(OpCode opCode)
        {
            return new InvalidOperationException($"Invalid OpCode type \"{opCode?.GetType().Name ?? "null"}\".");
        }
@@ -318,7 +318,6 @@ namespace ARMeilleure.Instructions
                        {
                            m = GetRrxC(context, m, setCarry);
                        }
-
                        break;
                }
            }
--- a/src/ARMeilleure/Instructions/InstEmitException.cs
+++ b/src/ARMeilleure/Instructions/InstEmitException.cs
@@ -19,7 +19,7 @@ namespace ARMeilleure.Instructions

            context.LoadFromContext();

-            InstEmitFlowHelper.EmitReturn(context, Const(op.Address));
+            context.Return(Const(op.Address));
        }

        public static void Svc(ArmEmitterContext context)
@@ -49,7 +49,7 @@ namespace ARMeilleure.Instructions

            context.LoadFromContext();

-            InstEmitFlowHelper.EmitReturn(context, Const(op.Address));
+            context.Return(Const(op.Address));
        }
    }
 }
--- a/src/ARMeilleure/Instructions/InstEmitException32.cs
+++ b/src/ARMeilleure/Instructions/InstEmitException32.cs
@@ -33,7 +33,7 @@ namespace ARMeilleure.Instructions

            context.LoadFromContext();

-            InstEmitFlowHelper.EmitReturn(context, Const(context.CurrOp.Address));
+            context.Return(Const(context.CurrOp.Address));
        }
    }
 }
--- a/src/ARMeilleure/Instructions/InstEmitFlow.cs
+++ b/src/ARMeilleure/Instructions/InstEmitFlow.cs
@@ -66,7 +66,7 @@ namespace ARMeilleure.Instructions
        {
            OpCodeBReg op = (OpCodeBReg)context.CurrOp;

-            EmitReturn(context, GetIntOrZR(context, op.Rn));
+            context.Return(GetIntOrZR(context, op.Rn));
        }

        public static void Tbnz(ArmEmitterContext context) => EmitTb(context, onNotZero: true);
--- a/src/ARMeilleure/Instructions/InstEmitFlowHelper.cs
+++ b/src/ARMeilleure/Instructions/InstEmitFlowHelper.cs
@@ -13,10 +13,6 @@ namespace ARMeilleure.Instructions
 {
    static class InstEmitFlowHelper
    {
-        // How many calls we can have in our call stack before we give up and return to the dispatcher.
-        // This prevents stack overflows caused by deep recursive calls.
-        private const int MaxCallDepth = 200;
-
        public static void EmitCondBranch(ArmEmitterContext context, Operand target, Condition cond)
        {
            if (cond != Condition.Al)
@@ -147,12 +143,6 @@ namespace ARMeilleure.Instructions

        public static void EmitCall(ArmEmitterContext context, ulong immediate)
        {
-            if (context.IsSingleStep)
-            {
-                context.Return(Const(immediate));
-                return;
-            }
-
            bool isRecursive = immediate == context.EntryAddress;

            if (isRecursive)
@@ -167,7 +157,12 @@ namespace ARMeilleure.Instructions

        public static void EmitVirtualCall(ArmEmitterContext context, Operand target)
        {
-            if (context.IsSingleStep)
+            EmitTableBranch(context, target, isJump: false);
+        }
+
+        public static void EmitVirtualJump(ArmEmitterContext context, Operand target, bool isReturn)
+        {
+            if (isReturn)
            {
                if (target.Type == OperandType.I32)
                {
@@ -177,36 +172,11 @@ namespace ARMeilleure.Instructions
                context.Return(target);
            }
            else
-            {
-                EmitTableBranch(context, target, isJump: false);
-            }
-        }
-
-        public static void EmitVirtualJump(ArmEmitterContext context, Operand target, bool isReturn)
-        {
-            if (isReturn || context.IsSingleStep)
-            {
-                EmitReturn(context, target);
-            }
-            else
            {
                EmitTableBranch(context, target, isJump: true);
            }
        }

-        public static void EmitReturn(ArmEmitterContext context, Operand target)
-        {
-            Operand nativeContext = context.LoadArgument(OperandType.I64, 0);
-            DecreaseCallDepth(context, nativeContext);
-
-            if (target.Type == OperandType.I32)
-            {
-                target = context.ZeroExtend32(OperandType.I64, target);
-            }
-
-            context.Return(target);
-        }
-
        private static void EmitTableBranch(ArmEmitterContext context, Operand guestAddress, bool isJump)
        {
            context.StoreToContext();
@@ -269,8 +239,6 @@ namespace ARMeilleure.Instructions

            if (isJump)
            {
-                DecreaseCallDepth(context, nativeContext);
-
                context.Tailcall(hostAddress, nativeContext);
            }
            else
@@ -292,42 +260,8 @@ namespace ARMeilleure.Instructions
                Operand lblContinue = context.GetLabel(nextAddr.Value);
                context.BranchIf(lblContinue, returnAddress, nextAddr, Comparison.Equal, BasicBlockFrequency.Cold);

-                DecreaseCallDepth(context, nativeContext);
-
                context.Return(returnAddress);
            }
        }
-
-        public static void EmitCallDepthCheckAndIncrement(EmitterContext context, Operand guestAddress)
-        {
-            if (!Optimizations.EnableDeepCallRecursionProtection)
-            {
-                return;
-            }
-
-            Operand nativeContext = context.LoadArgument(OperandType.I64, 0);
-            Operand callDepthAddr = context.Add(nativeContext, Const((ulong)NativeContext.GetCallDepthOffset()));
-            Operand currentCallDepth = context.Load(OperandType.I32, callDepthAddr);
-            Operand lblDoCall = Label();
-
-            context.BranchIf(lblDoCall, currentCallDepth, Const(MaxCallDepth), Comparison.LessUI);
-            context.Store(callDepthAddr, context.Subtract(currentCallDepth, Const(1)));
-            context.Return(guestAddress);
-
-            context.MarkLabel(lblDoCall);
-            context.Store(callDepthAddr, context.Add(currentCallDepth, Const(1)));
-        }
-
-        private static void DecreaseCallDepth(EmitterContext context, Operand nativeContext)
-        {
-            if (!Optimizations.EnableDeepCallRecursionProtection)
-            {
-                return;
-            }
-
-            Operand callDepthAddr = context.Add(nativeContext, Const((ulong)NativeContext.GetCallDepthOffset()));
-            Operand currentCallDepth = context.Load(OperandType.I32, callDepthAddr);
-            context.Store(callDepthAddr, context.Subtract(currentCallDepth, Const(1)));
-        }
    }
 }
--- a/src/ARMeilleure/Instructions/InstEmitHashHelper.cs
+++ b/src/ARMeilleure/Instructions/InstEmitHashHelper.cs
@@ -16,8 +16,8 @@ namespace ARMeilleure.Instructions

        public static Operand EmitCrc32(ArmEmitterContext context, Operand crc, Operand value, int size, bool castagnoli)
        {
-            Debug.Assert(crc.Type.IsInteger && value.Type.IsInteger);
-            Debug.Assert(size is >= 0 and < 4);
+            Debug.Assert(crc.Type.IsInteger() && value.Type.IsInteger());
+            Debug.Assert(size >= 0 && size < 4);
            Debug.Assert((size < 3) || (value.Type == OperandType.I64));

            if (castagnoli && Optimizations.UseSse42)
--- a/src/ARMeilleure/Instructions/InstEmitHelper.cs
+++ b/src/ARMeilleure/Instructions/InstEmitHelper.cs
@@ -90,7 +90,6 @@ namespace ARMeilleure.Instructions
                {
                    value = context.ConvertI64ToI32(value);
                }
-
                Operand reg = Register(GetRegisterAlias(context.Mode, regIndex), RegisterType.Integer, OperandType.I32);

                context.Copy(reg, value);
--- a/src/ARMeilleure/Instructions/InstEmitMemoryEx.cs
+++ b/src/ARMeilleure/Instructions/InstEmitMemoryEx.cs
@@ -140,7 +140,7 @@ namespace ARMeilleure.Instructions

            if (pair)
            {
-                Debug.Assert(op.Size is 2 or 3, "Invalid size for pairwise store.");
+                Debug.Assert(op.Size == 2 || op.Size == 3, "Invalid size for pairwise store.");

                Operand t2 = GetIntOrZR(context, op.Rt2);

--- a/src/ARMeilleure/Instructions/InstEmitMemoryExHelper.cs
+++ b/src/ARMeilleure/Instructions/InstEmitMemoryExHelper.cs
@@ -42,7 +42,6 @@ namespace ARMeilleure.Instructions
                {
                    context.Store(exValuePtr, Const(0UL));
                }
-
                if (size < 4)
                {
                    context.Store(context.Add(exValuePtr, Const(exValuePtr.Type, 8L)), Const(0UL));
--- a/src/ARMeilleure/Instructions/InstEmitMemoryHelper.cs
+++ b/src/ARMeilleure/Instructions/InstEmitMemoryHelper.cs
@@ -59,7 +59,7 @@ namespace ARMeilleure.Instructions
            {
                Operand value = GetInt(context, rt);

-                if (ext is Extension.Sx32 or Extension.Sx64)
+                if (ext == Extension.Sx32 || ext == Extension.Sx64)
                {
                    OperandType destType = ext == Extension.Sx64 ? OperandType.I64 : OperandType.I32;

@@ -123,9 +123,9 @@ namespace ARMeilleure.Instructions

        private static bool IsSimd(ArmEmitterContext context)
        {
-            return context.CurrOp is IOpCodeSimd and
-                 not (OpCodeSimdMemMs or
-                   OpCodeSimdMemSs);
+            return context.CurrOp is IOpCodeSimd &&
+                 !(context.CurrOp is OpCodeSimdMemMs ||
+                   context.CurrOp is OpCodeSimdMemSs);
        }

        public static Operand EmitReadInt(ArmEmitterContext context, Operand address, int size)
@@ -157,7 +157,7 @@ namespace ARMeilleure.Instructions

            context.Copy(temp, value);

-            if (!context.Memory.Type.IsHostMappedOrTracked)
+            if (!context.Memory.Type.IsHostMappedOrTracked())
            {
                context.Branch(lblEnd);

@@ -198,7 +198,7 @@ namespace ARMeilleure.Instructions

            SetInt(context, rt, value);

-            if (!context.Memory.Type.IsHostMappedOrTracked)
+            if (!context.Memory.Type.IsHostMappedOrTracked())
            {
                context.Branch(lblEnd);

@@ -265,7 +265,7 @@ namespace ARMeilleure.Instructions

            context.Copy(GetVec(rt), value);

-            if (!context.Memory.Type.IsHostMappedOrTracked)
+            if (!context.Memory.Type.IsHostMappedOrTracked())
            {
                context.Branch(lblEnd);

@@ -312,7 +312,7 @@ namespace ARMeilleure.Instructions
                    break;
            }

-            if (!context.Memory.Type.IsHostMappedOrTracked)
+            if (!context.Memory.Type.IsHostMappedOrTracked())
            {
                context.Branch(lblEnd);

@@ -385,7 +385,7 @@ namespace ARMeilleure.Instructions
                    break;
            }

-            if (!context.Memory.Type.IsHostMappedOrTracked)
+            if (!context.Memory.Type.IsHostMappedOrTracked())
            {
                context.Branch(lblEnd);

@@ -399,11 +399,11 @@ namespace ARMeilleure.Instructions

        public static Operand EmitPtPointerLoad(ArmEmitterContext context, Operand address, Operand lblSlowPath, bool write, int size)
        {
-            if (context.Memory.Type.IsHostMapped)
+            if (context.Memory.Type.IsHostMapped())
            {
                return EmitHostMappedPointer(context, address);
            }
-            else if (context.Memory.Type.IsHostTracked)
+            else if (context.Memory.Type.IsHostTracked())
            {
                if (address.Type == OperandType.I32)
                {
@@ -717,7 +717,7 @@ namespace ARMeilleure.Instructions
            };
        }

-        private static InvalidOperationException InvalidOpCodeType(OpCode opCode)
+        private static Exception InvalidOpCodeType(OpCode opCode)
        {
            return new InvalidOperationException($"Invalid OpCode type \"{opCode?.GetType().Name ?? "null"}\".");
        }
@@ -768,7 +768,6 @@ namespace ARMeilleure.Instructions
                        {
                            m = InstEmitAluHelper.GetRrxC(context, m, setCarry);
                        }
-
                        break;
                }
            }
--- a/src/ARMeilleure/Instructions/InstEmitMul.cs
+++ b/src/ARMeilleure/Instructions/InstEmitMul.cs
@@ -2,6 +2,7 @@ using ARMeilleure.Decoders;
 using ARMeilleure.IntermediateRepresentation;
 using ARMeilleure.Translation;
 using System;
+using System.Diagnostics.CodeAnalysis;
 using static ARMeilleure.Instructions.InstEmitHelper;

 namespace ARMeilleure.Instructions
@@ -32,6 +33,7 @@ namespace ARMeilleure.Instructions
        public static void Umsubl(ArmEmitterContext context) => EmitMull(context, MullFlags.Subtract);

        [Flags]
+        [SuppressMessage("Design", "CA1069: Enums values should not be duplicated")]
        private enum MullFlags
        {
            Subtract = 0,
--- a/src/ARMeilleure/Instructions/InstEmitSimdArithmetic.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdArithmetic.cs
@@ -5266,7 +5266,7 @@ namespace ARMeilleure.Instructions
        private static Operand EmitSse2Sll_128(ArmEmitterContext context, Operand op, int shift)
        {
            // The upper part of op is assumed to be zero.
-            Debug.Assert(shift is >= 0 and < 64);
+            Debug.Assert(shift >= 0 && shift < 64);

            if (shift == 0)
            {
--- a/src/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs
@@ -231,12 +231,10 @@ namespace ARMeilleure.Instructions
            {
                result |= (long)((i >= end || i < start) ? 0x80 : b++) << (i * 8);
            }
-
            for (int i = 8; i < 16; i++)
            {
                result2 |= (long)((i >= end || i < start) ? 0x80 : b++) << ((i - 8) * 8);
            }
-
            return (result2, result);
        }

@@ -263,7 +261,6 @@ namespace ARMeilleure.Instructions
                        nMaskHigh = nMaskLow + 0x0808080808080808L;
                        mMaskHigh = mMaskLow + 0x0808080808080808L;
                    }
-
                    nMask = X86GetElements(context, nMaskHigh, nMaskLow);
                    mMask = X86GetElements(context, mMaskHigh, mMaskLow);
                    Operand nPart = context.AddIntrinsic(Intrinsic.X86Pshufb, n, nMask);
@@ -288,7 +285,6 @@ namespace ARMeilleure.Instructions
                    {
                        extract = EmitVectorExtractZx32(context, op.Qn, op.In + byteOff, op.Size);
                    }
-
                    byteOff++;

                    res = EmitVectorInsert(context, res, extract, op.Id + index, op.Size);
@@ -1308,7 +1304,6 @@ namespace ARMeilleure.Instructions
                                case 2:
                                    return context.AddIntrinsic(Intrinsic.X86Shufps, op1, op1, Const(1 | (0 << 2) | (3 << 4) | (2 << 6)));
                            }
-
                            break;
                        case 2:
                            // Rev32
@@ -1321,7 +1316,6 @@ namespace ARMeilleure.Instructions
                                    mask = X86GetElements(context, 0x0d0c0f0e_09080b0aL, 0x05040706_01000302L);
                                    return context.AddIntrinsic(Intrinsic.X86Pshufb, op1, mask);
                            }
-
                            break;
                        case 1:
                            // Rev16
@@ -1347,7 +1341,6 @@ namespace ARMeilleure.Instructions
                                case 3:
                                    return context.ByteSwap(op1);
                            }
-
                            break;
                        case 1:
                            switch (op.Size)
@@ -1362,7 +1355,6 @@ namespace ARMeilleure.Instructions
                                        context.BitwiseOr(context.ShiftRightUI(context.BitwiseAnd(op1, Const(0x0000ffff00000000ul)), Const(16)),
                                                             context.ShiftLeft(context.BitwiseAnd(op1, Const(0x00000000ffff0000ul)), Const(16))));
                            }
-
                            break;
                        case 2:
                            // Swap upper and lower halves.
--- a/src/ARMeilleure/Instructions/InstEmitSimdCvt.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdCvt.cs
@@ -1119,7 +1119,7 @@ namespace ARMeilleure.Instructions

        private static Operand EmitFPConvert(ArmEmitterContext context, Operand value, int size, bool signed)
        {
-            Debug.Assert(value.Type is OperandType.I32 or OperandType.I64);
+            Debug.Assert(value.Type == OperandType.I32 || value.Type == OperandType.I64);
            Debug.Assert((uint)size < 2);

            OperandType type = size == 0 ? OperandType.FP32 : OperandType.FP64;
@@ -1136,7 +1136,7 @@ namespace ARMeilleure.Instructions

        private static Operand EmitScalarFcvts(ArmEmitterContext context, Operand value, int fBits)
        {
-            Debug.Assert(value.Type is OperandType.FP32 or OperandType.FP64);
+            Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);

            value = EmitF2iFBitsMul(context, value, fBits);

@@ -1160,7 +1160,7 @@ namespace ARMeilleure.Instructions

        private static Operand EmitScalarFcvtu(ArmEmitterContext context, Operand value, int fBits)
        {
-            Debug.Assert(value.Type is OperandType.FP32 or OperandType.FP64);
+            Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);

            value = EmitF2iFBitsMul(context, value, fBits);

@@ -1184,7 +1184,7 @@ namespace ARMeilleure.Instructions

        private static Operand EmitF2iFBitsMul(ArmEmitterContext context, Operand value, int fBits)
        {
-            Debug.Assert(value.Type is OperandType.FP32 or OperandType.FP64);
+            Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);

            if (fBits == 0)
            {
@@ -1203,7 +1203,7 @@ namespace ARMeilleure.Instructions

        private static Operand EmitI2fFBitsMul(ArmEmitterContext context, Operand value, int fBits)
        {
-            Debug.Assert(value.Type is OperandType.FP32 or OperandType.FP64);
+            Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);

            if (fBits == 0)
            {
--- a/src/ARMeilleure/Instructions/InstEmitSimdCvt32.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdCvt32.cs
@@ -385,7 +385,6 @@ namespace ARMeilleure.Instructions
                    {
                        res = context.AddIntrinsic(Intrinsic.X86Cvtsd2ss, context.VectorZero(), res);
                    }
-
                    res = context.AddIntrinsic(Intrinsic.X86Vcvtps2ph, res, Const(X86GetRoundControl(FPRoundingMode.ToNearest)));
                    res = context.VectorExtract16(res, 0);
                    InsertScalar16(context, op.Vd, op.T, res);
@@ -398,7 +397,6 @@ namespace ARMeilleure.Instructions
                    {
                        res = context.AddIntrinsic(Intrinsic.X86Cvtss2sd, context.VectorZero(), res);
                    }
-
                    res = context.VectorExtract(op.Size == 1 ? OperandType.I64 : OperandType.I32, res, 0);
                    InsertScalar(context, op.Vd, res);
                }
@@ -637,7 +635,7 @@ namespace ARMeilleure.Instructions

        private static Operand EmitFPConvert(ArmEmitterContext context, Operand value, OperandType type, bool signed)
        {
-            Debug.Assert(value.Type is OperandType.I32 or OperandType.I64);
+            Debug.Assert(value.Type == OperandType.I32 || value.Type == OperandType.I64);

            if (signed)
            {
--- a/src/ARMeilleure/Instructions/InstEmitSimdHelper.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdHelper.cs
@@ -363,7 +363,7 @@ namespace ARMeilleure.Instructions

        public static Operand EmitCountSetBits8(ArmEmitterContext context, Operand op) // "size" is 8 (SIMD&FP Inst.).
        {
-            Debug.Assert(op.Type is OperandType.I32 or OperandType.I64);
+            Debug.Assert(op.Type == OperandType.I32 || op.Type == OperandType.I64);

            Operand op0 = context.Subtract(op, context.BitwiseAnd(context.ShiftRightUI(op, Const(1)), Const(op.Type, 0x55L)));

@@ -489,7 +489,7 @@ namespace ARMeilleure.Instructions

        public static Operand EmitRoundByRMode(ArmEmitterContext context, Operand op)
        {
-            Debug.Assert(op.Type is OperandType.FP32 or OperandType.FP64);
+            Debug.Assert(op.Type == OperandType.FP32 || op.Type == OperandType.FP64);

            Operand lbl1 = Label();
            Operand lbl2 = Label();
@@ -1676,7 +1676,7 @@ namespace ARMeilleure.Instructions
            int eSize = 8 << size;

            Debug.Assert(op.Type == OperandType.I64);
-            Debug.Assert(eSize is 8 or 16 or 32 or 64);
+            Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);

            Operand lbl1 = Label();
            Operand lblEnd = Label();
@@ -1709,7 +1709,7 @@ namespace ARMeilleure.Instructions
            int eSize = 8 << size;

            Debug.Assert(op.Type == OperandType.I64);
-            Debug.Assert(eSize is 8 or 16 or 32 or 64);
+            Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);

            Operand lblEnd = Label();

@@ -1735,7 +1735,7 @@ namespace ARMeilleure.Instructions
            int eSizeDst = 8 << sizeDst;

            Debug.Assert(op.Type == OperandType.I64);
-            Debug.Assert(eSizeDst is 8 or 16 or 32);
+            Debug.Assert(eSizeDst == 8 || eSizeDst == 16 || eSizeDst == 32);

            Operand lbl1 = Label();
            Operand lblEnd = Label();
@@ -1768,7 +1768,7 @@ namespace ARMeilleure.Instructions
            int eSizeDst = 8 << sizeDst;

            Debug.Assert(op.Type == OperandType.I64);
-            Debug.Assert(eSizeDst is 8 or 16 or 32);
+            Debug.Assert(eSizeDst == 8 || eSizeDst == 16 || eSizeDst == 32);

            Operand lblEnd = Label();

--- a/src/ARMeilleure/Instructions/InstEmitSimdHelper32.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdHelper32.cs
@@ -31,7 +31,7 @@ namespace ARMeilleure.Instructions
        {
            Debug.Assert(type != OperandType.V128);

-            if (type is OperandType.FP64 or OperandType.I64)
+            if (type == OperandType.FP64 || type == OperandType.I64)
            {
                // From dreg.
                return context.VectorExtract(type, GetVecA32(reg >> 1), reg & 1);
@@ -48,7 +48,7 @@ namespace ARMeilleure.Instructions
            Debug.Assert(value.Type != OperandType.V128);

            Operand vec, insert;
-            if (value.Type is OperandType.FP64 or OperandType.I64)
+            if (value.Type == OperandType.FP64 || value.Type == OperandType.I64)
            {
                // From dreg.
                vec = GetVecA32(reg >> 1);
@@ -71,7 +71,7 @@ namespace ARMeilleure.Instructions

        public static void InsertScalar16(ArmEmitterContext context, int reg, bool top, Operand value)
        {
-            Debug.Assert(value.Type is OperandType.FP32 or OperandType.I32);
+            Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.I32);

            Operand vec, insert;
            vec = GetVecA32(reg >> 2);
@@ -880,7 +880,6 @@ namespace ARMeilleure.Instructions
                {
                    res = EmitMoveDoubleWordToSide(context, res, side, op.Vd);
                }
-
                res = EmitDoubleWordInsert(context, d, res, op.Vd);
            }

--- a/src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdHelper32Arm64.cs
@@ -146,7 +146,6 @@ namespace ARMeilleure.Instructions
                {
                    res = EmitMoveDoubleWordToSide(context, res, side, op.Vd);
                }
-
                res = EmitDoubleWordInsert(context, d, res, op.Vd);
            }

--- a/src/ARMeilleure/Instructions/InstEmitSimdLogical32.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdLogical32.cs
@@ -268,7 +268,6 @@ namespace ARMeilleure.Instructions
                    {
                        m = context.BitwiseNot(m);
                    }
-
                    return context.BitwiseExclusiveOr(
                        context.BitwiseAnd(m,
                        context.BitwiseExclusiveOr(d, n)), d);
--- a/src/ARMeilleure/Instructions/InstEmitSimdMemory32.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdMemory32.cs
@@ -110,7 +110,6 @@ namespace ARMeilleure.Instructions
                            EmitStoreSimd(context, address, d >> 1, index, op.Size);
                        }
                    }
-
                    offset += eBytes;
                    d += op.Increment;
                }
--- a/src/ARMeilleure/Instructions/InstEmitSimdShift.cs
+++ b/src/ARMeilleure/Instructions/InstEmitSimdShift.cs
@@ -1634,7 +1634,7 @@ namespace ARMeilleure.Instructions
            int eSize = 8 << size;

            Debug.Assert(op.Type == OperandType.I64);
-            Debug.Assert(eSize is 8 or 16 or 32 or 64);
+            Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);

            Operand res = context.AllocateLocal(OperandType.I64);

@@ -1657,7 +1657,7 @@ namespace ARMeilleure.Instructions
            int eSize = 8 << size;

            Debug.Assert(op.Type == OperandType.I64);
-            Debug.Assert(eSize is 8 or 16 or 32 or 64);
+            Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);

            Operand lblEnd = Label();

@@ -1732,7 +1732,7 @@ namespace ARMeilleure.Instructions

            Debug.Assert(op.Type == OperandType.I64);
            Debug.Assert(shiftLsB.Type == OperandType.I32);
-            Debug.Assert(eSize is 8 or 16 or 32 or 64);
+            Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);

            Operand lbl1 = Label();
            Operand lblEnd = Label();
@@ -1769,7 +1769,7 @@ namespace ARMeilleure.Instructions

            Debug.Assert(op.Type == OperandType.I64);
            Debug.Assert(shiftLsB.Type == OperandType.I32);
-            Debug.Assert(eSize is 8 or 16 or 32 or 64);
+            Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);

            Operand lbl1 = Label();
            Operand lbl2 = Label();
@@ -1813,7 +1813,6 @@ namespace ARMeilleure.Instructions
                    ? EmitSignedSrcSatQ(context, shl, size, signedDst: true)
                    : EmitUnsignedSrcSatQ(context, shl, size, signedDst: false));
            }
-
            context.Branch(lblEnd);

            context.MarkLabel(lblEnd);
@@ -1851,7 +1850,6 @@ namespace ARMeilleure.Instructions
                {
                    context.Copy(res, sar);
                }
-
                context.Branch(lblEnd);

                context.MarkLabel(lblEnd);
@@ -1908,7 +1906,6 @@ namespace ARMeilleure.Instructions
                    Operand right = context.BitwiseOr(shr, context.ShiftRightUI(oneShl63UL, context.Subtract(shift, one)));
                    context.Copy(res, context.ConditionalSelect(isEqual, oneUL, right));
                }
-
                context.Branch(lblEnd);

                context.MarkLabel(lblEnd);
--- a/src/ARMeilleure/Instructions/NativeInterface.cs
+++ b/src/ARMeilleure/Instructions/NativeInterface.cs
@@ -3,7 +3,6 @@ using ARMeilleure.State;
 using ARMeilleure.Translation;
 using System;
 using System.Runtime.InteropServices;
-using ExecutionContext = ARMeilleure.State.ExecutionContext;

 namespace ARMeilleure.Instructions
 {
@@ -70,13 +69,13 @@ namespace ARMeilleure.Instructions
        [UnmanagedCallersOnly]
        public static ulong GetCtrEl0()
        {
-            return ExecutionContext.CtrEl0;
+            return GetContext().CtrEl0;
        }

        [UnmanagedCallersOnly]
        public static ulong GetDczidEl0()
        {
-            return ExecutionContext.DczidEl0;
+            return GetContext().DczidEl0;
        }

        [UnmanagedCallersOnly]
--- a/src/ARMeilleure/Instructions/SoftFallback.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback.cs
@@ -0,0 +1,692 @@
+using ARMeilleure.State;
+using System;
+using System.Runtime.InteropServices;
+
+namespace ARMeilleure.Instructions
+{
+    static class SoftFallback
+    {
+        #region "ShrImm64"
+        [UnmanagedCallersOnly]
+        public static long SignedShrImm64(long value, long roundConst, int shift)
+        {
+            if (roundConst == 0L)
+            {
+                if (shift <= 63)
+                {
+                    return value >> shift;
+                }
+                else /* if (shift == 64) */
+                {
+                    if (value < 0L)
+                    {
+                        return -1L;
+                    }
+                    else /* if (value >= 0L) */
+                    {
+                        return 0L;
+                    }
+                }
+            }
+            else /* if (roundConst == 1L << (shift - 1)) */
+            {
+                if (shift <= 63)
+                {
+                    long add = value + roundConst;
+
+                    if ((~value & (value ^ add)) < 0L)
+                    {
+                        return (long)((ulong)add >> shift);
+                    }
+                    else
+                    {
+                        return add >> shift;
+                    }
+                }
+                else /* if (shift == 64) */
+                {
+                    return 0L;
+                }
+            }
+        }
+
+        [UnmanagedCallersOnly]
+        public static ulong UnsignedShrImm64(ulong value, long roundConst, int shift)
+        {
+            if (roundConst == 0L)
+            {
+                if (shift <= 63)
+                {
+                    return value >> shift;
+                }
+                else /* if (shift == 64) */
+                {
+                    return 0UL;
+                }
+            }
+            else /* if (roundConst == 1L << (shift - 1)) */
+            {
+                ulong add = value + (ulong)roundConst;
+
+                if ((add < value) && (add < (ulong)roundConst))
+                {
+                    if (shift <= 63)
+                    {
+                        return (add >> shift) | (0x8000000000000000UL >> (shift - 1));
+                    }
+                    else /* if (shift == 64) */
+                    {
+                        return 1UL;
+                    }
+                }
+                else
+                {
+                    if (shift <= 63)
+                    {
+                        return add >> shift;
+                    }
+                    else /* if (shift == 64) */
+                    {
+                        return 0UL;
+                    }
+                }
+            }
+        }
+        #endregion
+
+        #region "Saturation"
+        [UnmanagedCallersOnly]
+        public static int SatF32ToS32(float value)
+        {
+            if (float.IsNaN(value))
+            {
+                return 0;
+            }
+
+            return value >= int.MaxValue ? int.MaxValue :
+                   value <= int.MinValue ? int.MinValue : (int)value;
+        }
+
+        [UnmanagedCallersOnly]
+        public static long SatF32ToS64(float value)
+        {
+            if (float.IsNaN(value))
+            {
+                return 0;
+            }
+
+            return value >= long.MaxValue ? long.MaxValue :
+                   value <= long.MinValue ? long.MinValue : (long)value;
+        }
+
+        [UnmanagedCallersOnly]
+        public static uint SatF32ToU32(float value)
+        {
+            if (float.IsNaN(value))
+            {
+                return 0;
+            }
+
+            return value >= uint.MaxValue ? uint.MaxValue :
+                   value <= uint.MinValue ? uint.MinValue : (uint)value;
+        }
+
+        [UnmanagedCallersOnly]
+        public static ulong SatF32ToU64(float value)
+        {
+            if (float.IsNaN(value))
+            {
+                return 0;
+            }
+
+            return value >= ulong.MaxValue ? ulong.MaxValue :
+                   value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
+        }
+
+        [UnmanagedCallersOnly]
+        public static int SatF64ToS32(double value)
+        {
+            if (double.IsNaN(value))
+            {
+                return 0;
+            }
+
+            return value >= int.MaxValue ? int.MaxValue :
+                   value <= int.MinValue ? int.MinValue : (int)value;
+        }
+
+        [UnmanagedCallersOnly]
+        public static long SatF64ToS64(double value)
+        {
+            if (double.IsNaN(value))
+            {
+                return 0;
+            }
+
+            return value >= long.MaxValue ? long.MaxValue :
+                   value <= long.MinValue ? long.MinValue : (long)value;
+        }
+
+        [UnmanagedCallersOnly]
+        public static uint SatF64ToU32(double value)
+        {
+            if (double.IsNaN(value))
+            {
+                return 0;
+            }
+
+            return value >= uint.MaxValue ? uint.MaxValue :
+                   value <= uint.MinValue ? uint.MinValue : (uint)value;
+        }
+
+        [UnmanagedCallersOnly]
+        public static ulong SatF64ToU64(double value)
+        {
+            if (double.IsNaN(value))
+            {
+                return 0;
+            }
+
+            return value >= ulong.MaxValue ? ulong.MaxValue :
+                   value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
+        }
+        #endregion
+
+        #region "Count"
+        [UnmanagedCallersOnly]
+        public static ulong CountLeadingSigns(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
+        {
+            value ^= value >> 1;
+
+            int highBit = size - 2;
+
+            for (int bit = highBit; bit >= 0; bit--)
+            {
+                if (((int)(value >> bit) & 0b1) != 0)
+                {
+                    return (ulong)(highBit - bit);
+                }
+            }
+
+            return (ulong)(size - 1);
+        }
+
+        private static ReadOnlySpan<byte> ClzNibbleTbl => [4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0];
+
+        [UnmanagedCallersOnly]
+        public static ulong CountLeadingZeros(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
+        {
+            if (value == 0ul)
+            {
+                return (ulong)size;
+            }
+
+            int nibbleIdx = size;
+            int preCount, count = 0;
+
+            do
+            {
+                nibbleIdx -= 4;
+                preCount = ClzNibbleTbl[(int)(value >> nibbleIdx) & 0b1111];
+                count += preCount;
+            }
+            while (preCount == 4);
+
+            return (ulong)count;
+        }
+        #endregion
+
+        #region "Table"
+        [UnmanagedCallersOnly]
+        public static V128 Tbl1(V128 vector, int bytes, V128 tb0)
+        {
+            return TblOrTbx(default, vector, bytes, tb0);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Tbl2(V128 vector, int bytes, V128 tb0, V128 tb1)
+        {
+            return TblOrTbx(default, vector, bytes, tb0, tb1);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Tbl3(V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2)
+        {
+            return TblOrTbx(default, vector, bytes, tb0, tb1, tb2);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Tbl4(V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2, V128 tb3)
+        {
+            return TblOrTbx(default, vector, bytes, tb0, tb1, tb2, tb3);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Tbx1(V128 dest, V128 vector, int bytes, V128 tb0)
+        {
+            return TblOrTbx(dest, vector, bytes, tb0);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Tbx2(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1)
+        {
+            return TblOrTbx(dest, vector, bytes, tb0, tb1);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Tbx3(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2)
+        {
+            return TblOrTbx(dest, vector, bytes, tb0, tb1, tb2);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Tbx4(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2, V128 tb3)
+        {
+            return TblOrTbx(dest, vector, bytes, tb0, tb1, tb2, tb3);
+        }
+
+        private static V128 TblOrTbx(V128 dest, V128 vector, int bytes, params ReadOnlySpan<V128> tb)
+        {
+            byte[] res = new byte[16];
+
+            if (dest != default)
+            {
+                Buffer.BlockCopy(dest.ToArray(), 0, res, 0, bytes);
+            }
+
+            byte[] table = new byte[tb.Length * 16];
+
+            for (byte index = 0; index < tb.Length; index++)
+            {
+                Buffer.BlockCopy(tb[index].ToArray(), 0, table, index * 16, 16);
+            }
+
+            byte[] v = vector.ToArray();
+
+            for (byte index = 0; index < bytes; index++)
+            {
+                byte tblIndex = v[index];
+
+                if (tblIndex < table.Length)
+                {
+                    res[index] = table[tblIndex];
+                }
+            }
+
+            return new V128(res);
+        }
+        #endregion
+
+        #region "Crc32"
+        private const uint Crc32RevPoly = 0xedb88320;
+        private const uint Crc32cRevPoly = 0x82f63b78;
+
+        [UnmanagedCallersOnly]
+        public static uint Crc32b(uint crc, byte value) => Crc32(crc, Crc32RevPoly, value);
+        [UnmanagedCallersOnly]
+        public static uint Crc32h(uint crc, ushort value) => Crc32h(crc, Crc32RevPoly, value);
+        [UnmanagedCallersOnly]
+        public static uint Crc32w(uint crc, uint value) => Crc32w(crc, Crc32RevPoly, value);
+        [UnmanagedCallersOnly]
+        public static uint Crc32x(uint crc, ulong value) => Crc32x(crc, Crc32RevPoly, value);
+
+        [UnmanagedCallersOnly]
+        public static uint Crc32cb(uint crc, byte value) => Crc32(crc, Crc32cRevPoly, value);
+        [UnmanagedCallersOnly]
+        public static uint Crc32ch(uint crc, ushort value) => Crc32h(crc, Crc32cRevPoly, value);
+        [UnmanagedCallersOnly]
+        public static uint Crc32cw(uint crc, uint value) => Crc32w(crc, Crc32cRevPoly, value);
+        [UnmanagedCallersOnly]
+        public static uint Crc32cx(uint crc, ulong value) => Crc32x(crc, Crc32cRevPoly, value);
+
+        private static uint Crc32h(uint crc, uint poly, ushort val)
+        {
+            crc = Crc32(crc, poly, (byte)(val >> 0));
+            crc = Crc32(crc, poly, (byte)(val >> 8));
+
+            return crc;
+        }
+
+        private static uint Crc32w(uint crc, uint poly, uint val)
+        {
+            crc = Crc32(crc, poly, (byte)(val >> 0));
+            crc = Crc32(crc, poly, (byte)(val >> 8));
+            crc = Crc32(crc, poly, (byte)(val >> 16));
+            crc = Crc32(crc, poly, (byte)(val >> 24));
+
+            return crc;
+        }
+
+        private static uint Crc32x(uint crc, uint poly, ulong val)
+        {
+            crc = Crc32(crc, poly, (byte)(val >> 0));
+            crc = Crc32(crc, poly, (byte)(val >> 8));
+            crc = Crc32(crc, poly, (byte)(val >> 16));
+            crc = Crc32(crc, poly, (byte)(val >> 24));
+            crc = Crc32(crc, poly, (byte)(val >> 32));
+            crc = Crc32(crc, poly, (byte)(val >> 40));
+            crc = Crc32(crc, poly, (byte)(val >> 48));
+            crc = Crc32(crc, poly, (byte)(val >> 56));
+
+            return crc;
+        }
+
+        private static uint Crc32(uint crc, uint poly, byte val)
+        {
+            crc ^= val;
+
+            for (int bit = 7; bit >= 0; bit--)
+            {
+                uint mask = (uint)(-(int)(crc & 1));
+
+                crc = (crc >> 1) ^ (poly & mask);
+            }
+
+            return crc;
+        }
+        #endregion
+
+        #region "Aes"
+        [UnmanagedCallersOnly]
+        public static V128 Decrypt(V128 value, V128 roundKey)
+        {
+            return CryptoHelper.AesInvSubBytes(CryptoHelper.AesInvShiftRows(value ^ roundKey));
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Encrypt(V128 value, V128 roundKey)
+        {
+            return CryptoHelper.AesSubBytes(CryptoHelper.AesShiftRows(value ^ roundKey));
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 InverseMixColumns(V128 value)
+        {
+            return CryptoHelper.AesInvMixColumns(value);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 MixColumns(V128 value)
+        {
+            return CryptoHelper.AesMixColumns(value);
+        }
+        #endregion
+
+        #region "Sha1"
+        [UnmanagedCallersOnly]
+        public static V128 HashChoose(V128 hash_abcd, uint hash_e, V128 wk)
+        {
+            for (int e = 0; e <= 3; e++)
+            {
+                uint t = ShaChoose(hash_abcd.Extract<uint>(1),
+                                   hash_abcd.Extract<uint>(2),
+                                   hash_abcd.Extract<uint>(3));
+
+                hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
+
+                t = Rol(hash_abcd.Extract<uint>(1), 30);
+
+                hash_abcd.Insert(1, t);
+
+                Rol32_160(ref hash_e, ref hash_abcd);
+            }
+
+            return hash_abcd;
+        }
+
+        [UnmanagedCallersOnly]
+        public static uint FixedRotate(uint hash_e)
+        {
+            return hash_e.Rol(30);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 HashMajority(V128 hash_abcd, uint hash_e, V128 wk)
+        {
+            for (int e = 0; e <= 3; e++)
+            {
+                uint t = ShaMajority(hash_abcd.Extract<uint>(1),
+                                     hash_abcd.Extract<uint>(2),
+                                     hash_abcd.Extract<uint>(3));
+
+                hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
+
+                t = Rol(hash_abcd.Extract<uint>(1), 30);
+
+                hash_abcd.Insert(1, t);
+
+                Rol32_160(ref hash_e, ref hash_abcd);
+            }
+
+            return hash_abcd;
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 HashParity(V128 hash_abcd, uint hash_e, V128 wk)
+        {
+            for (int e = 0; e <= 3; e++)
+            {
+                uint t = ShaParity(hash_abcd.Extract<uint>(1),
+                                   hash_abcd.Extract<uint>(2),
+                                   hash_abcd.Extract<uint>(3));
+
+                hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
+
+                t = Rol(hash_abcd.Extract<uint>(1), 30);
+
+                hash_abcd.Insert(1, t);
+
+                Rol32_160(ref hash_e, ref hash_abcd);
+            }
+
+            return hash_abcd;
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Sha1SchedulePart1(V128 w0_3, V128 w4_7, V128 w8_11)
+        {
+            ulong t2 = w4_7.Extract<ulong>(0);
+            ulong t1 = w0_3.Extract<ulong>(1);
+
+            V128 result = new(t1, t2);
+
+            return result ^ (w0_3 ^ w8_11);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Sha1SchedulePart2(V128 tw0_3, V128 w12_15)
+        {
+            V128 t = tw0_3 ^ (w12_15 >> 32);
+
+            uint tE0 = t.Extract<uint>(0);
+            uint tE1 = t.Extract<uint>(1);
+            uint tE2 = t.Extract<uint>(2);
+            uint tE3 = t.Extract<uint>(3);
+
+            return new V128(tE0.Rol(1), tE1.Rol(1), tE2.Rol(1), tE3.Rol(1) ^ tE0.Rol(2));
+        }
+
+        private static void Rol32_160(ref uint y, ref V128 x)
+        {
+            uint xE3 = x.Extract<uint>(3);
+
+            x <<= 32;
+            x.Insert(0, y);
+
+            y = xE3;
+        }
+
+        private static uint ShaChoose(uint x, uint y, uint z)
+        {
+            return ((y ^ z) & x) ^ z;
+        }
+
+        private static uint ShaMajority(uint x, uint y, uint z)
+        {
+            return (x & y) | ((x | y) & z);
+        }
+
+        private static uint ShaParity(uint x, uint y, uint z)
+        {
+            return x ^ y ^ z;
+        }
+
+        private static uint Rol(this uint value, int count)
+        {
+            return (value << count) | (value >> (32 - count));
+        }
+        #endregion
+
+        #region "Sha256"
+        [UnmanagedCallersOnly]
+        public static V128 HashLower(V128 hash_abcd, V128 hash_efgh, V128 wk)
+        {
+            return Sha256Hash(hash_abcd, hash_efgh, wk, part1: true);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 HashUpper(V128 hash_abcd, V128 hash_efgh, V128 wk)
+        {
+            return Sha256Hash(hash_abcd, hash_efgh, wk, part1: false);
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Sha256SchedulePart1(V128 w0_3, V128 w4_7)
+        {
+            V128 result = new();
+
+            for (int e = 0; e <= 3; e++)
+            {
+                uint elt = (e <= 2 ? w0_3 : w4_7).Extract<uint>(e <= 2 ? e + 1 : 0);
+
+                elt = elt.Ror(7) ^ elt.Ror(18) ^ elt.Lsr(3);
+
+                elt += w0_3.Extract<uint>(e);
+
+                result.Insert(e, elt);
+            }
+
+            return result;
+        }
+
+        [UnmanagedCallersOnly]
+        public static V128 Sha256SchedulePart2(V128 w0_3, V128 w8_11, V128 w12_15)
+        {
+            V128 result = new();
+
+            ulong t1 = w12_15.Extract<ulong>(1);
+
+            for (int e = 0; e <= 1; e++)
+            {
+                uint elt = t1.ULongPart(e);
+
+                elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
+
+                elt += w0_3.Extract<uint>(e) + w8_11.Extract<uint>(e + 1);
+
+                result.Insert(e, elt);
+            }
+
+            t1 = result.Extract<ulong>(0);
+
+            for (int e = 2; e <= 3; e++)
+            {
+                uint elt = t1.ULongPart(e - 2);
+
+                elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
+
+                elt += w0_3.Extract<uint>(e) + (e == 2 ? w8_11 : w12_15).Extract<uint>(e == 2 ? 3 : 0);
+
+                result.Insert(e, elt);
+            }
+
+            return result;
+        }
+
+        private static V128 Sha256Hash(V128 x, V128 y, V128 w, bool part1)
+        {
+            for (int e = 0; e <= 3; e++)
+            {
+                uint chs = ShaChoose(y.Extract<uint>(0),
+                                     y.Extract<uint>(1),
+                                     y.Extract<uint>(2));
+
+                uint maj = ShaMajority(x.Extract<uint>(0),
+                                       x.Extract<uint>(1),
+                                       x.Extract<uint>(2));
+
+                uint t1 = y.Extract<uint>(3) + ShaHashSigma1(y.Extract<uint>(0)) + chs + w.Extract<uint>(e);
+
+                uint t2 = t1 + x.Extract<uint>(3);
+
+                x.Insert(3, t2);
+
+                t2 = t1 + ShaHashSigma0(x.Extract<uint>(0)) + maj;
+
+                y.Insert(3, t2);
+
+                Rol32_256(ref y, ref x);
+            }
+
+            return part1 ? x : y;
+        }
+
+        private static void Rol32_256(ref V128 y, ref V128 x)
+        {
+            uint yE3 = y.Extract<uint>(3);
+            uint xE3 = x.Extract<uint>(3);
+
+            y <<= 32;
+            x <<= 32;
+
+            y.Insert(0, xE3);
+            x.Insert(0, yE3);
+        }
+
+        private static uint ShaHashSigma0(uint x)
+        {
+            return x.Ror(2) ^ x.Ror(13) ^ x.Ror(22);
+        }
+
+        private static uint ShaHashSigma1(uint x)
+        {
+            return x.Ror(6) ^ x.Ror(11) ^ x.Ror(25);
+        }
+
+        private static uint Ror(this uint value, int count)
+        {
+            return (value >> count) | (value << (32 - count));
+        }
+
+        private static uint Lsr(this uint value, int count)
+        {
+            return value >> count;
+        }
+
+        private static uint ULongPart(this ulong value, int part)
+        {
+            return part == 0
+                ? (uint)(value & 0xFFFFFFFFUL)
+                : (uint)(value >> 32);
+        }
+        #endregion
+
+        [UnmanagedCallersOnly]
+        public static V128 PolynomialMult64_128(ulong op1, ulong op2)
+        {
+            V128 result = V128.Zero;
+
+            V128 op2_128 = new(op2, 0);
+
+            for (int i = 0; i < 64; i++)
+            {
+                if (((op1 >> i) & 1) == 1)
+                {
+                    result ^= op2_128 << i;
+                }
+            }
+
+            return result;
+        }
+    }
+}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Aes.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Aes.cs
@@ -1,32 +0,0 @@
-using ARMeilleure.State;
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        [UnmanagedCallersOnly]
-        public static V128 Decrypt(V128 value, V128 roundKey)
-        {
-            return CryptoHelper.AesInvSubBytes(CryptoHelper.AesInvShiftRows(value ^ roundKey));
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Encrypt(V128 value, V128 roundKey)
-        {
-            return CryptoHelper.AesSubBytes(CryptoHelper.AesShiftRows(value ^ roundKey));
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 InverseMixColumns(V128 value)
-        {
-            return CryptoHelper.AesInvMixColumns(value);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 MixColumns(V128 value)
-        {
-            return CryptoHelper.AesMixColumns(value);
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Count.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Count.cs
@@ -1,50 +0,0 @@
-using System;
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        [UnmanagedCallersOnly]
-        public static ulong CountLeadingSigns(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
-        {
-            value ^= value >> 1;
-
-            int highBit = size - 2;
-
-            for (int bit = highBit; bit >= 0; bit--)
-            {
-                if (((int)(value >> bit) & 0b1) != 0)
-                {
-                    return (ulong)(highBit - bit);
-                }
-            }
-
-            return (ulong)(size - 1);
-        }
-
-        private static ReadOnlySpan<byte> ClzNibbleTbl => [4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0];
-
-        [UnmanagedCallersOnly]
-        public static ulong CountLeadingZeros(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
-        {
-            if (value == 0ul)
-            {
-                return (ulong)size;
-            }
-
-            int nibbleIdx = size;
-            int preCount, count = 0;
-
-            do
-            {
-                nibbleIdx -= 4;
-                preCount = ClzNibbleTbl[(int)(value >> nibbleIdx) & 0b1111];
-                count += preCount;
-            }
-            while (preCount == 4);
-
-            return (ulong)count;
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Crc32.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Crc32.cs
@@ -1,74 +0,0 @@
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        private const uint Crc32RevPoly = 0xedb88320;
-        private const uint Crc32cRevPoly = 0x82f63b78;
-
-        [UnmanagedCallersOnly]
-        public static uint Crc32b(uint crc, byte value) => Crc32(crc, Crc32RevPoly, value);
-        [UnmanagedCallersOnly]
-        public static uint Crc32h(uint crc, ushort value) => Crc32h(crc, Crc32RevPoly, value);
-        [UnmanagedCallersOnly]
-        public static uint Crc32w(uint crc, uint value) => Crc32w(crc, Crc32RevPoly, value);
-        [UnmanagedCallersOnly]
-        public static uint Crc32x(uint crc, ulong value) => Crc32x(crc, Crc32RevPoly, value);
-
-        [UnmanagedCallersOnly]
-        public static uint Crc32cb(uint crc, byte value) => Crc32(crc, Crc32cRevPoly, value);
-        [UnmanagedCallersOnly]
-        public static uint Crc32ch(uint crc, ushort value) => Crc32h(crc, Crc32cRevPoly, value);
-        [UnmanagedCallersOnly]
-        public static uint Crc32cw(uint crc, uint value) => Crc32w(crc, Crc32cRevPoly, value);
-        [UnmanagedCallersOnly]
-        public static uint Crc32cx(uint crc, ulong value) => Crc32x(crc, Crc32cRevPoly, value);
-
-        private static uint Crc32h(uint crc, uint poly, ushort val)
-        {
-            crc = Crc32(crc, poly, (byte)(val >> 0));
-            crc = Crc32(crc, poly, (byte)(val >> 8));
-
-            return crc;
-        }
-
-        private static uint Crc32w(uint crc, uint poly, uint val)
-        {
-            crc = Crc32(crc, poly, (byte)(val >> 0));
-            crc = Crc32(crc, poly, (byte)(val >> 8));
-            crc = Crc32(crc, poly, (byte)(val >> 16));
-            crc = Crc32(crc, poly, (byte)(val >> 24));
-
-            return crc;
-        }
-
-        private static uint Crc32x(uint crc, uint poly, ulong val)
-        {
-            crc = Crc32(crc, poly, (byte)(val >> 0));
-            crc = Crc32(crc, poly, (byte)(val >> 8));
-            crc = Crc32(crc, poly, (byte)(val >> 16));
-            crc = Crc32(crc, poly, (byte)(val >> 24));
-            crc = Crc32(crc, poly, (byte)(val >> 32));
-            crc = Crc32(crc, poly, (byte)(val >> 40));
-            crc = Crc32(crc, poly, (byte)(val >> 48));
-            crc = Crc32(crc, poly, (byte)(val >> 56));
-
-            return crc;
-        }
-
-        private static uint Crc32(uint crc, uint poly, byte val)
-        {
-            crc ^= val;
-
-            for (int bit = 7; bit >= 0; bit--)
-            {
-                uint mask = (uint)(-(int)(crc & 1));
-
-                crc = (crc >> 1) ^ (poly & mask);
-            }
-
-            return crc;
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Saturation.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Saturation.cs
@@ -1,103 +0,0 @@
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        [UnmanagedCallersOnly]
-        public static int SatF32ToS32(float value)
-        {
-            if (float.IsNaN(value))
-            {
-                return 0;
-            }
-
-            return value >= int.MaxValue ? int.MaxValue :
-                value <= int.MinValue ? int.MinValue : (int)value;
-        }
-
-        [UnmanagedCallersOnly]
-        public static long SatF32ToS64(float value)
-        {
-            if (float.IsNaN(value))
-            {
-                return 0;
-            }
-
-            return value >= long.MaxValue ? long.MaxValue :
-                value <= long.MinValue ? long.MinValue : (long)value;
-        }
-
-        [UnmanagedCallersOnly]
-        public static uint SatF32ToU32(float value)
-        {
-            if (float.IsNaN(value))
-            {
-                return 0;
-            }
-
-            return value >= uint.MaxValue ? uint.MaxValue :
-                value <= uint.MinValue ? uint.MinValue : (uint)value;
-        }
-
-        [UnmanagedCallersOnly]
-        public static ulong SatF32ToU64(float value)
-        {
-            if (float.IsNaN(value))
-            {
-                return 0;
-            }
-
-            return value >= ulong.MaxValue ? ulong.MaxValue :
-                value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
-        }
-
-        [UnmanagedCallersOnly]
-        public static int SatF64ToS32(double value)
-        {
-            if (double.IsNaN(value))
-            {
-                return 0;
-            }
-
-            return value >= int.MaxValue ? int.MaxValue :
-                value <= int.MinValue ? int.MinValue : (int)value;
-        }
-
-        [UnmanagedCallersOnly]
-        public static long SatF64ToS64(double value)
-        {
-            if (double.IsNaN(value))
-            {
-                return 0;
-            }
-
-            return value >= long.MaxValue ? long.MaxValue :
-                value <= long.MinValue ? long.MinValue : (long)value;
-        }
-
-        [UnmanagedCallersOnly]
-        public static uint SatF64ToU32(double value)
-        {
-            if (double.IsNaN(value))
-            {
-                return 0;
-            }
-
-            return value >= uint.MaxValue ? uint.MaxValue :
-                value <= uint.MinValue ? uint.MinValue : (uint)value;
-        }
-
-        [UnmanagedCallersOnly]
-        public static ulong SatF64ToU64(double value)
-        {
-            if (double.IsNaN(value))
-            {
-                return 0;
-            }
-
-            return value >= ulong.MaxValue ? ulong.MaxValue :
-                value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Sha1.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Sha1.cs
@@ -1,131 +0,0 @@
-using ARMeilleure.State;
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        [UnmanagedCallersOnly]
-        public static V128 HashChoose(V128 hash_abcd, uint hash_e, V128 wk)
-        {
-            for (int e = 0; e <= 3; e++)
-            {
-                uint t = ShaChoose(hash_abcd.Extract<uint>(1),
-                                   hash_abcd.Extract<uint>(2),
-                                   hash_abcd.Extract<uint>(3));
-
-                hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
-
-                t = Rol(hash_abcd.Extract<uint>(1), 30);
-
-                hash_abcd.Insert(1, t);
-
-                Rol32_160(ref hash_e, ref hash_abcd);
-            }
-
-            return hash_abcd;
-        }
-
-        [UnmanagedCallersOnly]
-        public static uint FixedRotate(uint hash_e)
-        {
-            return hash_e.Rol(30);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 HashMajority(V128 hash_abcd, uint hash_e, V128 wk)
-        {
-            for (int e = 0; e <= 3; e++)
-            {
-                uint t = ShaMajority(hash_abcd.Extract<uint>(1),
-                                     hash_abcd.Extract<uint>(2),
-                                     hash_abcd.Extract<uint>(3));
-
-                hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
-
-                t = Rol(hash_abcd.Extract<uint>(1), 30);
-
-                hash_abcd.Insert(1, t);
-
-                Rol32_160(ref hash_e, ref hash_abcd);
-            }
-
-            return hash_abcd;
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 HashParity(V128 hash_abcd, uint hash_e, V128 wk)
-        {
-            for (int e = 0; e <= 3; e++)
-            {
-                uint t = ShaParity(hash_abcd.Extract<uint>(1),
-                                   hash_abcd.Extract<uint>(2),
-                                   hash_abcd.Extract<uint>(3));
-
-                hash_e += Rol(hash_abcd.Extract<uint>(0), 5) + t + wk.Extract<uint>(e);
-
-                t = Rol(hash_abcd.Extract<uint>(1), 30);
-
-                hash_abcd.Insert(1, t);
-
-                Rol32_160(ref hash_e, ref hash_abcd);
-            }
-
-            return hash_abcd;
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Sha1SchedulePart1(V128 w0_3, V128 w4_7, V128 w8_11)
-        {
-            ulong t2 = w4_7.Extract<ulong>(0);
-            ulong t1 = w0_3.Extract<ulong>(1);
-
-            V128 result = new(t1, t2);
-
-            return result ^ (w0_3 ^ w8_11);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Sha1SchedulePart2(V128 tw0_3, V128 w12_15)
-        {
-            V128 t = tw0_3 ^ (w12_15 >> 32);
-
-            uint tE0 = t.Extract<uint>(0);
-            uint tE1 = t.Extract<uint>(1);
-            uint tE2 = t.Extract<uint>(2);
-            uint tE3 = t.Extract<uint>(3);
-
-            return new V128(tE0.Rol(1), tE1.Rol(1), tE2.Rol(1), tE3.Rol(1) ^ tE0.Rol(2));
-        }
-
-        private static void Rol32_160(ref uint y, ref V128 x)
-        {
-            uint xE3 = x.Extract<uint>(3);
-
-            x <<= 32;
-            x.Insert(0, y);
-
-            y = xE3;
-        }
-
-        private static uint ShaChoose(uint x, uint y, uint z)
-        {
-            return ((y ^ z) & x) ^ z;
-        }
-
-        private static uint ShaMajority(uint x, uint y, uint z)
-        {
-            return (x & y) | ((x | y) & z);
-        }
-
-        private static uint ShaParity(uint x, uint y, uint z)
-        {
-            return x ^ y ^ z;
-        }
-
-        private static uint Rol(this uint value, int count)
-        {
-            return (value << count) | (value >> (32 - count));
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Sha256.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Sha256.cs
@@ -1,140 +0,0 @@
-using ARMeilleure.State;
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        [UnmanagedCallersOnly]
-        public static V128 HashLower(V128 hash_abcd, V128 hash_efgh, V128 wk)
-        {
-            return Sha256Hash(hash_abcd, hash_efgh, wk, part1: true);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 HashUpper(V128 hash_abcd, V128 hash_efgh, V128 wk)
-        {
-            return Sha256Hash(hash_abcd, hash_efgh, wk, part1: false);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Sha256SchedulePart1(V128 w0_3, V128 w4_7)
-        {
-            V128 result = new();
-
-            for (int e = 0; e <= 3; e++)
-            {
-                uint elt = (e <= 2 ? w0_3 : w4_7).Extract<uint>(e <= 2 ? e + 1 : 0);
-
-                elt = elt.Ror(7) ^ elt.Ror(18) ^ elt.Lsr(3);
-
-                elt += w0_3.Extract<uint>(e);
-
-                result.Insert(e, elt);
-            }
-
-            return result;
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Sha256SchedulePart2(V128 w0_3, V128 w8_11, V128 w12_15)
-        {
-            V128 result = new();
-
-            ulong t1 = w12_15.Extract<ulong>(1);
-
-            for (int e = 0; e <= 1; e++)
-            {
-                uint elt = t1.ULongPart(e);
-
-                elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
-
-                elt += w0_3.Extract<uint>(e) + w8_11.Extract<uint>(e + 1);
-
-                result.Insert(e, elt);
-            }
-
-            t1 = result.Extract<ulong>(0);
-
-            for (int e = 2; e <= 3; e++)
-            {
-                uint elt = t1.ULongPart(e - 2);
-
-                elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
-
-                elt += w0_3.Extract<uint>(e) + (e == 2 ? w8_11 : w12_15).Extract<uint>(e == 2 ? 3 : 0);
-
-                result.Insert(e, elt);
-            }
-
-            return result;
-        }
-
-        private static V128 Sha256Hash(V128 x, V128 y, V128 w, bool part1)
-        {
-            for (int e = 0; e <= 3; e++)
-            {
-                uint chs = ShaChoose(y.Extract<uint>(0),
-                                     y.Extract<uint>(1),
-                                     y.Extract<uint>(2));
-
-                uint maj = ShaMajority(x.Extract<uint>(0),
-                                       x.Extract<uint>(1),
-                                       x.Extract<uint>(2));
-
-                uint t1 = y.Extract<uint>(3) + ShaHashSigma1(y.Extract<uint>(0)) + chs + w.Extract<uint>(e);
-
-                uint t2 = t1 + x.Extract<uint>(3);
-
-                x.Insert(3, t2);
-
-                t2 = t1 + ShaHashSigma0(x.Extract<uint>(0)) + maj;
-
-                y.Insert(3, t2);
-
-                Rol32_256(ref y, ref x);
-            }
-
-            return part1 ? x : y;
-        }
-
-        private static void Rol32_256(ref V128 y, ref V128 x)
-        {
-            uint yE3 = y.Extract<uint>(3);
-            uint xE3 = x.Extract<uint>(3);
-
-            y <<= 32;
-            x <<= 32;
-
-            y.Insert(0, xE3);
-            x.Insert(0, yE3);
-        }
-
-        private static uint ShaHashSigma0(uint x)
-        {
-            return x.Ror(2) ^ x.Ror(13) ^ x.Ror(22);
-        }
-
-        private static uint ShaHashSigma1(uint x)
-        {
-            return x.Ror(6) ^ x.Ror(11) ^ x.Ror(25);
-        }
-
-        private static uint Ror(this uint value, int count)
-        {
-            return (value >> count) | (value << (32 - count));
-        }
-
-        private static uint Lsr(this uint value, int count)
-        {
-            return value >> count;
-        }
-
-        private static uint ULongPart(this ulong value, int part)
-        {
-            return part == 0
-                ? (uint)(value & 0xFFFFFFFFUL)
-                : (uint)(value >> 32);
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.ShrImm64.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.ShrImm64.cs
@@ -1,93 +0,0 @@
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        [UnmanagedCallersOnly]
-        public static long SignedShrImm64(long value, long roundConst, int shift)
-        {
-            if (roundConst == 0L)
-            {
-                if (shift <= 63)
-                {
-                    return value >> shift;
-                }
-                else /* if (shift == 64) */
-                {
-                    if (value < 0L)
-                    {
-                        return -1L;
-                    }
-                    else /* if (value >= 0L) */
-                    {
-                        return 0L;
-                    }
-                }
-            }
-            else /* if (roundConst == 1L << (shift - 1)) */
-            {
-                if (shift <= 63)
-                {
-                    long add = value + roundConst;
-
-                    if ((~value & (value ^ add)) < 0L)
-                    {
-                        return (long)((ulong)add >> shift);
-                    }
-                    else
-                    {
-                        return add >> shift;
-                    }
-                }
-                else /* if (shift == 64) */
-                {
-                    return 0L;
-                }
-            }
-        }
-
-        [UnmanagedCallersOnly]
-        public static ulong UnsignedShrImm64(ulong value, long roundConst, int shift)
-        {
-            if (roundConst == 0L)
-            {
-                if (shift <= 63)
-                {
-                    return value >> shift;
-                }
-                else /* if (shift == 64) */
-                {
-                    return 0UL;
-                }
-            }
-            else /* if (roundConst == 1L << (shift - 1)) */
-            {
-                ulong add = value + (ulong)roundConst;
-
-                if ((add < value) && (add < (ulong)roundConst))
-                {
-                    if (shift <= 63)
-                    {
-                        return (add >> shift) | (0x8000000000000000UL >> (shift - 1));
-                    }
-                    else /* if (shift == 64) */
-                    {
-                        return 1UL;
-                    }
-                }
-                else
-                {
-                    if (shift <= 63)
-                    {
-                        return add >> shift;
-                    }
-                    else /* if (shift == 64) */
-                    {
-                        return 0UL;
-                    }
-                }
-            }
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Table.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.Table.cs
@@ -1,88 +0,0 @@
-using ARMeilleure.State;
-using System;
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        [UnmanagedCallersOnly]
-        public static V128 Tbl1(V128 vector, int bytes, V128 tb0)
-        {
-            return TblOrTbx(default, vector, bytes, tb0);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Tbl2(V128 vector, int bytes, V128 tb0, V128 tb1)
-        {
-            return TblOrTbx(default, vector, bytes, tb0, tb1);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Tbl3(V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2)
-        {
-            return TblOrTbx(default, vector, bytes, tb0, tb1, tb2);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Tbl4(V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2, V128 tb3)
-        {
-            return TblOrTbx(default, vector, bytes, tb0, tb1, tb2, tb3);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Tbx1(V128 dest, V128 vector, int bytes, V128 tb0)
-        {
-            return TblOrTbx(dest, vector, bytes, tb0);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Tbx2(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1)
-        {
-            return TblOrTbx(dest, vector, bytes, tb0, tb1);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Tbx3(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2)
-        {
-            return TblOrTbx(dest, vector, bytes, tb0, tb1, tb2);
-        }
-
-        [UnmanagedCallersOnly]
-        public static V128 Tbx4(V128 dest, V128 vector, int bytes, V128 tb0, V128 tb1, V128 tb2, V128 tb3)
-        {
-            return TblOrTbx(dest, vector, bytes, tb0, tb1, tb2, tb3);
-        }
-
-        private static V128 TblOrTbx(V128 dest, V128 vector, int bytes, params ReadOnlySpan<V128> tb)
-        {
-            byte[] res = new byte[16];
-
-            if (dest != default)
-            {
-                Buffer.BlockCopy(dest.ToArray(), 0, res, 0, bytes);
-            }
-
-            byte[] table = new byte[tb.Length * 16];
-
-            for (byte index = 0; index < tb.Length; index++)
-            {
-                Buffer.BlockCopy(tb[index].ToArray(), 0, table, index * 16, 16);
-            }
-
-            byte[] v = vector.ToArray();
-
-            for (byte index = 0; index < bytes; index++)
-            {
-                byte tblIndex = v[index];
-
-                if (tblIndex < table.Length)
-                {
-                    res[index] = table[tblIndex];
-                }
-            }
-
-            return new V128(res);
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.cs
+++ b/src/ARMeilleure/Instructions/SoftFallback/SoftFallback.cs
@@ -1,26 +0,0 @@
-using ARMeilleure.State;
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static partial class SoftFallback
-    {
-        [UnmanagedCallersOnly]
-        public static V128 PolynomialMult64_128(ulong op1, ulong op2)
-        {
-            V128 result = V128.Zero;
-
-            V128 op2_128 = new(op2, 0);
-
-            for (int i = 0; i < 64; i++)
-            {
-                if (((op1 >> i) & 1) == 1)
-                {
-                    result ^= op2_128 << i;
-                }
-            }
-
-            return result;
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFloat.cs
+++ b/src/ARMeilleure/Instructions/SoftFloat.cs
--- a/src/ARMeilleure/Instructions/SoftFloat/SoftFloat.cs
+++ b/src/ARMeilleure/Instructions/SoftFloat/SoftFloat.cs
@@ -1,111 +0,0 @@
-using ARMeilleure.State;
-using System;
-using System.Diagnostics;
-
-namespace ARMeilleure.Instructions
-{
-    static class SoftFloat
-    {
-        static SoftFloat()
-        {
-            RecipEstimateTable = BuildRecipEstimateTable();
-            RecipSqrtEstimateTable = BuildRecipSqrtEstimateTable();
-        }
-
-        public static readonly byte[] RecipEstimateTable;
-        public static readonly byte[] RecipSqrtEstimateTable;
-
-        private static byte[] BuildRecipEstimateTable()
-        {
-            byte[] tbl = new byte[256];
-
-            for (int idx = 0; idx < 256; idx++)
-            {
-                uint src = (uint)idx + 256u;
-
-                Debug.Assert(src is >= 256u and < 512u);
-
-                src = (src << 1) + 1u;
-
-                uint aux = (1u << 19) / src;
-
-                uint dst = (aux + 1u) >> 1;
-
-                Debug.Assert(dst is >= 256u and < 512u);
-
-                tbl[idx] = (byte)(dst - 256u);
-            }
-
-            return tbl;
-        }
-
-        private static byte[] BuildRecipSqrtEstimateTable()
-        {
-            byte[] tbl = new byte[384];
-
-            for (int idx = 0; idx < 384; idx++)
-            {
-                uint src = (uint)idx + 128u;
-
-                Debug.Assert(src is >= 128u and < 512u);
-
-                if (src < 256u)
-                {
-                    src = (src << 1) + 1u;
-                }
-                else
-                {
-                    src = (src >> 1) << 1;
-                    src = (src + 1u) << 1;
-                }
-
-                uint aux = 512u;
-
-                while (src * (aux + 1u) * (aux + 1u) < (1u << 28))
-                {
-                    aux++;
-                }
-
-                uint dst = (aux + 1u) >> 1;
-
-                Debug.Assert(dst is >= 256u and < 512u);
-
-                tbl[idx] = (byte)(dst - 256u);
-            }
-
-            return tbl;
-        }
-
-        public static void FPProcessException(FPException exc, ExecutionContext context)
-        {
-            FPProcessException(exc, context, context.Fpcr);
-        }
-
-        public static void FPProcessException(FPException exc, ExecutionContext context, FPCR fpcr)
-        {
-            int enable = (int)exc + 8;
-
-            if ((fpcr & (FPCR)(1 << enable)) != 0)
-            {
-                throw new NotImplementedException("Floating-point trap handling.");
-            }
-            else
-            {
-                context.Fpsr |= (FPSR)(1 << (int)exc);
-            }
-        }
-
-        extension(FPCR fpcr)
-        {
-            public FPRoundingMode RoundingMode 
-            {
-                get 
-                {
-                    const int RModeShift = 22;
-                    
-                    return (FPRoundingMode)(((uint)fpcr >> RModeShift) & 3u);
-                }
-            }
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFloat/SoftFloat16.cs
+++ b/src/ARMeilleure/Instructions/SoftFloat/SoftFloat16.cs
@@ -1,212 +0,0 @@
-using ARMeilleure.State;
-using System;
-
-namespace ARMeilleure.Instructions
-{
-    static class SoftFloat16
-    {
-        public static ushort FPDefaultNaN()
-        {
-            return (ushort)0x7E00u;
-        }
-
-        public static ushort FPInfinity(bool sign)
-        {
-            return sign ? (ushort)0xFC00u : (ushort)0x7C00u;
-        }
-
-        public static ushort FPZero(bool sign)
-        {
-            return sign ? (ushort)0x8000u : (ushort)0x0000u;
-        }
-
-        public static ushort FPMaxNormal(bool sign)
-        {
-            return sign ? (ushort)0xFBFFu : (ushort)0x7BFFu;
-        }
-
-        public static double FPUnpackCv(
-            this ushort valueBits,
-            out FPType type,
-            out bool sign,
-            ExecutionContext context)
-        {
-            sign = (~(uint)valueBits & 0x8000u) == 0u;
-
-            uint exp16 = ((uint)valueBits & 0x7C00u) >> 10;
-            uint frac16 = (uint)valueBits & 0x03FFu;
-
-            double real;
-
-            if (exp16 == 0u)
-            {
-                if (frac16 == 0u)
-                {
-                    type = FPType.Zero;
-                    real = 0d;
-                }
-                else
-                {
-                    type = FPType.Nonzero; // Subnormal.
-                    real = Math.Pow(2d, -14) * ((double)frac16 * Math.Pow(2d, -10));
-                }
-            }
-            else if (exp16 == 0x1Fu && (context.Fpcr & FPCR.Ahp) == 0)
-            {
-                if (frac16 == 0u)
-                {
-                    type = FPType.Infinity;
-                    real = Math.Pow(2d, 1000);
-                }
-                else
-                {
-                    type = (~frac16 & 0x0200u) == 0u ? FPType.QNaN : FPType.SNaN;
-                    real = 0d;
-                }
-            }
-            else
-            {
-                type = FPType.Nonzero; // Normal.
-                real = Math.Pow(2d, (int)exp16 - 15) * (1d + (double)frac16 * Math.Pow(2d, -10));
-            }
-
-            return sign ? -real : real;
-        }
-
-        public static ushort FPRoundCv(double real, ExecutionContext context)
-        {
-            const int MinimumExp = -14;
-
-            const int E = 5;
-            const int F = 10;
-
-            bool sign;
-            double mantissa;
-
-            if (real < 0d)
-            {
-                sign = true;
-                mantissa = -real;
-            }
-            else
-            {
-                sign = false;
-                mantissa = real;
-            }
-
-            int exponent = 0;
-
-            while (mantissa < 1d)
-            {
-                mantissa *= 2d;
-                exponent--;
-            }
-
-            while (mantissa >= 2d)
-            {
-                mantissa /= 2d;
-                exponent++;
-            }
-
-            uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
-
-            if (biasedExp == 0u)
-            {
-                mantissa /= Math.Pow(2d, MinimumExp - exponent);
-            }
-
-            uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, F));
-            double error = mantissa * Math.Pow(2d, F) - (double)intMant;
-
-            if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
-            {
-                SoftFloat.FPProcessException(FPException.Underflow, context);
-            }
-
-            bool overflowToInf;
-            bool roundUp;
-
-            switch (context.Fpcr.RoundingMode)
-            {
-                case FPRoundingMode.ToNearest:
-                    roundUp = (error > 0.5d || (error == 0.5d && (intMant & 1u) == 1u));
-                    overflowToInf = true;
-                    break;
-
-                case FPRoundingMode.TowardsPlusInfinity:
-                    roundUp = (error != 0d && !sign);
-                    overflowToInf = !sign;
-                    break;
-
-                case FPRoundingMode.TowardsMinusInfinity:
-                    roundUp = (error != 0d && sign);
-                    overflowToInf = sign;
-                    break;
-
-                case FPRoundingMode.TowardsZero:
-                    roundUp = false;
-                    overflowToInf = false;
-                    break;
-
-                default:
-                    throw new ArgumentException($"Invalid rounding mode \"{context.Fpcr.RoundingMode}\".");
-            }
-
-            if (roundUp)
-            {
-                intMant++;
-
-                if (intMant == 1u << F)
-                {
-                    biasedExp = 1u;
-                }
-
-                if (intMant == 1u << (F + 1))
-                {
-                    biasedExp++;
-                    intMant >>= 1;
-                }
-            }
-
-            ushort resultBits;
-
-            if ((context.Fpcr & FPCR.Ahp) == 0)
-            {
-                if (biasedExp >= (1u << E) - 1u)
-                {
-                    resultBits = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign);
-
-                    SoftFloat.FPProcessException(FPException.Overflow, context);
-
-                    error = 1d;
-                }
-                else
-                {
-                    resultBits = (ushort)((sign ? 1u : 0u) << 15 | (biasedExp & 0x1Fu) << 10 | (intMant & 0x03FFu));
-                }
-            }
-            else
-            {
-                if (biasedExp >= 1u << E)
-                {
-                    resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
-
-                    SoftFloat.FPProcessException(FPException.InvalidOp, context);
-
-                    error = 0d;
-                }
-                else
-                {
-                    resultBits = (ushort)((sign ? 1u : 0u) << 15 | (biasedExp & 0x1Fu) << 10 | (intMant & 0x03FFu));
-                }
-            }
-
-            if (error != 0d)
-            {
-                SoftFloat.FPProcessException(FPException.Inexact, context);
-            }
-
-            return resultBits;
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFloat/SoftFloat16_32.cs
+++ b/src/ARMeilleure/Instructions/SoftFloat/SoftFloat16_32.cs
@@ -1,182 +0,0 @@
-using ARMeilleure.State;
-using System;
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static class SoftFloat16_32
-    {
-        [UnmanagedCallersOnly]
-        public static float FPConvert(ushort valueBits)
-        {
-            ExecutionContext context = NativeInterface.GetContext();
-
-            double real = valueBits.FPUnpackCv(out FPType type, out bool sign, context);
-
-            float result;
-
-            if (type is FPType.SNaN or FPType.QNaN)
-            {
-                if ((context.Fpcr & FPCR.Dn) != 0)
-                {
-                    result = SoftFloat32.FPDefaultNaN();
-                }
-                else
-                {
-                    result = FPConvertNaN(valueBits);
-                }
-
-                if (type == FPType.SNaN)
-                {
-                    SoftFloat.FPProcessException(FPException.InvalidOp, context);
-                }
-            }
-            else if (type == FPType.Infinity)
-            {
-                result = SoftFloat32.FPInfinity(sign);
-            }
-            else if (type == FPType.Zero)
-            {
-                result = SoftFloat32.FPZero(sign);
-            }
-            else
-            {
-                result = FPRoundCv(real, context);
-            }
-
-            return result;
-        }
-
-        private static float FPRoundCv(double real, ExecutionContext context)
-        {
-            const int MinimumExp = -126;
-
-            const int E = 8;
-            const int F = 23;
-
-            bool sign;
-            double mantissa;
-
-            if (real < 0d)
-            {
-                sign = true;
-                mantissa = -real;
-            }
-            else
-            {
-                sign = false;
-                mantissa = real;
-            }
-
-            int exponent = 0;
-
-            while (mantissa < 1d)
-            {
-                mantissa *= 2d;
-                exponent--;
-            }
-
-            while (mantissa >= 2d)
-            {
-                mantissa /= 2d;
-                exponent++;
-            }
-
-            if ((context.Fpcr & FPCR.Fz) != 0 && exponent < MinimumExp)
-            {
-                context.Fpsr |= FPSR.Ufc;
-
-                return SoftFloat32.FPZero(sign);
-            }
-
-            uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
-
-            if (biasedExp == 0u)
-            {
-                mantissa /= Math.Pow(2d, MinimumExp - exponent);
-            }
-
-            uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, F));
-            double error = mantissa * Math.Pow(2d, F) - (double)intMant;
-
-            if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
-            {
-                SoftFloat.FPProcessException(FPException.Underflow, context);
-            }
-
-            bool overflowToInf;
-            bool roundUp;
-
-            switch (context.Fpcr.RoundingMode)
-            {
-                case FPRoundingMode.ToNearest:
-                    roundUp = (error > 0.5d || (error == 0.5d && (intMant & 1u) == 1u));
-                    overflowToInf = true;
-                    break;
-
-                case FPRoundingMode.TowardsPlusInfinity:
-                    roundUp = (error != 0d && !sign);
-                    overflowToInf = !sign;
-                    break;
-
-                case FPRoundingMode.TowardsMinusInfinity:
-                    roundUp = (error != 0d && sign);
-                    overflowToInf = sign;
-                    break;
-
-                case FPRoundingMode.TowardsZero:
-                    roundUp = false;
-                    overflowToInf = false;
-                    break;
-
-                default:
-                    throw new ArgumentException($"Invalid rounding mode \"{context.Fpcr.RoundingMode}\".");
-            }
-
-            if (roundUp)
-            {
-                intMant++;
-
-                if (intMant == 1u << F)
-                {
-                    biasedExp = 1u;
-                }
-
-                if (intMant == 1u << (F + 1))
-                {
-                    biasedExp++;
-                    intMant >>= 1;
-                }
-            }
-
-            float result;
-
-            if (biasedExp >= (1u << E) - 1u)
-            {
-                result = overflowToInf ? SoftFloat32.FPInfinity(sign) : SoftFloat32.FPMaxNormal(sign);
-
-                SoftFloat.FPProcessException(FPException.Overflow, context);
-
-                error = 1d;
-            }
-            else
-            {
-                result = BitConverter.Int32BitsToSingle(
-                    (int)((sign ? 1u : 0u) << 31 | (biasedExp & 0xFFu) << 23 | (intMant & 0x007FFFFFu)));
-            }
-
-            if (error != 0d)
-            {
-                SoftFloat.FPProcessException(FPException.Inexact, context);
-            }
-
-            return result;
-        }
-
-        private static float FPConvertNaN(ushort valueBits)
-        {
-            return BitConverter.Int32BitsToSingle(
-                (int)(((uint)valueBits & 0x8000u) << 16 | 0x7FC00000u | ((uint)valueBits & 0x01FFu) << 13));
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFloat/SoftFloat16_64.cs
+++ b/src/ARMeilleure/Instructions/SoftFloat/SoftFloat16_64.cs
@@ -1,182 +0,0 @@
-using ARMeilleure.State;
-using System;
-using System.Runtime.InteropServices;
-
-namespace ARMeilleure.Instructions
-{
-    static class SoftFloat16_64
-    {
-        [UnmanagedCallersOnly]
-        public static double FPConvert(ushort valueBits)
-        {
-            ExecutionContext context = NativeInterface.GetContext();
-
-            double real = valueBits.FPUnpackCv(out FPType type, out bool sign, context);
-
-            double result;
-
-            if (type is FPType.SNaN or FPType.QNaN)
-            {
-                if ((context.Fpcr & FPCR.Dn) != 0)
-                {
-                    result = SoftFloat64.FPDefaultNaN();
-                }
-                else
-                {
-                    result = FPConvertNaN(valueBits);
-                }
-
-                if (type == FPType.SNaN)
-                {
-                    SoftFloat.FPProcessException(FPException.InvalidOp, context);
-                }
-            }
-            else if (type == FPType.Infinity)
-            {
-                result = SoftFloat64.FPInfinity(sign);
-            }
-            else if (type == FPType.Zero)
-            {
-                result = SoftFloat64.FPZero(sign);
-            }
-            else
-            {
-                result = FPRoundCv(real, context);
-            }
-
-            return result;
-        }
-
-        private static double FPRoundCv(double real, ExecutionContext context)
-        {
-            const int MinimumExp = -1022;
-
-            const int E = 11;
-            const int F = 52;
-
-            bool sign;
-            double mantissa;
-
-            if (real < 0d)
-            {
-                sign = true;
-                mantissa = -real;
-            }
-            else
-            {
-                sign = false;
-                mantissa = real;
-            }
-
-            int exponent = 0;
-
-            while (mantissa < 1d)
-            {
-                mantissa *= 2d;
-                exponent--;
-            }
-
-            while (mantissa >= 2d)
-            {
-                mantissa /= 2d;
-                exponent++;
-            }
-
-            if ((context.Fpcr & FPCR.Fz) != 0 && exponent < MinimumExp)
-            {
-                context.Fpsr |= FPSR.Ufc;
-
-                return SoftFloat64.FPZero(sign);
-            }
-
-            uint biasedExp = (uint)Math.Max(exponent - MinimumExp + 1, 0);
-
-            if (biasedExp == 0u)
-            {
-                mantissa /= Math.Pow(2d, MinimumExp - exponent);
-            }
-
-            ulong intMant = (ulong)Math.Floor(mantissa * Math.Pow(2d, F));
-            double error = mantissa * Math.Pow(2d, F) - (double)intMant;
-
-            if (biasedExp == 0u && (error != 0d || (context.Fpcr & FPCR.Ufe) != 0))
-            {
-                SoftFloat.FPProcessException(FPException.Underflow, context);
-            }
-
-            bool overflowToInf;
-            bool roundUp;
-
-            switch (context.Fpcr.RoundingMode)
-            {
-                case FPRoundingMode.ToNearest:
-                    roundUp = (error > 0.5d || (error == 0.5d && (intMant & 1u) == 1u));
-                    overflowToInf = true;
-                    break;
-
-                case FPRoundingMode.TowardsPlusInfinity:
-                    roundUp = (error != 0d && !sign);
-                    overflowToInf = !sign;
-                    break;
-
-                case FPRoundingMode.TowardsMinusInfinity:
-                    roundUp = (error != 0d && sign);
-                    overflowToInf = sign;
-                    break;
-
-                case FPRoundingMode.TowardsZero:
-                    roundUp = false;
-                    overflowToInf = false;
-                    break;
-
-                default:
-                    throw new ArgumentException($"Invalid rounding mode \"{context.Fpcr.RoundingMode}\".");
-            }
-
-            if (roundUp)
-            {
-                intMant++;
-
-                if (intMant == 1ul << F)
-                {
-                    biasedExp = 1u;
-                }
-
-                if (intMant == 1ul << (F + 1))
-                {
-                    biasedExp++;
-                    intMant >>= 1;
-                }
-            }
-
-            double result;
-
-            if (biasedExp >= (1u << E) - 1u)
-            {
-                result = overflowToInf ? SoftFloat64.FPInfinity(sign) : SoftFloat64.FPMaxNormal(sign);
-
-                SoftFloat.FPProcessException(FPException.Overflow, context);
-
-                error = 1d;
-            }
-            else
-            {
-                result = BitConverter.Int64BitsToDouble(
-                    (long)((sign ? 1ul : 0ul) << 63 | (biasedExp & 0x7FFul) << 52 | (intMant & 0x000FFFFFFFFFFFFFul)));
-            }
-
-            if (error != 0d)
-            {
-                SoftFloat.FPProcessException(FPException.Inexact, context);
-            }
-
-            return result;
-        }
-
-        private static double FPConvertNaN(ushort valueBits)
-        {
-            return BitConverter.Int64BitsToDouble(
-                (long)(((ulong)valueBits & 0x8000ul) << 48 | 0x7FF8000000000000ul | ((ulong)valueBits & 0x01FFul) << 42));
-        }
-    }
-}
--- a/src/ARMeilleure/Instructions/SoftFloat/SoftFloat32.cs
+++ b/src/ARMeilleure/Instructions/SoftFloat/SoftFloat32.cs
--- a/Show More
+++ b/Show More